Op 1 apr. 2014, om 21:55 heeft Olliver Schinagl het
volgende geschreven:
> On 03/31/2014 08:27 AM, Chen-Yu Tsai wrote:
>> Hi Hans,
>>
>> On Sun, Mar 30, 2014 at 8:04 PM, Hans de Goede wrote:
>>> Hi,
>>>
>>> After wens pointed me to:
>>> http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch
On 04/01/2014 10:04 PM, hmandevt...@gmail.com wrote:
I saw that Hans have a 3.13 branch
https://github.com/jwrdegoede/linux-sunxi/tree/sunxi-3.13
so, is it possible to use sunxi-fedora-scripts
https://github.com/jwrdegoede/sunxi-fedora-scripts
to build uboot and kernel image with this kernel ?
Top Posting!
I found the culprit. FAST_MBUS breaks it. After 48 hours of runs,
enabling fast_mbus immediately breaks it even after boot.
Jens and Emilio hinted that the 3.4 driver reads the FEX file for the
voltage. So the higher freq. runs at a lower voltage and that may cause it.
So I'll
I saw that Hans have a 3.13 branch
https://github.com/jwrdegoede/linux-sunxi/tree/sunxi-3.13
so, is it possible to use sunxi-fedora-scripts
https://github.com/jwrdegoede/sunxi-fedora-scripts
to build uboot and kernel image with this kernel ?
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On 1 April 2014 15:48, Siarhei Siamashka wrote:
> On Sun, 30 Mar 2014 20:56:57 +0200
> Olliver Schinagl wrote:
>
> Too bad that really few people are willing or able to do the current
> draw measurements on their hardware. But at the same time, tweaking
> the CPU clock speed seems to be somewhat
Hans and Maxime
Many thanks for working on this! I just wanted to share my appreciation
on the whole series.
Also I see you have found use of my random patches i was typing without
compile testing, without hardware ;) Hans, I do hope you saw my my notes
that i started to make on one of the g
On 03/31/2014 08:27 AM, Chen-Yu Tsai wrote:
Hi Hans,
On Sun, Mar 30, 2014 at 8:04 PM, Hans de Goede wrote:
Hi,
After wens pointed me to:
http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/dram_sun6i.c;h=9275ca21ac99592c7d520a41c0914b359c27b913;hb=refs/heads/lichee/jb-
On 03/30/2014 08:56 PM, Olliver Schinagl wrote:
On 03/30/2014 05:59 PM, Ian Campbell wrote:
On Sun, 2014-03-30 at 14:26 +0200, Olliver Schinagl wrote:
That said the sorts of random crashed you've been posting sound a lot
like either a DRAM issue or overheating. Either of which could be down
to
Signed-off-by: Siarhei Siamashka
---
drivers/power/axp_power/axp20-mfd.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/power/axp_power/axp20-mfd.h
b/drivers/power/axp_power/axp20-mfd.h
index 0021fb5..6ec26f6 100644
--- a/drivers/power/axp_power/axp20-mfd.h
+++ b/drivers/power/a
Apparently bitwise '&' operator was supposed to be used here
instead of logical '&&'.
Signed-off-by: Siarhei Siamashka
---
drivers/power/axp_power/axp20-mfd.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/axp_power/axp20-mfd.h
b/drivers/power/axp_power/axp20-
As long as somebody is regularly accessing axp20x hwmon sysfs entries,
maintain a work queue for 25Hz periodic sampling of ACIN voltage/current
information. And calculate moving average using this data. This periodic
sampling stops after ~1 minute from the last access to axp20x hwmon sysfs.
Compar
These measurements for ACIN (adapter input) are just the momentary
values sampled from ADC. But in order to have something more practical,
a lot of values need to be sampled and averaged. Just obtaining a
single output from the 'sensors' tool is not very meaningful,
because the momentary current dr
. Without access to lab power supplies, multimeters, cutting wires
and/or soldering :-)
These patches are also available here:
https://github.com/ssvb/linux-sunxi/commits/20140401-axp209-hwmon-v2
Example of a Cubietruck running under heavy load:
$ sensors
axp20_mfd-i2c-0-34
Adapter
SPI transfers were limited to one FIFO depth, which is 64 bytes.
This was an artificial limitation, however, as the hardware can handle
much larger bursts. To accommodate this, we enable the interrupt when
the Rx FIFO is 3/4 full, and drain the FIFO within the interrupt
handler. The 3/4 ratio was c
On Mon, Mar 31, 2014 at 09:16:51PM -0500, Alexandru Gagniuc wrote:
> SPI transfers were limited to one FIFO depth, which is 64 bytes.
> This was an artificial limitation, however, as the hardware can handle
> much larger bursts. To accommodate this, we enable the interrupt when
> the Rx FIFO is 3/4
Hi,
I have create the http://linux-sunxi.org/Megafeis_a08 device page and
have done most of the work for you. Please fill in the blanks still and
verify the information there.
Thanks.
Luc Verhaegen.
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On Tue, Apr 01, 2014 at 01:18:53PM +0200, Hans de Goede wrote:
> Hi,
>
> On 04/01/2014 12:19 PM, Maxime Ripard wrote:
> > On Tue, Apr 01, 2014 at 01:12:21AM +0200, Hans de Goede wrote:
> >> Hi All,
> >>
> >> Here is a branch of u-boot for the A31 with preliminary axp221
> >> support:
> >>
> >> htt
On Sun, 30 Mar 2014 20:56:57 +0200
Olliver Schinagl wrote:
> On 03/30/2014 05:59 PM, Ian Campbell wrote:
> > On Sun, 2014-03-30 at 14:26 +0200, Olliver Schinagl wrote:
> >>> That said the sorts of random crashed you've been posting sound a lot
> >>> like either a DRAM issue or overheating. Either
I have followed the instructions on how to create a new initlogo file but
the size does not match when init tries to use it.
I used the following on a png file that is 800 x 480 and the file size is
119,306 bytes.
After I run *convert -depth 8 initlogo.png rgb:initlogo.raw* the .raw file
is 1,
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/board.c | 9 +++--
board/sunxi/board.c | 17 -
2 files changed, 19 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index f01d38b..832d22c 100
From: Maxime Ripard
Signed-off-by: Maxime Ripard
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/board.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 50fcc06..0d954da 100644
--- a/arch/arm/cpu/armv7/
From: Oliver Schinagl
To setup clocks and control voltages.
HdG: Rename the files from the somewhat generic pmu name to prcm.{c,h}
HdG: Make the prcm code only deal with the prcm, remove axp221 bits
Signed-off-by: Oliver Schinagl
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/Make
With this patch and built with SPL,NO_AXP options added, it is possible
to build a non-functional SPL for the A31, which will properly load and
print its banner on the serial console:
U-Boot SPL 2014.04-rc2-01254-g7e81174-dirty (Mar 28 2014 - 21:09:16)
Board: Colombus
sun6i SPL support is not yet
From: Maxime Ripard
Add a new sun6i machine that doesn't do much for now.
Signed-off-by: Maxime Ripard
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/board.c| 2 +-
arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++
boards.cfg | 1 +
include/configs/sun6i.h
Note this is something I noticed while working on the clock stuff for the
mmc support. Likely more work is needed to get twi to work on sun6i, this
is just a first step.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/clock.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
From: Oliver Schinagl
The A31 uses a new push-pull two wire interface, which features higher
transfer speeds (upto 6 MHz) in theory. While the hardware can burst 8
bytes each time, this driver will only see very little use and thus is
limited to single byte transmission only.
HdG: Various fixes
From: Maxime Ripard
Signed-off-by: Maxime Ripard
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/clock.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
index a344971..c4b19da 100644
--- a/arch/arm/cp
Rather then having effectively 2 copies of a function through
#ifdef CONFIG_SUN6I ... #else ... #endif, really make 2 copies of the
function in 2 separate C-files, this is much easier to read and maintain.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/Makefile | 4 +
arch/ar
Signed-off-by: Hans de Goede
---
include/configs/sunxi-common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 212b621..09edc71 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common
From: Oliver Schinagl
P2WI needs 2 pins configured from the GPIO pins. This adds defines to be
used for that.
Signed-off-by: Oliver Schinagl
Signed-off-by: Hans de Goede
---
arch/arm/include/asm/arch-sunxi/gpio.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch
Since SDXC_DES_BUFFER_MAX_LEN is always a power of 2,
"(SDXC_DES_BUFFER_MAX_LEN - 1) & SDXC_DES_BUFFER_MAX_LEN" is just a really
complicated way of writing 0.
Since writing 0 to data_buf1_sz means transfer SDXC_DES_BUFFER_MAX_LEN bytes,
there is no need to set remain to SDXC_DES_BUFFER_MAX_LEN whe
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/clock.c | 3 +++
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 21 +
drivers/mmc/sunxi_mmc.c | 9 -
include/configs/sunxi-common.h| 2 --
4 files changed,
This fixes me being unable to use PLL6 as clock-source for the mmc controller.
Unfortunately the DRAM controller situation is a mess. Someone will need
to put a lot of time into getting DRAM going before we can do SPL on sun6i.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/clock_sun6
From: Maxime Ripard
The code of DRAM initialization is only of interest when building the SPL. Move
it to the CONFIG_SPL-only list of files to build.
Signed-off-by: Maxime Ripard
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 delet
From: Oliver Schinagl
A31 has several new and changed memory address. This patch adds them.
Signed-off-by: Oliver Schinagl
Signed-off-by: Hans de Goede
---
arch/arm/include/asm/arch-sunxi/cpu.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h
Change how we calculate the mod clk div so that it will work for a pll clk
of 600 or 1200 too.
Signed-off-by: Hans de Goede
---
drivers/mmc/sunxi_mmc.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index cf065f4
From: Oliver Schinagl
The A31 uses the AXP221 pmic for various voltages.
Signed-off-by: Oliver Schinagl
Signed-off-by: Hans de Goede
---
boards.cfg | 2 +-
drivers/power/Makefile | 1 +
drivers/power/axp221.c | 56 +
From: Maxime Ripard
The A31 has a new clock controller of its own. Add the structure representing
this controller register layout.
HdG: Move sun4i ccm register definitions to clock-sun4i.h and put the new
sun6i ccm register definitions in clock-sun6i.h
Signed-off-by: Maxime Ripard
Signed-off-b
This is used by the ethernet-phy on various boards.
Signed-off-by: Hans de Goede
---
board/sunxi/board.c| 3 +++
boards.cfg | 2 +-
drivers/power/axp221.c | 17 +
include/axp221.h | 5 +
4 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/b
So that we can use it as a clocksource for modules, ie for mmc. This
allows discoupling the actual mmc clock rate we get from the ram speed,
and will lead to getting exact clockspeeds for mmc rather then something
approximately right.
As an added bonus this makes things easier on sun6i since pll5
This discouples the actual mmc clock rate we get from the ram speed,
which leads to getting exact clockspeeds for mmc rather then something
approximately right.
As an added bonus this makes things easier on sun6i since pll5 cannot be
used as a module source at all there.
This has been tested on s
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/pinmux.c | 12
arch/arm/include/asm/arch-sunxi/gpio.h | 19 ++-
drivers/gpio/sunxi_gpio.c | 6 ++
3 files changed, 24 insertions(+), 13 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi
Hi All,
This patch series adds basic support for sun6i. There are some bits there
to get SPL support going (clock setup, axp related code has been tested in SPL
mode too), but DRAM setup is missing, so no SPL support.
This series will give you a u-boot.bin binary which can be used to generate
the
Hi,
On 04/01/2014 12:19 PM, Maxime Ripard wrote:
> On Tue, Apr 01, 2014 at 01:12:21AM +0200, Hans de Goede wrote:
>> Hi All,
>>
>> Here is a branch of u-boot for the A31 with preliminary axp221
>> support:
>>
>> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-a31-axp221
>>
>> Many thanks
On Tue, Apr 01, 2014 at 01:12:21AM +0200, Hans de Goede wrote:
> Hi All,
>
> Here is a branch of u-boot for the A31 with preliminary axp221
> support:
>
> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-a31-axp221
>
> Many thanks to Olliver for the initial p2wi and axp221 code, it was
>
OK. It did work in this (ugly) way:
USB1 USB2
ON ON ./devmem2 0x1c2090c w 0x180078
ON OFF ./devmem2 0x1c2090c w 0x180038
OFF ON ./devmem2 0x1c2090c w 0x180070
OFF OFF ./devmem2 0x1c2090c w 0x180030
USB1 is (for me) the upper usb port. 0x1c2090c is the memory address of
Port H Data register and
Hi,
On 04/01/2014 05:29 AM, Chen-Yu Tsai wrote:
> Hi,
>
> On Tue, Apr 1, 2014 at 7:12 AM, Hans de Goede wrote:
>> Hi All,
>>
>> Here is a branch of u-boot for the A31 with preliminary axp221
>> support:
>>
>> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-a31-axp221
>>
>> Many thanks t
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