Re: [linux-sunxi] Help adding I2C child node

2014-09-20 Thread Henrik Nordström
lör 2014-09-20 klockan 14:54 +0100 skrev bruce bushby: > First question: Does my DTS child node look ok? > > > i2c0: i2c@01c2ac00 { > pinctrl-names = "default"; > pinctrl-0 = <&i2c0_pins_a>; > status = "okay"; > > mpu@69 { > compatible = "inv_mpu_

Re: [linux-sunxi] Battery charge status not consistent

2014-09-20 Thread Dave McLaughlin
> On Saturday, 20 September 2014 22:40:04 UTC+7, Bruno Prémont wrote: > >Hi Dave, > > >Does it happen for each suspend oder just sporadically? If sporadically > it > >might be a race condition where some AXP data got read before suspend, > the > >rest after resume - ending up with incoheren

Re: [linux-sunxi] Battery charge status not consistent

2014-09-20 Thread Bruno Prémont
Hi Dave, On Sat, 20 September 2014 Dave McLaughlin wrote: > The battery voltages I assume are set internally to the AXP209 as I don't > see any way to set these. I did find a listing for these. On AXP209 you can just set the target charge voltage for the battery. What charging voltage is appli

Re: [linux-sunxi] Battery charge status not consistent

2014-09-20 Thread Dave McLaughlin
Hi Bruno, The battery voltages I assume are set internally to the AXP209 as I don't see any way to set these. I did find a listing for these. Yes, this is the Android Linux 3.4 kernel. When I get the likes of 18% showing on the Android status bar and check the actual voltage of the battery it

[linux-sunxi] Help adding I2C child node

2014-09-20 Thread bruce bushby
Hi As a hobby I've been playing with an Olimex A20-SOM and trying to attach a Drotek Invensense MPU9250 break out board. So far my uboot is working and I can boot my build via dhcp + nfs. I added the "i2ctools" to the build and I'm able to run "i2cdetect -y 0" and I can see my devices on i2c0 #

[linux-sunxi] Re: [PATCH v4 0/2] mtd: nand: add sunxi NAND flash controller support

2014-09-20 Thread Boris BREZILLON
Hi Brian, On Fri, 19 Sep 2014 21:34:38 -0700 Brian Norris wrote: > Hi Boris, > > On Mon, Aug 18, 2014 at 07:26:26PM +0200, Boris BREZILLON wrote: > > This patch series adds support for the sunxi NAND Flash Controller (NFC) > > block. > > > > These two patches only add support for the basic NAN

[linux-sunxi] Re: [PATCH v2 3/3] ARM: dts: sun8i: Add DMA controller node

2014-09-20 Thread Maxime Ripard
On Thu, Sep 18, 2014 at 11:24:40AM +0800, Chen-Yu Tsai wrote: > Add the DMA controller node and DMA bindings to the supported devices. > > Signed-off-by: Chen-Yu Tsai Applied, thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.

[linux-sunxi] Re: [PATCH v2 2/3] dmaengine: sun6i: Add support for Allwinner A23 (sun8i) variant

2014-09-20 Thread Maxime Ripard
On Thu, Sep 18, 2014 at 11:24:39AM +0800, Chen-Yu Tsai wrote: > The A23 SoC has the same dma engine as the A31 (sun6i), with a > reduced amount of endpoints and physical channels. Add the proper > config data and compatible string to support it. > > A slight difference in sun8i is an undocumented

[linux-sunxi] Re: [PATCH 6/7] ARM: dts: sun6i: Add required ahb1 clock parent and rates for dma controller

2014-09-20 Thread Maxime Ripard
On Wed, Sep 17, 2014 at 12:01:46AM +0800, Chen-Yu Tsai wrote: > On Tue, Sep 16, 2014 at 11:48 PM, Maxime Ripard > wrote: > > On Fri, Sep 12, 2014 at 10:10:25AM +0800, Chen-Yu Tsai wrote: > >> On Fri, Sep 12, 2014 at 5:15 AM, Maxime Ripard > >> wrote: > >> > On Sat, Sep 06, 2014 at 06:47:27PM +080

Re: [linux-sunxi] Battery charge status not consistent

2014-09-20 Thread Bruno Prémont
On Fri, 19 September 2014 Dave McLaughlin wrote: > With an A20 board I have found that if I power up with external DC > connected, the battery shows the correct charge percentage. If I run on > batter and make sure it never sleeps (through the app I am developing) it > discharges as expected. >

Re: [linux-sunxi] A31 (A80) RPIO banks PL and PM (PN?)

2014-09-20 Thread Maxime Ripard
Hi, On Fri, Sep 19, 2014 at 09:19:01AM -0700, RFat wrote: > I wonder is anyone managed to get the L and M GPIO pins working on the A31 > or A80. I don't know about the A80 yet, but we managed to get it working on the A31 in mainline. > Apparently, they belong to a different module called RPIO (