From: Marcus Cooper
Add the new DAI blocks to the device tree. I2S0 and I2S1 are for
connecting to an external codec whereas I2S2 is used for HDMI
audio.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 39 ++
1 file changed, 39 insertio
From: Marcus Cooper
Add the new DAI blocks to the device tree.
Signed-off-by: Marcus Cooper
---
arch/arm/boot/dts/sun6i-a31.dtsi | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index b147cb0dc14
On 3 September 2017 at 17:08, wrote:
> From: Marcus Cooper
>
> Add the new DAI blocks to the device tree.
>
> Signed-off-by: Marcus Cooper
Hi all,
I haven't got a dev board for this SoC but was able to confirm that
this worked by setting the loopback bit and recording the playback.
BR,
CK
> ---
Hi Marcus!
Dne nedelja, 03. september 2017 ob 17:08:06 CEST je codekip...@gmail.com
napisal(a):
> From: Marcus Cooper
>
> Add the new DAI blocks to the device tree. I2S0 and I2S1 are for
> connecting to an external codec whereas I2S2 is used for HDMI
> audio.
>
> Signed-off-by: Marcus Cooper
The A64 SoC has the same dma engine as the H3 (sun8i), with a
reduced amount of physical channels. To allow future reuse of the
compatible, leave the channel count etc. in the config data blank
and retrieve it from the devicetree.
Signed-off-by: Stefan Brüns
---
drivers/dma/sun6i-dma.c | 12
The current code mixes three distinct operations when transforming
the slave config to register settings:
1. special handling of DMA_SLAVE_BUSWIDTH_UNDEFINED, maxburst == 0
2. range checking
3. conversion of raw to register values
As the range checks depend on the specific SoC, move these o
Preparatory patch: If the same compatible is used for different SoCs which
have a common register layout, but different number of channels, the
channel count can no longer be stored in the config. Store it in the
device structure instead.
Signed-off-by: Stefan Brüns
---
drivers/dma/sun6i-dma.c |
For the H3, the burst lengths field offsets in the channel configuration
register differs from earlier SoC generations.
Using the A31 register macros actually configured the H3 controller
do to bursts of length 1 always, which although working leads to higher
bus utilisation.
Signed-off-by: Stefa
The A64 is register compatible with the H3, but has a different number
of dma channels and request ports.
Attach additional properties to the node to allow future reuse of the
compatible for controllers with different number of channels/requests.
If dma-requests is not specified, the register lay
The H3 supports bursts lengths of 1, 4, 8 and 16 transfers, each with
a width of 1, 2, 4 or 8 bytes.
The register value for the the width is log2-encoded, change the
conversion function to provide the correct value for width == 8.
Signed-off-by: Stefan Brüns
---
drivers/dma/sun6i-dma.c | 12 +++
The H83T uses a compatible string different from the A23, but requires
the same clock autogating register setting.
The H3 also requires setting the clock autogating register, but has
the register at a different offset.
Some currently available SoCs not yet supported by the sun6i-dma driver
will r
The A64 SoC has a DMA controller that supports 8 DMA channels
to and from various peripherals. The last used DRQ port is 27.
Add a device node for it.
Signed-off-by: Stefan Brüns
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/a
To avoid introduction of a new compatible for each small SoC/DMA controller
variation, move the definition of the channel count to the devicetree.
The number of vchans is no longer explicit, but limited by the highest
port/DMA request number. The result is a slight overallocation for SoCs
with a s
Commit 3a03ea763a67 ("dmaengine: sun6i: Add support for Allwinner A83T
(sun8i) variant") and commit f008db8c00c1 ("dmaengine: sun6i: Add support for
Allwinner H3 (sun8i) variant") added support for the A83T resp. H3, but missed
some differences between the original A31 and A83T/H3.
The first patch
On 02/09/17 03:02, Stefan Bruens wrote:
> On Samstag, 2. September 2017 00:32:50 CEST André Przywara wrote:
>> Hi,
>>
>> On 01/09/17 02:19, Stefan Bruens wrote:
>>> On Freitag, 1. September 2017 02:31:35 CEST Andre Przywara wrote:
Hi,
On 31/08/17 00:36, Stefan Brüns wrote:
> The
On 03/09/17 23:40, Stefan Brüns wrote:
> The H83T uses a compatible string different from the A23, but requires
A83T
> the same clock autogating register setting.
>
> The H3 also requires setting the clock autogating register, but has
> the register at a different offset.
>
> Some current
Hi,
On 03/09/17 23:40, Stefan Brüns wrote:
> The A64 SoC has the same dma engine as the H3 (sun8i), with a
> reduced amount of physical channels. To allow future reuse of the
> compatible, leave the channel count etc. in the config data blank
> and retrieve it from the devicetree.
>
> Signed-off-
Hi,
On 03/09/17 23:40, Stefan Brüns wrote:
> To avoid introduction of a new compatible for each small SoC/DMA controller
> variation, move the definition of the channel count to the devicetree.
>
> The number of vchans is no longer explicit, but limited by the highest
> port/DMA request number. T
On Montag, 4. September 2017 01:44:54 CEST André Przywara wrote:
> Hi,
>
> On 03/09/17 23:40, Stefan Brüns wrote:
> > To avoid introduction of a new compatible for each small SoC/DMA
> > controller
> > variation, move the definition of the channel count to the devicetree.
> >
> > The number of vc
On Montag, 4. September 2017 01:37:58 CEST André Przywara wrote:
> > @@ -1090,6 +1101,7 @@ MODULE_DEVICE_TABLE(of, sun6i_dma_match);
> >
> > static int sun6i_dma_probe(struct platform_device *pdev)
> > {
> >
> > const struct of_device_id *device;
> >
> > + struct device_node *np = pdev
On Sun, Sep 03, 2017 at 05:08:52PM +0200, codekip...@gmail.com wrote:
> From: Marcus Cooper
>
> Add the new DAI blocks to the device tree.
>
> Signed-off-by: Marcus Cooper
Applied for 4.15, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-elec
On Sun, Sep 03, 2017 at 04:50:15PM +0300, Priit Laes wrote:
> This is a follow-up commit for sun{4,7}i ccu conversion. Now that
> all the relevant pieces have been merged we can use dt-binding headers
> again.
>
> Also included is additional patch to add i2s0 block to sun4i dtsi header.
The last
On Fri, Sep 01, 2017 at 02:42:47PM +, Brüns, Stefan wrote:
> On Freitag, 1. September 2017 15:35:49 CEST Maxime Ripard wrote:
> > On Fri, Sep 01, 2017 at 05:04:54AM +0200, Stefan Bruens wrote:
> > > On Donnerstag, 31. August 2017 16:51:35 CEST Maxime Ripard wrote:
> > > > Hi,
> > > >
> > > > O
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