On Thu, Jul 09, 2020 at 02:38:17PM -0700, Milos Ladni wrote:
> Hi, thank you very much!
>
> It works now. I totally forgot to enable ldo3 and ldo4:)
> I am using my custom board and i want to migrate from legacy 3.4 to
> mainline.
Sample patch for Olimex Lime2:
https://git.kernel.org/pub/scm/lin
On 7/4/20 6:38 AM, Clément Péron wrote:
> From: Marcus Cooper
>
> On the newer SoCs such as the H3 and A64 this is set by default
> to transfer a 0 after each sample in each slot. However the A10
> and A20 SoCs that this driver was developed on had a default
> setting where it padded the audio ga
On 7/4/20 6:38 AM, Clément Péron wrote:
> From: Jernej Skrabec
>
> H6 I2S is very similar to that in H3, except it supports up to 16
> channels.
>
> Signed-off-by: Jernej Skrabec
> Signed-off-by: Marcus Cooper
> Signed-off-by: Clément Péron
> ---
> sound/soc/sunxi/sun4i-i2s.c | 227 +
On 7/4/20 6:38 AM, Clément Péron wrote:
> From: Marcus Cooper
>
> Extend the functionality of the driver to include support of 20 and
> 24 bits per sample.
>
> Signed-off-by: Marcus Cooper
> Signed-off-by: Clément Péron
> ---
> sound/soc/sunxi/sun4i-i2s.c | 11 +--
> 1 file changed, 9
On 7/4/20 6:38 AM, Clément Péron wrote:
> From: Marcus Cooper
>
> Some codecs such as i2s based HDMI audio and the Pine64 DAC require
> a different amount of bit clocks per frame than what is calculated
> by the sample width. Use the values obtained by the tdm slot bindings
> to adjust the LRCLK
Hi, thank you very much!
It works now. I totally forgot to enable ldo3 and ldo4:)
I am using my custom board and i want to migrate from legacy 3.4 to
mainline.
Thanks,
Milos
четвртак, 09. јул 2020. 19.06.05 UTC+2, Chen-Yu Tsai је написао/ла:
>
> Hi,
>
> On Fri, Jul 10, 2020 at 12:51 AM Milos L
Hi,
On Fri, Jul 10, 2020 at 12:51 AM Milos Ladni wrote:
>
> Hi,
>
> I am using mainline kernel on my A20 board and can not get GPIO working for
> some ports.
> I tested them through standard sysfs and for pin number id i used next :
> (position of letter in alphabet - 1) * 32 + pin number
> I t
Hi,
I am using mainline kernel on my A20 board and can not get GPIO working for
some ports.
I tested them through standard sysfs and for pin number id i used next :
(position of letter in alphabet - 1) * 32 + pin number
I tried with PE0, PE1, PE2, and PE4, i think that whole PE port does not
wo
