Hi,
On Wed, 16 Dec 2015 10:11:38 +0100
Hans de Goede wrote:
> Hi,
>
> On 16-12-15 08:35, Siarhei Siamashka wrote:
> > On Thu, 10 Dec 2015 04:31:05 -0800 (PST)
> > Thomas Kaiser wrote:
> >
> >> Hi,
> >>
> >> Hans de Goede wrote:
> >>>
> >>>
Hi,
On 16-12-15 08:35, Siarhei Siamashka wrote:
On Thu, 10 Dec 2015 04:31:05 -0800 (PST)
Thomas Kaiser wrote:
Hi,
Hans de Goede wrote:
? if I understand things correctly your patch make lima-memtester pass
at 672 MHz (which is our current configured speed) on
> "Siarhei" == Siarhei Siamashka writes:
Hi,
> Some outliers are always possible and we have only one sample, which
> can be clocked somewhat higher than the others. It is hard to make any
> conclusions with the available data and the heatsink may be
On Thu, 10 Dec 2015 10:29:52 +0100
Jens Kuske wrote:
> On 10/12/15 03:13, Siarhei Siamashka wrote:
> > Hello,
> >
> > On Wed, 9 Dec 2015 19:29:49 +0100
> > Jens Kuske wrote:
> >
> >> On 09/12/15 09:40, Siarhei Siamashka wrote:
> >> The read delays
Siarhei Siamashka wrote:
> Unless we get more test results in a few days which radically change
> the statistics, probably using 624 MHz for DRAM on Orange Pi PC would
> be reasonable.
I second that while also asking the overclocker community for help:
On Thu, 10 Dec 2015 04:31:05 -0800 (PST)
Thomas Kaiser wrote:
> Hi,
>
> Hans de Goede wrote:
> >
> > ? if I understand things correctly your patch make lima-memtester pass
> > at 672 MHz (which is our current configured speed) on both your
> > and Siarhei's
On 10/12/15 03:13, Siarhei Siamashka wrote:
> Hello,
>
> On Wed, 9 Dec 2015 19:29:49 +0100
> Jens Kuske wrote:
>
>> On 09/12/15 09:40, Siarhei Siamashka wrote:
>>> Thanks for the explanations. I finally got lima-memtester up and
>>> running on H3 hardware (not that it was
On 09/12/15 09:40, Siarhei Siamashka wrote:
> On Fri, 13 Nov 2015 18:22:10 +0100
> Jens Kuske wrote:
>
>> On 13/11/15 13:36, Siarhei Siamashka wrote:
>>> On Wed, 11 Nov 2015 18:26:54 +0100
>>> Jens Kuske wrote:
>>>
Based on some guessing and
Hello,
On Wed, 9 Dec 2015 19:29:49 +0100
Jens Kuske wrote:
> On 09/12/15 09:40, Siarhei Siamashka wrote:
> > Thanks for the explanations. I finally got lima-memtester up and
> > running on H3 hardware (not that it was difficult, but just the amount
> > of unnecessary
Hi,
On 11/13/2015 01:36 PM, Siarhei Siamashka wrote:
On Wed, 11 Nov 2015 18:26:54 +0100
Jens Kuske wrote:
Based on some guessing and comparing with the parts I initially started
disassembling (before this SDK appeared), I think it's I20. The I20 dram
init code matched
On 13/11/15 13:36, Siarhei Siamashka wrote:
> On Wed, 11 Nov 2015 18:26:54 +0100
> Jens Kuske wrote:
>
>> Based on some guessing and comparing with the parts I initially started
>> disassembling (before this SDK appeared), I think it's I20. The I20 dram
>> init code matched
On Wed, 11 Nov 2015 18:26:54 +0100
Jens Kuske wrote:
> Based on some guessing and comparing with the parts I initially started
> disassembling (before this SDK appeared), I think it's I20. The I20 dram
> init code matched the disassembled parts exactly, except the ZQ
>
Hi,
On 11-11-15 04:40, Siarhei Siamashka wrote:
BTW, is anybody already planning to work on HDMI video support
for U-Boot?
Not that I know of, the H3 (and other new SoCs) have a new display
output pipeline. So it is probably best to just start a whole
new u-boot display driver for this.
Hi Siarhei,
On 11/11/15 04:40, Siarhei Siamashka wrote:
> On Thu, 22 Oct 2015 13:52:38 +0200
> Jens Kuske wrote:
>
>>
>> On 22/10/15 10:49, Hans de Goede wrote:
>>> Hi,
>>>
>>> On 22-10-15 09:49, Jens Kuske wrote:
>> [..]
I don't plan to work on USB soon, my next
On Thu, 22 Oct 2015 13:52:38 +0200
Jens Kuske wrote:
>
> On 22/10/15 10:49, Hans de Goede wrote:
> > Hi,
> >
> > On 22-10-15 09:49, Jens Kuske wrote:
> [..]
> >>
> >> I don't plan to work on USB soon, my next step would have been Ethernet
> >> and finishing the basic
> "Hans" == Hans de Goede writes:
Hi,
> 2) I see no pmic code in there. I know these boards do not use an axp pmic,
> but according to my info at least the Orange Pi 2 (which I have) uses a
> sy8106a pmic, it is not entirely clear to me yet if this one needs any
>
I have a feeling that sy8106a could be related to Silergy other pmics.
Maybe something custom made, with special voltage, i2c address etc.
http://lists.infradead.org/pipermail/linux-rockchip/2014-September/000249.html
-Miskab
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Hi,
On 22-10-15 09:49, Jens Kuske wrote:
Hi,
On 21/10/15 21:18, Hans de Goede wrote:
Great to see that you've started working on this again. Last weekend I
ended up working on this too together with Reinder E.N. de Haan
(added to the Cc).
We took a slightly different
Hi,
On 21/10/15 21:18, Hans de Goede wrote:
>
> Great to see that you've started working on this again. Last weekend I
> ended up working on this too together with Reinder E.N. de Haan
>
> (added to the Cc).
>
> We took a slightly different approach for the gates clocks,
On 22/10/15 10:49, Hans de Goede wrote:
> Hi,
>
> On 22-10-15 09:49, Jens Kuske wrote:
[..]
>>
>> I don't plan to work on USB soon, my next step would have been Ethernet
>> and finishing the basic u-boot support. You know my u-boot H3 wip tree I
>> hope? Before we duplicate our work there too...
Hi,
On 22-10-15 09:58, Jean-Francois Moine wrote:
On Wed, 21 Oct 2015 21:18:45 +0200
Hans de Goede wrote:
Great to see that you've started working on this again. Last weekend I
ended up working on this too together with Reinder E.N. de Haan
(added to
Hi,
On 21-10-15 18:13, Jens Kuske wrote:
Hi everyone,
This is v3 of my patch series introducing basic kernel support for Allwinner's
H3 SoC. It mainly adds basic clocks and pinctrl. It also adds interrupts,
timers, watchdog, RTC, dmaengine, MMC and UARTs, which are mostly compatible
to those
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