On Wed, Nov 06, 2013 at 10:27:49AM +0900, Jingoo Han wrote:
Change the phy provider used from the old usb phy specific to a new one
using the generic phy framework.
Signed-off-by: Jingoo Han jg1@samsung.com
Cc: Kamil Debski k.deb...@samsung.com
---
Exynos OHCI driver also uses Exynos
On Sat, Nov 16, 2013 at 12:23:50PM +0530, Vishal Annapurve wrote:
Hi,
Here are the updated patches:
Can you please resend these in a format which I can apply them in
without having to hand-edit all three of them?
thanks,
greg k-h
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On Thu, Dec 05, 2013 at 03:20:53PM +0800, Peter Chen wrote:
Due to imx28 needs ARM swp instruction for writing, we set
CI_HDRC_IMX28_WRITE_FIX for imx28.
Signed-off-by: Peter Chen peter.c...@freescale.com
Signed-off-by: Marc Kleine-Budde m...@pengutronix.de
Tested-by: Marc Kleine-Budde
On Thu, Dec 05, 2013 at 03:20:54PM +0800, Peter Chen wrote:
From: Chris Ruehl chris.ru...@gtsys.com.hk
* init the sts flag to 0 (missed)
* fix write the real bit not sts value
* Set PORTCS_STS and DEVLC_STS only if sts = 1
Signed-off-by: Chris Ruehl chris.ru...@gtsys.com.hk
On Thu, Dec 05, 2013 at 03:20:52PM +0800, Peter Chen wrote:
According to Freescale imx28 Errata, ENGR119653 USB: ARM to USB
register error issue, All USB register write operations must
use the ARM SWP instruction. So, we implement special hw_write
and hw_test_and_clear for imx28.
Discussion
On Thu, Dec 05, 2013 at 03:20:51PM +0800, Peter Chen wrote:
According to Freescale imx28 Errata, ENGR119653 USB: ARM to USB
register error issue, All USB register write operations must
use the ARM SWP instruction. So, we implement a special ehci_write
for imx28.
Discussion for it at below:
On Thu, Dec 05, 2013 at 03:20:55PM +0800, Peter Chen wrote:
From: Chris Ruehl chris.ru...@gtsys.com.hk
hw_phymode_configure configures the PORTSC registers and allow the
following phy_inits to operate on the right parameters. This fix a problem
where the UPLI (ISP1504) could not be detected,
On 12/09/2013 07:30 AM, Peter Chen wrote:
Implementation of notify_suspend and notify_resume will be different
according to mxs_phy_data-flags.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 55
++---
1 files
On Sun, Dec 08, 2013 at 10:03:42PM -0600, Felipe Balbi wrote:
On Tue, Dec 03, 2013 at 08:27:58AM +0900, Jingoo Han wrote:
Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro
is not preferred.
Signed-off-by: Jingoo Han jg1@samsung.com
I wonder why I wasn't Cc:ed to this
On 12/09/2013 07:30 AM, Peter Chen wrote:
Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.
Which bugs are fixed by enabling this bit? Is it only suspend related?
Can you document them or better add a pointer to the documentation.
On 12/09/2013 07:31 AM, Peter Chen wrote:
This API is used to set wakeup enable at PHY registers, in that
case, the PHY can be waken up from suspend due to external events,
I' no native speaker, but I think it's to be woken up.
like vbus change, dp/dm change and id change.
Signed-off-by:
On Thu, Dec 05, 2013 at 03:20:55PM +0800, Peter Chen wrote:
From: Chris Ruehl chris.ru...@gtsys.com.hk
hw_phymode_configure configures the PORTSC registers and allow the
following phy_inits to operate on the right parameters. This fix a
problem
where the UPLI (ISP1504) could not
On Thu, Dec 05, 2013 at 03:20:51PM +0800, Peter Chen wrote:
According to Freescale imx28 Errata, ENGR119653 USB: ARM to USB
register error issue, All USB register write operations must
use the ARM SWP instruction. So, we implement a special ehci_write
for imx28.
Discussion for it
Make use of the dev variable instead of referencing the dev field of the
pdev struct.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Signed-off-by: Alan Stern st...@rowland.harvard.edu
---
drivers/usb/host/ohci-at91.c | 18
Replace the request_mem_region + ioremap calls by the
devm_ioremap_resource call which does the same things but with device
managed resources.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Signed-off-by: Alan Stern st...@rowland.harvard.edu
Replace clk_get calls by devm_clk_get calls.
Signed-off-by: Boris BREZILLON b.brezil...@overkiz.com
Acked-by: Nicolas Ferre nicolas.fe...@atmel.com
Signed-off-by: Alan Stern st...@rowland.harvard.edu
---
drivers/usb/host/ohci-at91.c | 30 +++---
1 file changed, 7
Hi,
On Fri, Dec 06, 2013 at 02:15:30PM -0600, Felipe Balbi wrote:
On Tue, Dec 03, 2013 at 12:39:50PM +0200, Heikki Krogerus wrote:
On Thu, Oct 17, 2013 at 09:54:26AM -0500, Felipe Balbi wrote:
On Wed, Oct 16, 2013 at 04:27:26PM +0300, Roger Quadros wrote:
On 10/16/2013 04:10 PM, Kishon
On Thu, Dec 05, 2013 at 03:20:54PM +0800, Peter Chen wrote:
From: Chris Ruehl chris.ru...@gtsys.com.hk
* init the sts flag to 0 (missed)
* fix write the real bit not sts value
* Set PORTCS_STS and DEVLC_STS only if sts = 1
Signed-off-by: Chris Ruehl chris.ru...@gtsys.com.hk
On Mon, Dec 09, 2013 at 08:44:05AM +, peter.c...@freescale.com wrote:
On Thu, Dec 05, 2013 at 03:20:55PM +0800, Peter Chen wrote:
From: Chris Ruehl chris.ru...@gtsys.com.hk
hw_phymode_configure configures the PORTSC registers and allow the
following phy_inits to operate
On Mon, Dec 09, 2013 at 08:40:42AM +, peter.c...@freescale.com wrote:
On Thu, Dec 05, 2013 at 03:20:54PM +0800, Peter Chen wrote:
From: Chris Ruehl chris.ru...@gtsys.com.hk
* init the sts flag to 0 (missed)
* fix write the real bit not sts value
* Set PORTCS_STS and
Hello,
This patch series moves the different driver resources (clks and iomem)
retrieval to the device managed versions (devm_ functions).
Best Regards,
Boris
Changes since v4:
- remove unneeded debug trace in case devm_ioremap_resource fails
(an error message is already printed within
On 12/09/2013 07:31 AM, Peter Chen wrote:
After clear portsc.phcd, PHY needs 200us stable time for switch
32K clock to AHB clock.
If this is a general bugbix, please move it to the start of this series
and add stable on Cc. I think I hit the bug on the second USB port of a
custom MX28 board,
Hi,
On Mon, Dec 09, 2013 at 12:43:37PM +0530, Kishon Vijay Abraham I wrote:
On Thursday 05 December 2013 01:28 PM, Heikki Krogerus wrote:
On Thu, Dec 05, 2013 at 12:04:46PM +0530, Kishon Vijay Abraham I wrote:
On Wednesday 04 December 2013 08:10 PM, Heikki Krogerus wrote:
On Mon, Nov 25, 2013
On Monday, December 09, 2013 10:56 AM, Greg KH wrote:
On Wed, Nov 06, 2013 at 10:27:49AM +0900, Jingoo Han wrote:
Change the phy provider used from the old usb phy specific to a new one
using the generic phy framework.
Signed-off-by: Jingoo Han jg1@samsung.com
Cc: Kamil Debski
On Mon, Dec 09, 2013 at 08:37:55AM +, peter.c...@freescale.com wrote:
On Thu, Dec 05, 2013 at 03:20:51PM +0800, Peter Chen wrote:
According to Freescale imx28 Errata, ENGR119653 USB: ARM to USB
register error issue, All USB register write operations must
use the ARM SWP
On Mon, Dec 09, 2013 at 09:31:28AM +0100, Marc Kleine-Budde wrote:
On 12/09/2013 07:30 AM, Peter Chen wrote:
Implementation of notify_suspend and notify_resume will be different
according to mxs_phy_data-flags.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
On 12/09/2013 03:04 AM, Greg KH wrote:
On Thu, Dec 05, 2013 at 03:20:51PM +0800, Peter Chen wrote:
According to Freescale imx28 Errata, ENGR119653 USB: ARM to USB
register error issue, All USB register write operations must
use the ARM SWP instruction. So, we implement a special ehci_write
On Mon, Dec 09, 2013 at 09:38:17AM +0100, Marc Kleine-Budde wrote:
On 12/09/2013 07:30 AM, Peter Chen wrote:
Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.
Which bugs are fixed by enabling this bit? Is it only suspend related?
Hi Greg,
Attached are the patches.
Regards,
Vishal
On Monday 09 December 2013 07:29 AM, Greg KH wrote:
On Sat, Nov 16, 2013 at 12:23:50PM +0530, Vishal Annapurve wrote:
Hi,
Here are the updated patches:
Can you please resend these in a format which I can apply them in
without having to
On Mon, Dec 09, 2013 at 09:41:54AM +0100, Marc Kleine-Budde wrote:
On 12/09/2013 07:31 AM, Peter Chen wrote:
This API is used to set wakeup enable at PHY registers, in that
case, the PHY can be waken up from suspend due to external events,
I' no native speaker, but I think it's to be woken
On Mon, Dec 09, 2013 at 10:05:17AM +0100, Marc Kleine-Budde wrote:
On 12/09/2013 07:31 AM, Peter Chen wrote:
After clear portsc.phcd, PHY needs 200us stable time for switch
32K clock to AHB clock.
If this is a general bugbix, please move it to the start of this series
and add stable on
On 12/09/2013 10:07 AM, Peter Chen wrote:
On Mon, Dec 09, 2013 at 09:38:17AM +0100, Marc Kleine-Budde wrote:
On 12/09/2013 07:30 AM, Peter Chen wrote:
Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.
Which bugs are fixed by enabling
On Mon, 2013-12-09 at 15:14 +0530, Vishal Annapurve wrote:
Hi Greg,
Attached are the patches.
Hi,
please send patches in the clear, inline, one patch per mail
and with a Signed-off-by line, as described in the Documentation
directory of the kernel.
Regards
Oliver
--
On 12/09/2013 10:19 AM, Peter Chen wrote:
On Mon, Dec 09, 2013 at 10:05:17AM +0100, Marc Kleine-Budde wrote:
On 12/09/2013 07:31 AM, Peter Chen wrote:
After clear portsc.phcd, PHY needs 200us stable time for switch
32K clock to AHB clock.
If this is a general bugbix, please move it to the
On Mon, Dec 09, 2013 at 03:14:07PM +0530, Vishal Annapurve wrote:
Hi Greg,
Attached are the patches.
As Oliver said, I can't take these, please read
Documentation/SubmittingPatches for how to do this properly.
thanks,
greg k-h
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It makes easier for debugging some hardware specific issues.
Note that this option won't override the value to be set. That is,
you can turn quirks on by this option but cannot turn them off if set
by the driver.
Signed-off-by: Takashi Iwai ti...@suse.de
---
I noticed the lack of quirks module
We've got regression reports that my previous fix for spurious wakeups
after S5 on HP Haswell machines leads to the hangup at shutdown on
some machines. It turned out that the fix for one side triggers
another BIOS bug in other side. So, it's exclusive.
Since the S5 wakeups have been confirmed
NOT FOR COMMITTING TO MAINLINE.
With g_ether loaded the sk occasionally becomes 0x.
It happens usually after transferring few hundreds of kilobytes to few
tens of megabytes. If sk is 0x then dereferencing it causes
kernel panic.
This is a *workaround*. I don't know enough net
Hi Kishon,
On Mon, Dec 9, 2013 at 7:07 AM, Kishon Vijay Abraham I kis...@ti.com wrote:
Hi,
On Saturday 07 December 2013 02:38 AM, Felipe Balbi wrote:
Hi,
On Fri, Dec 06, 2013 at 01:14:38PM +0100, Javier Martinez Canillas wrote:
On Fri, Dec 6, 2013 at 1:06 PM, Kishon Vijay Abraham I
Does warm reset while activating SuperSpeed HUBs if the hub activate type
is HUB_RESET_RESUME.
When we do Suspend-to-RAM with (any one of the 16, 32, 64 Jetflash) transcend
USB 3.0 device connected on 3.0 port, during resume I noticed that the
XHCI controller has moved to sometimes RECOVERY,
Hi Vikas,
On Mon, Dec 9, 2013 at 5:59 PM, Vikas Sajjan vikas.saj...@linaro.org wrote:
few minor nits here. ;-)
Does warm reset while activating SuperSpeed HUBs if the hub activate type
is HUB_RESET_RESUME.
When we do Suspend-to-RAM with (any one of the 16, 32, 64 Jetflash) transcend
USB
Hi,
From: Kishon Vijay Abraham I [mailto:kis...@ti.com]
Sent: Monday, December 09, 2013 8:56 AM
Hi,
On Friday 06 December 2013 09:58 PM, Kamil Debski wrote:
Hi Kishon,
Thank you for the review.
From: Kishon Vijay Abraham I [mailto:kis...@ti.com]
Sent: Friday, December 06,
We've got regression reports that my previous fix for spurious wakeups
after S5 on HP Haswell machines leads to the automatic reboot at
shutdown on some machines. It turned out that the fix for one side
triggers another BIOS bug in other side. So, it's exclusive.
Since the original S5 wakeups
On Mon, Dec 09, 2013 at 02:53 +0400, Sergei Ianovich wrote:
---8---
$ make
CC [M] drivers/usb/host/ohci-pxa27x.o
drivers/usb/host/ohci-pxa27x.c: In function ‘ohci_pxa_of_init’:
drivers/usb/host/ohci-pxa27x.c:310:2: error: implicit declaration of function
‘dma_coerce_mask_and_coherent’
On Mon, 2013-12-09 at 14:26 +, Steve Cotton wrote:
There's already a different patch for this
in the linux-next/master and gregkh/usb/usb-linus trees, but
not in the linux-next/stable or gregkh/usb/usb-next trees.
It adds that include 3 lines higher up, to keep the includes in
Hi.
I recently bought a Kingston MobileLite G3 SD card reader
(http://www.kingston.com/en/flash/readers#fcr-mlg3).
I now have a problem where it recognises the microSDXC card without any
problems, but does not recognise the MSPD/SDXC slot at all (on windows I
get 2 'drives')
the kingston
On Saturday 07 December 2013 12:55 PM, Balbi, Felipe wrote:
the lock was only taken inside the hardirq
handler, which runs with IRQs disabled. There's
no chance of any race condition happening, even
on SMP machines. It's safe to remove that
spinlock.
Signed-off-by: Felipe Balbi
On Mon, 9 Dec 2013, Vikas Sajjan wrote:
Does warm reset while activating SuperSpeed HUBs if the hub activate type
is HUB_RESET_RESUME.
When we do Suspend-to-RAM with (any one of the 16, 32, 64 Jetflash) transcend
USB 3.0 device connected on 3.0 port, during resume I noticed that the
XHCI
On Mon, 9 Dec 2013, Thomas Raschbacher wrote:
Hi.
I recently bought a Kingston MobileLite G3 SD card reader
(http://www.kingston.com/en/flash/readers#fcr-mlg3).
I now have a problem where it recognises the microSDXC card without any
problems, but does not recognise the MSPD/SDXC slot at
On Mon, 2013-12-09 at 12:47 +0100, Andrzej Pietrasiewicz wrote:
NOT FOR COMMITTING TO MAINLINE.
With g_ether loaded the sk occasionally becomes 0x.
It happens usually after transferring few hundreds of kilobytes to few
tens of megabytes. If sk is 0x then dereferencing it
On 2013-12-09 08:53, Oliver Neukum wrote:
You have XHCI debugging on. This is most likely a side effect
of teh switch to dynamic debugging in 3.12. But this should be
discussed on linux-usb.
Thanks, but some of the messages look quite hardcoded.
Is there a patch to get rid of them?
Kind
On 2013-12-09 16:25, Alan Stern wrote:
On Mon, 9 Dec 2013, Thomas Raschbacher wrote:
Hi.
I recently bought a Kingston MobileLite G3 SD card reader
(http://www.kingston.com/en/flash/readers#fcr-mlg3).
I now have a problem where it recognises the microSDXC card without
any
problems, but does
Hello.
On 12/09/2013 09:31 AM, Peter Chen wrote:
After clear portsc.phcd, PHY needs 200us stable time for switch
32K clock to AHB clock.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
drivers/usb/phy/phy-mxs-usb.c | 11 +++
1 files changed, 11 insertions(+), 0
* Javier Martinez Canillas jav...@dowhile0.org [131209 03:51]:
Hi Kishon,
On Mon, Dec 9, 2013 at 7:07 AM, Kishon Vijay Abraham I kis...@ti.com wrote:
Hi,
On Saturday 07 December 2013 02:38 AM, Felipe Balbi wrote:
Hi,
On Fri, Dec 06, 2013 at 01:14:38PM +0100, Javier Martinez
Salut Paul,
On 08/12/2013 17:26, Paul Walmsley wrote:
Hi Benoît,
On Tue, 3 Dec 2013, Roger Quadros wrote:
Without this, the USB devices are sometimes not detected on OMAP4 Panda
with u-boot v2013.10.
Unlike what the comment states, errata i660 does not state that we
can't RESET the USB host
On Mon, 9 Dec 2013, Thomas Raschbacher wrote:
On 2013-12-09 16:25, Alan Stern wrote:
On Mon, 9 Dec 2013, Thomas Raschbacher wrote:
Hi.
I recently bought a Kingston MobileLite G3 SD card reader
(http://www.kingston.com/en/flash/readers#fcr-mlg3).
I now have a problem where it
On Mon, Dec 09, 2013 at 10:24:52AM -0500, Alan Stern wrote:
On Mon, 9 Dec 2013, Vikas Sajjan wrote:
Does warm reset while activating SuperSpeed HUBs if the hub activate type
is HUB_RESET_RESUME.
When we do Suspend-to-RAM with (any one of the 16, 32, 64 Jetflash)
transcend
USB 3.0
If a URB is broken up into multiple transfer segments and a short
transfer occurs in any segment other than the last, the URB will
currently get stuck in the driver forever. This patch adds a check for
a short transfer and cleans up any pending segments so the URB can
complete properly.
From: Randy Dunlap rdun...@infradead.org
Make USB_CONFIGFS_MASS_STORAGE depend on BLOCK just like the other
gadget MASS_STORAGE options do. This fixes the following build errors
that occur when BLOCK is not enabled:
drivers/usb/gadget/storage_common.c: In function 'fsg_lun_open':
Use USB_CTRL_SET_TIMEOUT and USB_CTRL_GET_TIMEOUT for USB control
messages instead of an arbitrary 1s timeout value. This is particularly
useful for WUSB since in the worst case RF scanario, a WUSB device can
be unresponsive for up to 4s and still be connected.
Signed-off-by: Thomas Pugliese
On Mon, Dec 09, 2013 at 11:18:25AM -0800, Randy Dunlap wrote:
From: Randy Dunlap rdun...@infradead.org
Make USB_CONFIGFS_MASS_STORAGE depend on BLOCK just like the other
gadget MASS_STORAGE options do. This fixes the following build errors
that occur when BLOCK is not enabled:
Hi Greg,
Here's another set of really obvious fixes for this rc cycle. All patches have
been pending for a while.
Please consider merging on top of your usb-linus branch.
cheers
The following changes since commit 2cf93bea3d7b2dbf1e0ebfa9d381aad1b637e2aa:
usb: gadget: f_mass_storage: call
On 12/09/13 11:21, Felipe Balbi wrote:
On Mon, Dec 09, 2013 at 11:18:25AM -0800, Randy Dunlap wrote:
From: Randy Dunlap rdun...@infradead.org
Make USB_CONFIGFS_MASS_STORAGE depend on BLOCK just like the other
gadget MASS_STORAGE options do. This fixes the following build errors
that occur
On Mon, Dec 09, 2013 at 11:27:31AM -0800, Randy Dunlap wrote:
On 12/09/13 11:21, Felipe Balbi wrote:
On Mon, Dec 09, 2013 at 11:18:25AM -0800, Randy Dunlap wrote:
From: Randy Dunlap rdun...@infradead.org
Make USB_CONFIGFS_MASS_STORAGE depend on BLOCK just like the other
gadget
On 12/09/2013 04:35 PM, Valentine Barshak wrote:
Use add_phy_dev instead of usb_phy_add, so that devices can
be bound to the phy. This is needed to set up USB phy for
some internal PCI USB host controllers on R-Car Gen2.
Signed-off-by: Valentine Barshak valentine.bars...@cogentembedded.com
---
There is no need to skip querying the config and string descriptors for
unauthorized WUSB devices when usb_new_device is called. It is allowed
by WUSB spec. The only action that needs to be delayed until
authorization time is the set config. This change allows user mode
tools to see the
Hi,
On Mon, Dec 09, 2013 at 11:40:33PM +0400, Valentine Barshak wrote:
Use usb_add_phy_dev instead of usb_add_phy, so that devices can
be bound to the phy. This is needed to set up USB phy for
some internal PCI USB host controllers on R-Car Gen2.
Changes from previous version:
* Fixed
In usb_submit_urb, do not fail if an isoc URB for a wireless USB device
has an interval 6. Per WUSB spec, isoc endpoints can support values
from 1-16. Valid values for interrupt URBs for wireless USB devices are
still 6-16.
Signed-off-by: Thomas Pugliese thomas.pugli...@gmail.com
---
Use usb_add_phy_dev instead of usb_add_phy, so that devices can
be bound to the phy. This is needed to set up USB phy for
some internal PCI USB host controllers on R-Car Gen2.
Changes from previous version:
* Fixed function names in the commit log
Signed-off-by: Valentine Barshak
This patch correctly sets the dwNumOfPackets field of the HWA transfer
request for isochronous transfers with multiple segments. Previously
all segments used the value that was set for the first segment which may
not be correct.
Signed-off-by: Thomas Pugliese thomas.pugli...@gmail.com
---
If multiple segments belonging to an isoc transfer are submitted
concurrently, the isoc_frame_index field in struct wa_xfer can get
corrupted. This patch moves the isoc_frame_index field from struct
wa_xfer to struct wa_seg to prevent this from happening.
Signed-off-by: Thomas Pugliese
This set includes two fixes for problems that can occur when isochronous
transfers are split into multiple transfer segments.
Thomas Pugliese (2):
usb: wusbcore: move isoc_frame_index from wa_xfer to wa_seg
usb: wusbcore: set packet count correctly on multi-segment isoc
transfers
On 12/09/2013 11:41 PM, Felipe Balbi wrote:
Hi,
On Mon, Dec 09, 2013 at 11:40:33PM +0400, Valentine Barshak wrote:
Use usb_add_phy_dev instead of usb_add_phy, so that devices can
be bound to the phy. This is needed to set up USB phy for
some internal PCI USB host controllers on R-Car Gen2.
Hello,
I hope this is the right place to ask. I own a Canon CanoScan LiDE 25.
The scanner worked well the last few years and with my new notebook it
only works in one port. From the tree it seems to be tied to the
controller:
This works:
matthias@athena:~$ lsusb -t
/: Bus 04.Port 1: Dev 1,
On Tue, Dec 10, 2013 at 12:16:13AM +0400, Valentine wrote:
On 12/09/2013 11:41 PM, Felipe Balbi wrote:
Hi,
On Mon, Dec 09, 2013 at 11:40:33PM +0400, Valentine Barshak wrote:
Use usb_add_phy_dev instead of usb_add_phy, so that devices can
be bound to the phy. This is needed to set up USB
On Mon, Dec 09, 2013 at 12:32:37PM -0800, Greg Kroah-Hartman wrote:
On Tue, Dec 10, 2013 at 12:16:13AM +0400, Valentine wrote:
On 12/09/2013 11:41 PM, Felipe Balbi wrote:
Hi,
On Mon, Dec 09, 2013 at 11:40:33PM +0400, Valentine Barshak wrote:
Use usb_add_phy_dev instead of
On Mon, Dec 09, 2013 at 01:26:50PM -0600, Felipe Balbi wrote:
Hi Greg,
Here's another set of really obvious fixes for this rc cycle. All patches have
been pending for a while.
Please consider merging on top of your usb-linus branch.
cheers
The following changes since commit
when any driver using usb_bus_start_enum() is
enabled in a build with CONFIG_USB=m, we will
have a build error because of usb_bus_start_enum()
will be compiled into a module (usbcore) and
the driver (phy-fsm-usb.c or phy-isp1301-omap.c)
will be statically linked to the kernel.
The easiest fix in
Add Keystone platform USB PHY driver support. Current main purpose
of this driver is to enable the PHY reference clock gate on the
Keystone SoC. Otherwise it is a nop PHY.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman
Add Keystone platform specific glue layer to support
USB3 Host mode.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Acked-by: Santosh Shilimkar santosh.shilim...@ti.com
Signed-off-by: WingMan Kwok w-kw...@ti.com
---
Here is the updated version of the series which addresses comments from
earlier version [1]. The lock in the isr is removed as per the discussion.
Series adds USB host support for Keystone SOCs. Keystone SOCs uses dwc3
hardware IP implementation. On Keystone II platforms, we use no-op phy
On 2013-12-09 19:21, Alan Stern wrote:
On Mon, 9 Dec 2013, Thomas Raschbacher wrote:
On 2013-12-09 16:25, Alan Stern wrote:
On Mon, 9 Dec 2013, Thomas Raschbacher wrote:
Regards
P.S.: i forgot to mention, that I run kernel 3.12.0
It looks like the problem is that your kernel was built
From: Michal Nazarewicz min...@mina86.com
Check gadget.quirk_ep_out_aligned_size to decide if buffer size requires
to be aligned to maxpacketsize of an out endpoint. ffs_epfile_io() needs
to pad epout buffer to match above condition if quirk is found.
Signed-off-by: Michal Nazarewicz
DWC3 requires epout to have buffer size aligned to MaxPacketSize value.
This patch sets necessary quirk for it.
Signed-off-by: David Cohen david.a.co...@linux.intel.com
---
drivers/usb/dwc3/gadget.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/dwc3/gadget.c
Hi,
These patches are a proposal to add gadget quirks in an immediate objective to
adapt f_fs when using DWC3 controller. But the quirk solution is generic and
can be used by other controllers to adapt gadget functions to their
non-standard restrictions.
This change is necessary to make
This patch moves all bitflags to the end of usb_gadget struct in order
to improve readability.
Signed-off-by: David Cohen david.a.co...@linux.intel.com
Acked-by: Michal Nazarewicz min...@mina86.com
---
include/linux/usb/gadget.h | 19 ++-
1 file changed, 10 insertions(+), 9
Due to USB controllers may have different restrictions, usb gadget layer
needs to provide a generic way to inform gadget functions to complain
with non-standard requirements.
This patch adds 'quirk_ep_out_aligned_size' field to struct usb_gadget
to inform when controller's epout requires buffer
From: Michal Nazarewicz min...@mina86.com
When endpoint changes (due to it being disabled or alt setting changed),
mimic the action as if the change happened after the request has been
queued, instead of retrying with the new endpoint.
Signed-off-by: Michal Nazarewicz min...@mina86.com
Cc: David
From: fre...@asix.com.tw
Date: Fri, 6 Dec 2013 17:58:18 +0800
From: Freddy Xin fre...@asix.com.tw
The AX88179_178A has a hardware feature that it can insert a 2-bytes pseudo
header in front of each received frame by setting the AX_RX_CTL_IPE bit.
This feature is used to let the IP header
On Mon, Dec 09, 2013 at 02:53:36PM +0100, Takashi Iwai wrote:
We've got regression reports that my previous fix for spurious wakeups
after S5 on HP Haswell machines leads to the automatic reboot at
shutdown on some machines. It turned out that the fix for one side
triggers another BIOS bug in
On Mon, Dec 09, 2013 at 10:52:33AM +0100, Marc Kleine-Budde wrote:
On 12/09/2013 10:07 AM, Peter Chen wrote:
On Mon, Dec 09, 2013 at 09:38:17AM +0100, Marc Kleine-Budde wrote:
On 12/09/2013 07:30 AM, Peter Chen wrote:
Some PHY bugs are fixed by IC logic, but these bits are not
enabled by
On Mon, Dec 09, 2013 at 09:20:08PM +0300, Sergei Shtylyov wrote:
Hello.
On 12/09/2013 09:31 AM, Peter Chen wrote:
After clear portsc.phcd, PHY needs 200us stable time for switch
32K clock to AHB clock.
Signed-off-by: Peter Chen peter.c...@freescale.com
---
dOn Tue, Dec 10 2013, David Cohen wrote:
Due to USB controllers may have different restrictions, usb gadget layer
needs to provide a generic way to inform gadget functions to complain
with non-standard requirements.
This patch adds 'quirk_ep_out_aligned_size' field to struct usb_gadget
to
Hi,
On Mon, Dec 09, 2013 at 05:17:03PM -0500, WingMan Kwok wrote:
+static void kdwc3_enable_irqs(struct dwc3_keystone *kdwc)
+{
+ u32 val;
+
+ val = kdwc3_readl(kdwc-usbss, USBSS_IRQENABLE_SET_0);
+ val = USBSS_IRQ_COREIRQ_EN;
this misses the | in |=. I can fix it up while
Hi,
On Mon, Dec 09, 2013 at 05:17:04PM -0500, WingMan Kwok wrote:
+ ret = usb_add_phy_dev(k_phy-usb_phy_gen.phy);
+ if (ret)
+ return ret;
+ k_phy-usb_phy_gen.phy.init = keystone_usbphy_init;
+ k_phy-usb_phy_gen.phy.shutdown = keystone_usbphy_shutdown;
this
On Mon, Dec 09, 2013 at 12:33:17AM -0800, 'Greg Kroah-Hartman' wrote:
On Sun, Dec 08, 2013 at 10:03:42PM -0600, Felipe Balbi wrote:
On Tue, Dec 03, 2013 at 08:27:58AM +0900, Jingoo Han wrote:
Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro
is not preferred.
On 12/10/2013 03:47 AM, WingMan Kwok wrote:
Add Keystone platform USB PHY driver support. Current main purpose
of this driver is to enable the PHY reference clock gate on the
Keystone SoC. Otherwise it is a nop PHY.
Cc: Santosh Shilimkar santosh.shilim...@ti.com
Cc: Felipe Balbi
On 12/09/2013 06:34 PM, Michal Nazarewicz wrote:
dOn Tue, Dec 10 2013, David Cohen wrote:
Due to USB controllers may have different restrictions, usb gadget layer
needs to provide a generic way to inform gadget functions to complain
with non-standard requirements.
This patch adds
This patch should fix the below compile warning:
drivers/usb/storage/protocol.c: In function 'usb_stor_access_xfer_buf':
drivers/usb/storage/protocol.c:155:22: warning: comparison of distinct
pointer types lacks a cast [enabled by default]
Reported-by: kbuild test robot fengguang...@intel.com
On Mon, Dec 09, 2013 at 07:35:19PM -0800, David Cohen wrote:
On 12/09/2013 06:34 PM, Michal Nazarewicz wrote:
dOn Tue, Dec 10 2013, David Cohen wrote:
Due to USB controllers may have different restrictions, usb gadget layer
needs to provide a generic way to inform gadget functions to
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