On Wed, Mar 18, 2015 at 03:04:31PM +0800, Li Jun wrote:
> On Wed, Mar 18, 2015 at 01:36:13PM +0800, Peter Chen wrote:
> > On Tue, Mar 17, 2015 at 10:37:47PM +0800, Li Jun wrote:
> > > Adds HNP polling timer when transits to host state, the OTG status request
> > > will be sent to peripheral after t
On Wed, Mar 18, 2015 at 03:49:46PM +0800, Li Jun wrote:
> On Wed, Mar 18, 2015 at 01:44:11PM +0800, Peter Chen wrote:
> > On Tue, Mar 17, 2015 at 10:37:49PM +0800, Li Jun wrote:
> > > If gadget with HNP polling support receives GetStatus request of otg
> > > status
> > > selector, it feedback to h
Adds HNP polling timer when transits to host state, the OTG status request
will be sent to peripheral after timeout, if host request flag is set, it will
switch to peripheral state, otherwise it will repeat HNP polling every 1.5s and
maintain the current session.
Signed-off-by: Li Jun
Change for
On Wed, Mar 18, 2015 at 01:54:40PM +0800, Peter Chen wrote:
> On Tue, Mar 17, 2015 at 10:37:52PM +0800, Li Jun wrote:
> > From: Li Jun
> >
> > Update HNP test procedure as HNP polling is supported.
> >
> > Signed-off-by: Li Jun
> > ---
> > Documentation/usb/chipidea.txt |9 -
> > 1
Hi Maxime, Jason, Andrew, Sebastian, Greg, Felipe, Mathias,
On 19/01/2015 14:01, Maxime Ripard wrote:
> The Armada 385 AP board has a USB3 port exposed that uses a GPIO to drive the
> VBUS line. Enable the needed drivers to support this.
>
> Signed-off-by: Maxime Ripard
applied on mvebu/dt
Tha
Two trivialities I failed the spot the first time.
On Tue, 2015-03-17 at 17:12 -0700, Tony Lindgren wrote:
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index 2962de2..c858c2b 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> +config PHY_DM816X_USB
> + tristate "TI
Le 17/03/2015 20:01, Alan Stern a écrit :
> On Tue, 17 Mar 2015, Boris Brezillon wrote:
>
>> The EHCI IP only needs the UTMI/UPLL (uclk) and the peripheral (iclk)
>> clocks to work properly. Remove the useless system clock (fclk).
>>
>> Avoid calling set_rate on the fixed rate UTMI/IPLL clock and
On Wed, Mar 18, 2015 at 12:16:22PM +0100, Nicolas Ferre wrote:
> Le 17/03/2015 20:01, Alan Stern a écrit :
> > On Tue, 17 Mar 2015, Boris Brezillon wrote:
> >
> >> The EHCI IP only needs the UTMI/UPLL (uclk) and the peripheral (iclk)
> >> clocks to work properly. Remove the useless system clock (f
Make selection between ULPI and UTMI+ interfaces possible by
providing definition for the bit in Global USB2 PHY
Configuration Register that controls it.
Signed-off-by: Heikki Krogerus
---
drivers/usb/dwc3/core.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/dwc3/core.h b/drive
Platforms that have configured DWC_USB3_HSPHY_INTERFACE with
value 3, i.e. UTMI+ and ULPI, need to inform the driver of
the actual HSPHY interface type with the property. "utmi" if
the interface is UTMI+ or "ulpi" if the interface is ULPI.
Signed-off-by: Heikki Krogerus
---
Documentation/devicet
We need to store it before phys are handled, so we can later
use it in ULPI interface support code.
Signed-off-by: Heikki Krogerus
---
drivers/usb/dwc3/core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 2bbab3d..c7
This allows dwc3_phy_setup() to be more useful later. There
is nothing preventing the PHY configuration registers from
being programmed early. They do not loose their context in
soft reset.
There are however other PHY related operations that should
be executed before the driver request handles to
So they are available when ULPI interface support is added.
Signed-off-by: Heikki Krogerus
---
drivers/usb/dwc3/core.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index c7734ed..104b236 100644
--- a/drivers/usb/dwc3/core
ULPI PHYs need to be bound to their controllers with a
lookup. This adds helpers that the ULPI drivers can use to
do both, the registration of the PHY and the lookup, at the
same time.
Signed-off-by: Heikki Krogerus
Cc: Kishon Vijay Abraham I
---
drivers/phy/ulpi_phy.h | 31
Registers DWC3's ULPI interface with the ULPI bus when it's
available.
Signed-off-by: Heikki Krogerus
---
drivers/usb/dwc3/Kconfig | 7
drivers/usb/dwc3/Makefile | 4 +++
drivers/usb/dwc3/core.c | 14
drivers/usb/dwc3/core.h | 14
drivers/usb/dwc3/ulpi.c | 91
TUSB1210 ULPI PHY has vendor specific register for eye
diagram tuning. On some platforms the system firmware has
set optimized value to it. In order to not loose the
optimized value, the driver stores it during probe and
restores it every time the PHY is powered back on.
Signed-off-by: Heikki Krog
So it can be called from other places later.
Signed-off-by: Heikki Krogerus
---
drivers/usb/dwc3/core.c | 46 ++
1 file changed, 30 insertions(+), 16 deletions(-)
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 104b236..921f181 10
On some BYT platforms the USB2 PHY needs to be put into
operational mode by the controller driver with GPIOs
controlling the PHYs reset and cs signals.
Signed-off-by: Heikki Krogerus
---
drivers/usb/dwc3/dwc3-pci.c | 36
1 file changed, 36 insertions(+)
diff
Major changes since v1:
- calling dwc3_phy_setup earlier and registering the ULPI interface there.
- new property to dwc3 for selecting the interface in case of UTMI+ and ULPI as
suggested by Felipe
- dwc3 soft reset before registration of the ULPI interface to sync the clocks
as suggested by
Definitions for Global USB2 PHY Vendor Control Register
bits. We will need them to access ULPI PHY registers later.
Signed-off-by: Heikki Krogerus
---
drivers/usb/dwc3/core.h | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index fdab7
UTMI+ Low Pin Interface (ULPI) is a commonly used PHY
interface for USB 2.0. The ULPI specification describes a
standard set of registers which the vendors can extend for
their specific needs. ULPI PHYs provide often functions
such as charger detection and ADP sensing and probing.
There are two ma
struct otg_fsm is the interface to the OTG state machine.
Document the input, output and internal state variables.
Definations are taken from Table 7-2 and Table 7-4 of
the USB OTG & EH Specification Rev.2.0
Re-arrange some of the members as per use case for more
clarity.
Signed-off-by: Roger Qu
Register with OTG core as part of usb_add_hcd() and
unregister from it in usb_remove_hcd().
For OTG device the HCD is actually started or stopped
from the OTG FSM.
Signed-off-by: Roger Quadros
---
drivers/usb/core/hcd.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff
These members are not used anywhere so remove them.
Signed-off-by: Roger Quadros
---
include/linux/usb/otg-fsm.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/include/linux/usb/otg-fsm.h b/include/linux/usb/otg-fsm.h
index b6ba1bf..176c4fc 100644
--- a/include/linux/usb/otg-fsm.h
+++ b
Register with the USB OTG core.
Use extcon framework to get VBUS/ID cable events and
kick the OTG state machine.
TODO:
- OTG driver ops to configure dwc3 otg core during role switches.
Signed-off-by: Roger Quadros
---
drivers/usb/dwc3/core.c | 101 +
Register with OTG core as part of usb_add_gadget_udc_release()
and unregister from it in usb_del_gadget_udc().
In the OTG use case we may not yet be in "b_peripheral"
state so we shouldn't allow starting the UDC till
OTG core says so.
Signed-off-by: Roger Quadros
---
drivers/usb/gadget/udc/udc-
The OTG core instantiates the OTG Finite State Machine
per OTG controller and manages starting/stopping the
host and gadget controllers based on the bus state.
It provides APIs for the following tasks
- Registering an OTG capable controller
- Registering Host and Gadget controllers to OTG core
-
This is the a_set_b_hnp_enable flag in the OTG state machine
diagram and must be set when the A-Host has successfully set
the b_hnp_enable feature of the OTG-B-Peripheral attached to it.
When this bit changes we kick our OTG FSM to make note of the
change and act accordingly.
Signed-off-by: Roger
Hi,
[NOTE: RFC only. Not for merge yet.]
This is an attempt to centralize OTG functionality in the kernel.
Still work in progress but I wanted to get an early feedback
to avoid major rework. :)
Why?:
Most of the OTG drivers have been dealing with the OTG state machine
themselves and there
The OTG state machine needs a mechanism to start and
stop the gadget controller. Add usb_gadget_start()
and usb_gadget_stop().
Signed-off-by: Roger Quadros
---
drivers/usb/gadget/udc/udc-core.c | 166 +++---
include/linux/usb/gadget.h| 3 +
2 files chang
To support OTG we want a mechanism to start and stop
the HCD from the OTG state machine. Add usb_start_hcd()
and usb_stop_hcd().
Signed-off-by: Roger Quadros
---
drivers/usb/core/hcd.c | 147
include/linux/usb/hcd.h | 2 +
2 files changed, 100
Check value returned by dwc3_gadget_run_stop() in suspend/resume
functions and propagate it to next layer.
Signed-off-by: Robert Baldyga
---
drivers/usb/dwc3/gadget.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gad
This patch adds extcon driver for Odroid U3, U3+ and X boards.
It recognizes type of USB cable connected to Odroid board basing on
two signal lines VBUS_DET and OTG_ID (the second one is present only
on Odroid U3+ board).
Following table of states presents relationship between this signals
and det
This patch introduces OTG support in DWC3 driver. OTG feature is responsible
for dynamic USB role switching (between host and peripheral modes) based
on detected cable type.
Each role switch causes complete core reinitialization. In peripheral
mode UDC device is activated using VBUS session contro
These hardware has LPM and we want to use it. This change fixes
problem with VBUS power on after switching to host mode.
Signed-off-by: Robert Baldyga
---
arch/arm/boot/dts/exynos5420.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm/boot/dt
Exynos platform doesn't have hardware OTG support in DWC3 block, so we
need to supply custom mechanism of notification about cable change. For
this purpose we use extcon framework - it would allow to use this code
with each Exynos board equipped with cable detecting hardware which has
its extcon dr
Add missing definitions of registers used for OTG handling.
Signed-off-by: Robert Baldyga
---
drivers/usb/dwc3/core.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index aa2c615..be29cb2 100644
--- a/drivers/usb/dwc3/core.h
Gadget driver needs to be registered in OTG to perform dynamic
role switching.
Signed-off-by: Robert Baldyga
---
drivers/usb/dwc3/gadget.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index b0c1ab5..c5a7cf1 100644
--- a
This patch adds OTG initialization in DWC3 core. This finally enables
OTG feature if selected operation mode is "otg". It also initializes
and deinitialized OTG in suspend/resume functions.
After this changes DWC3 core is uninitialized by default in OTG mode.
The dwc3_core_init() function is calle
This patch causes that XHCI device is not added automatically in
dwc3_host_init() if we run in OTG mode. OTG handling code registers
XHCI device when USB host cable is detected.
Signed-off-by: Robert Baldyga
---
drivers/usb/dwc3/host.c | 10 ++
1 file changed, 6 insertions(+), 4 deletion
It's needed for proper role switching in OTG mode. Without this change
ep0 fails to be enabled after switching to gadget mode.
Signed-off-by: Robert Baldyga
---
arch/arm/boot/dts/exynos5420.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi
b/arch/arm
Make usbdrd3 an extcon client to enable OTG role switching feature.
Signed-off-by: Robert Baldyga
---
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index
These functions will be used to reinitialize core during OTG
role switching, so we need ability to call them from OTG code.
Signed-off-by: Robert Baldyga
---
drivers/usb/dwc3/core.c | 4 ++--
drivers/usb/dwc3/core.h | 2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/u
This feature allows to use OTG feature with devices which doesn't support
hardware DWC3 OTG. In such situation we can supply own mechanism of cable
detection.
This code is inspired by DWC3 driver from Hardkernel Linux sources [1].
[1] https://github.com/hardkernel/linux.
Signed-off-by: Robert Ba
Hello,
This patchset introduces OTG feature in DWC3 DRD driver. This allows
to change dynamically between host and peripheral mode depending on
detected USB cable type.
DWC3 driver behaviour is changed only in situation when selected operation
mode (dr_mode) is "otg", and hardware OTG support is
This patch adds ep0 enabling and disabling in dwc3_gadget_run_stop().
It's because this function now it used not only for pullup but also
for VBUS session control - feature used by OTG code during role switching.
In case of role switching ep0 have to be reinitialized, so doing it inside
dwc3_gadget
This patch adds documentation for binding of extcon-odroid-usbotg device
which is using extcon subsystem. This driver allows to detect type of
cable connected to micro-USB port on Odroid boards.
Signed-off-by: Robert Baldyga
---
.../devicetree/bindings/extcon/extcon-odroid-usbotg.txt | 16 +
Add extcon device detecting USB cable type.
Signed-off-by: Robert Baldyga
---
arch/arm/boot/dts/exynos5422-odroidxu3.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts
b/arch/arm/boot/dts/exynos5422-odroidxu3.dts
index a519c8
This patch adds .vbus_session callback to usb_gadget_ops. VBUS session
handling is necessary for OTG mode. VBUS control is performed during
OTG finite-state machine state switching.
Signed-off-by: Robert Baldyga
---
drivers/usb/dwc3/core.h | 1 +
drivers/usb/dwc3/gadget.c | 28 +++
This change is part of preparation for OTG feature. Event buffers setup
and cleanup are parts of core_init/exit process, so when core_init/exit
will be called in many places it would be better to have entire procedure
inside these functions instead of calling event_buffers_setup/cleanup
in each pla
Remove unused cases from switch-case statement and place
dwc3_event_buffers_cleanup() function outside switch-case
as it's called in each case anyway.
Signed-off-by: Robert Baldyga
---
drivers/usb/dwc3/core.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/usb
Hello.
On 3/18/2015 3:40 PM, Heikki Krogerus wrote:
ULPI PHYs need to be bound to their controllers with a
lookup. This adds helpers that the ULPI drivers can use to
do both, the registration of the PHY and the lookup, at the
same time.
Signed-off-by: Heikki Krogerus
Cc: Kishon Vijay Abraha
Hello.
On 3/18/2015 5:04 PM, Robert Baldyga wrote:
Remove unused cases from switch-case statement and place
dwc3_event_buffers_cleanup() function outside switch-case
as it's called in each case anyway.
Signed-off-by: Robert Baldyga
---
drivers/usb/dwc3/core.c | 8 ++--
1 file changed
* Paul Bolle [150318 04:13]:
> Two trivialities I failed the spot the first time.
>
> On Tue, 2015-03-17 at 17:12 -0700, Tony Lindgren wrote:
> > diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> > index 2962de2..c858c2b 100644
> > --- a/drivers/phy/Kconfig
> > +++ b/drivers/phy/Kconfig
>
On Mon, Mar 16, 2015 at 09:35:34AM +0800, Peter Hung wrote:
> Hello,
>
> Greg KH 於 2015/3/15 下午 05:25 寫道:
> >Why did you cc: the linux-usb@vger mailing list on these? Don't you
> >mean linux-serial@vger?
> >
>
> Sorry for my fault. Should I resend it with correct mail-list with V2 ??
> or just s
Hi Tony,
On Wednesday 18 March 2015 05:42 AM, Tony Lindgren wrote:
Add a minimal driver for dm816x USB. This makes USB work on dm816x
without any other changes needed as it can use the existing musb_dsps
glue layer for the USB controller.
Note that this phy is different from dm814x and am335x.
* Kishon Vijay Abraham I [150318 08:09]:
> On Wednesday 18 March 2015 05:42 AM, Tony Lindgren wrote:
> >+
> >+/*
> >+ * We have phy-core.c handle pm_runtime calls for us. We implement
> >+ * these functions for phy-core.c to keep track of power_count.
> >+ * Note that we may want to remove these e
> -Original Message-
> From: John Youn [mailto:john.y...@synopsys.com]
> Sent: Wednesday, March 18, 2015 3:33 AM
> To: Kaukab, Yousaf; linux-usb@vger.kernel.org; ba...@ti.com;
> john.y...@synopsys.com
> Cc: Herrero, Gregory; r.bald...@samsung.com;
> dingu...@opensource.altera.com; zhangfe
Change from using the __raw IO accesors to the endian agnostic versions
of readl/writel_relaxed when not on AVR32. This fixes issues with running
big endian on ARMv7.
Signed-off-by: Ben Dooks
--
CC: Nicolas Ferre
CC: Felipe Balbi
CC: Greg Kroah-Hartman
CC: linux-usb@vger.kernel.org
---
driver
2015-03-11 5:30 GMT+08:00 Felipe Balbi :
> On Sun, Feb 22, 2015 at 12:25:35PM +0800, Sneeker Yeh wrote:
>> These patches add support for XHCI compliant Host controller found
>> on Fujitsu Socs, and are based on http://lwn.net/Articles/629162/
>> The first patch is to add Fujitsu glue layer of Synop
On Sat, Feb 07, 2015 at 11:42:44PM +0100, Bas Peters wrote:
> This patch cleans up a variety of checkpatch errors:
>
> Bunch of space issues.
> C99 comments converted to /* */ format.
> Some switch statement indentations.
> "foo * bar" -> "foo *bar"
>
> Signed-off-by: Bas
On Wed, Mar 18, 2015 at 05:46:44PM +0300, Sergei Shtylyov wrote:
> Hello.
>
> On 3/18/2015 3:40 PM, Heikki Krogerus wrote:
>
> >ULPI PHYs need to be bound to their controllers with a
> >lookup. This adds helpers that the ULPI drivers can use to
> >do both, the registration of the PHY and the look
Hi Heikki,
On Wed, Mar 18, 2015 at 02:40:30PM +0200, Heikki Krogerus wrote:
> On some BYT platforms the USB2 PHY needs to be put into
> operational mode by the controller driver with GPIOs
> controlling the PHYs reset and cs signals.
>
> Signed-off-by: Heikki Krogerus
> ---
> drivers/usb/dwc3/d
Hi,
On Wed, Mar 18, 2015 at 02:40:21PM +0200, Heikki Krogerus wrote:
>
> Major changes since v1:
> - calling dwc3_phy_setup earlier and registering the ULPI interface there.
> - new property to dwc3 for selecting the interface in case of UTMI+ and ULPI
> as
> suggested by Felipe
> - dwc3 soft
On Wed, Mar 18, 2015 at 10:12:13AM -0700, David Cohen wrote:
> Hi,
>
> On Wed, Mar 18, 2015 at 02:40:21PM +0200, Heikki Krogerus wrote:
> >
> > Major changes since v1:
> > - calling dwc3_phy_setup earlier and registering the ULPI interface there.
> > - new property to dwc3 for selecting the inter
* Roger Quadros [150318 07:00]:
> Hi,
>
> [NOTE: RFC only. Not for merge yet.]
>
> This is an attempt to centralize OTG functionality in the kernel.
> Still work in progress but I wanted to get an early feedback
> to avoid major rework. :)
>
> Why?:
>
>
> Most of the OTG drivers have bee
Hello.
On 03/18/2015 07:54 PM, David Cohen wrote:
ULPI PHYs need to be bound to their controllers with a
lookup. This adds helpers that the ULPI drivers can use to
do both, the registration of the PHY and the lookup, at the
same time.
Signed-off-by: Heikki Krogerus
Cc: Kishon Vijay Abraham
The USB3503 driver exposes the refclk-frequency DT property to allow users to
specify the rate of the clock provided on the device's REFCLK. This is
necessary for the driver to correctly configure the REF_SEL and INT_N pins.
Currently the driver only pays attention to refclk-frequency if the refclk
This is necessary to set REF_SEL appropriately in uses where refclk is
always available.
Signed-off-by: Ben Gamari
---
drivers/usb/misc/usb3503.c | 47 +++---
1 file changed, 24 insertions(+), 23 deletions(-)
diff --git a/drivers/usb/misc/usb3503.c b/driv
My apologies for the double-post; the previous patch lacked an Acked-by and
several important recipients. Keep me on the CC list as I'm not subscribed to
the linux-usb list.
The USB3503 driver exposes the refclk-frequency DT property to allow users to
specify the rate of the clock provided on the
This is necessary to set REF_SEL appropriately in uses where refclk is
always available.
Signed-off-by: Ben Gamari
Acked-by: Marek Szyprowski
---
drivers/usb/misc/usb3503.c | 47 +++---
1 file changed, 24 insertions(+), 23 deletions(-)
diff --git a/drive
On 15-03-18 08:28 AM, Greg Kroah-Hartman wrote:
On Wed, Mar 18, 2015 at 12:16:22PM +0100, Nicolas Ferre wrote:
Le 17/03/2015 20:01, Alan Stern a écrit :
On Tue, 17 Mar 2015, Boris Brezillon wrote:
The EHCI IP only needs the UTMI/UPLL (uclk) and the peripheral (iclk)
clocks to work properly. R
On Wed, 18 Mar 2015, Roger Quadros wrote:
> To support OTG we want a mechanism to start and stop
> the HCD from the OTG state machine. Add usb_start_hcd()
> and usb_stop_hcd().
>
> Signed-off-by: Roger Quadros
There are a few problems in this proposed patch.
> +int usb_start_hcd(struct usb_hcd
* Alan Stern [150318 12:50]:
> On Wed, 18 Mar 2015, Roger Quadros wrote:
>
> > To support OTG we want a mechanism to start and stop
> > the HCD from the OTG state machine. Add usb_start_hcd()
> > and usb_stop_hcd().
> >
> > Signed-off-by: Roger Quadros
>
> There are a few problems in this prop
[once more, without Gmail being stupid]
Nice! This also solves problems with exhausting coherent DMA memory
when you plug too many devices in.
On Tue, Mar 17, 2015 at 2:54 AM, Mian Yousaf Kaukab
wrote:
> From: Gregory Herrero
>
> Align buffer must be allocated using kmalloc since irqs are disab
On Wed, 2015-03-18 at 14:40 +0200, Heikki Krogerus wrote:
> --- a/drivers/usb/dwc3/Kconfig
> +++ b/drivers/usb/dwc3/Kconfig
> @@ -11,6 +11,13 @@ config USB_DWC3
>
> if USB_DWC3
>
> +config USB_DWC3_ULPI
> + bool "Register ULPI PHY Interface"
> + depends on USB_ULPI_BUS=y
USB_ULPI_BUS
On Wed, 2015-03-18 at 14:40 +0200, Heikki Krogerus wrote:
> --- a/drivers/usb/common/Makefile
> +++ b/drivers/usb/common/Makefile
> @@ -7,3 +7,4 @@ usb-common-y+= common.o
> usb-common-$(CONFIG_USB_LED_TRIG) += led.o
>
> obj-$(CONFIG_USB_OTG_FSM) += usb-otg-fsm.o
> +obj-$(CO
On Wed, Mar 18, 2015 at 05:57:32PM +0800, Li Jun wrote:
> On Wed, Mar 18, 2015 at 01:54:40PM +0800, Peter Chen wrote:
> > On Tue, Mar 17, 2015 at 10:37:52PM +0800, Li Jun wrote:
> > > From: Li Jun
> > >
> > > Update HNP test procedure as HNP polling is supported.
> > >
> > > Signed-off-by: Li Ju
On Thu, Mar 19, 2015 at 08:00:35AM +0800, Peter Chen wrote:
> On Wed, Mar 18, 2015 at 05:57:32PM +0800, Li Jun wrote:
> > On Wed, Mar 18, 2015 at 01:54:40PM +0800, Peter Chen wrote:
> > > On Tue, Mar 17, 2015 at 10:37:52PM +0800, Li Jun wrote:
> > > > From: Li Jun
> > > >
> > > > Update HNP test
Looks like dm81xx can only do 32-bit fifo reads like am35x. Let's set
up musb-dsps with a custom read_fifo function based on the compatible
flag.
Otherwise we can get the following errors when starting dhclient on a
asix USB Ethernet adapter:
asix 2-1:1.0 eth2: asix_rx_fixup() Bad Header Length 0
It is used to configure the ITC (in register USBCMD) value
for gadget mode.
Signed-off-by: Peter Chen
---
Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt
b/Documentation/devicetree
Hi all,
In this patch set, I add some interfaces for tuning the performance
of chipidea usb driver. With this set, the USB performance can be improved
at some user cases with suitable parameters. The main changes:
- Interface to tune interrupt threshold control, and set
'Immediate' for default va
ITC (Interrupt Threshold Control) is used to set the maximum rate at which
the host/device controller will issue interrupts. The default value is 8 (1ms)
for it. EHCI core will modify it to 1, but device mode keeps it as default
value.
In some use cases like Android ADB, it only has one usb reques
The chipidea IP has different limitations for host and device mode,
see below errata, we may need to enable SDIS(Stream Disable Mode)
at host mode. But we don't want it at device mode at some situations.
TAR 9000378958
Title: Non-Double Word Aligned Buffer Address Sometimes Causes Host to Hang on
Stream mode enable is known for better performance, this stream mode
enable patch has been passed with stress tests at device mode for
imx6sl and imx6sx, and no issue is found.
Signed-off-by: Peter Chen
---
drivers/usb/chipidea/ci_hdrc_imx.c | 14 +-
1 file changed, 9 insertions(+),
It is used to configure controller parameters according to
platform data, like speed, interrupt threshold, stream mode, etc.
Signed-off-by: Peter Chen
---
drivers/usb/chipidea/ci.h | 2 ++
drivers/usb/chipidea/core.c | 57 +++--
drivers/usb/chipidea/hos
The users can change it through dts or platform data if they
want to change the default value.
Signed-off-by: Peter Chen
---
drivers/usb/chipidea/bits.h | 3 +++
drivers/usb/chipidea/core.c | 18 ++
include/linux/usb/chipidea.h | 2 ++
3 files changed, 23 insertions(+)
diff
With this setting and AHBBRST at SBUSCFG as "Incremental burst of
unspecified length", each unburst size can be taken as one single transfer.
It is benefit for unburst size transfer.
Signed-off-by: Peter Chen
---
drivers/usb/chipidea/usbmisc_imx.c | 12 ++--
1 file changed, 10 insertions
It can improve the USB performance when choosing larger
burst size at some systems (bus size is larger), there is
no side effect if this burst size is larger than bus size.
Signed-off-by: Peter Chen
---
arch/arm/boot/dts/imx6qdl.dtsi | 8
arch/arm/boot/dts/imx6sl.dtsi | 6 ++
arch/
The user can adjust it through dts or other platform interfaces.
Signed-off-by: Peter Chen
---
drivers/usb/chipidea/bits.h | 4
drivers/usb/chipidea/ci.h| 1 +
drivers/usb/chipidea/core.c | 39 +++
include/linux/usb/chipidea.h | 2 ++
4 files cha
It is used to change ahb burst configuration for platforms.
Signed-off-by: Peter Chen
---
Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt
b/Documentation/devicetree/bindings/usb/ci
After setting ahb burst configuration as 0, we can increase tx/rx
burst size, it will improve the USB performance
Signed-off-by: Peter Chen
---
arch/arm/boot/dts/imx6qdl.dtsi | 4
arch/arm/boot/dts/imx6sl.dtsi | 3 +++
arch/arm/boot/dts/imx6sx.dtsi | 3 +++
3 files changed, 10 insertions(
It is used to override the default setting for burst size, changing
burst size takes effect only when the SBUSCFG.AHBBRST = 0.
Signed-off-by: Peter Chen
---
Documentation/devicetree/bindings/usb/ci-hdrc-imx.txt | 6 ++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bi
On Wed, Mar 18, 2015 at 03:55:55PM +0200, Roger Quadros wrote:
> To support OTG we want a mechanism to start and stop
> the HCD from the OTG state machine. Add usb_start_hcd()
> and usb_stop_hcd().
Hi Roger,
You may not need to create another pair of hcd APIs for doing
it, you can use usb_add_hcd
On Wed, 18 Mar 2015, Tony Lindgren wrote:
> > If the host controller is started more than once, you will end up
> > unregistering and re-registering the root hub. The device core does
> > not allow this. Once a device has been unregistered, you must not try
> > to register it again -- you have t
Hi Robert,
Did you test the extcon-odroid-otg driver on Odroid-U3?
Thanks,
Chanwoo Choi
On 03/18/2015 11:04 PM, Robert Baldyga wrote:
> Hello,
>
> This patchset introduces OTG feature in DWC3 DRD driver. This allows
> to change dynamically between host and peripheral mode depending on
> detecte
* Alan Stern [150318 18:51]:
> On Wed, 18 Mar 2015, Tony Lindgren wrote:
>
> > > If the host controller is started more than once, you will end up
> > > unregistering and re-registering the root hub. The device core does
> > > not allow this. Once a device has been unregistered, you must not tr
A host is required to use the GetStatus command, with wIndex set to the OTG
status selector(F000H) to request the host request flag from the peripheral.
Acked-by: Peter Chen
Signed-off-by: Li Jun
---
include/uapi/linux/usb/ch9.h |2 ++
1 file changed, 2 insertions(+)
diff --git a/include/u
Set host_request_flag if the current peripheral wants to take host role
via setting a_bus_req or b_bus_req by user application.
Acked-by: Peter Chen
Signed-off-by: Li Jun
---
drivers/usb/chipidea/otg_fsm.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drive
Enable HNP polling support for chipidea gadget when otg fsm init.
Acked-by: Peter Chen
Signed-off-by: Li Jun
---
drivers/usb/chipidea/otg_fsm.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index 2ec90dc..82b1e23 100644
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