Updates to 2sc and additions to the 3500
Anders Berg (12):
net: lsi_acp_net: Added new string to DT match
ARM: dts: axxia: Corrected IRQ for memory contollers
ARM: axxia: Support MSI on both PCIe controllers
i2c: axxia: Minor cleanup (cosmetic)
i2c: axxia: Report spurious IRQ
i2c:
From: Anders Berg anders.b...@lsi.com
The interrupt numbers for the memory controllers was wrong (conflicting with
assigned range for PCI MSI. This would cause a device using MSI to fail to
request its IRQ.
Signed-off-by: Anders Berg anders.b...@lsi.com
---
arch/arm/boot/dts/axm55xx.dts |4
From: Anders Berg anders.b...@avagotech.com
Changed the initial transfer size on block reads from 1 to
I2C_SMBUS_BLOCK_MAX. The size is adjusted when the first byte (block
length) is received. Having the initial size set to 1 could cause the
controller to stop the transfer after the block length
From: Anders Berg anders.b...@avagotech.com
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
arch/arm/mach-axxia/pci.c |8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-axxia/pci.c b/arch/arm/mach-axxia/pci.c
index 0f94403..ae6eaf8 100644
---
From: Anders Berg anders.b...@avagotech.com
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/gpio/gpio-pl061.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c
index 9d35136..3d0e9fc 100644
---
From: Anders Berg anders.b...@avagotech.com
We must not call the ncr_write function to unmask interrupts with
the memory controller interrupt enabled, as this could cause the ISR to
be invoked before ncr_write has released the lock used to serialize
register accesses.
To avoid this, temporarily
From: Anders Berg anders.b...@avagotech.com
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/spi/spi-pl022.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 1204d69..12b925b 100644
---
From: John Jacques john.jacq...@lsi.com
Also added the 6th Core to the Default 3500 Device Tree
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/powerpc/boot/dts/acp342x.dts | 347 +++--
arch/powerpc/boot/dts/acp344x.dts | 164 --
From: Anders Berg anders.b...@avagotech.com
Added module parameter panic_on_fatal which when set will cause the driver
to call panic() when an uncorrectable ECC error is detected.
Signed-off-by: Anders Berg anders.b...@avagotech.com
---
drivers/misc/lsi-smmon.c | 27
From: John Jacques john.jacq...@lsi.com
Signed-off-by: John Jacques john.jacq...@lsi.com
---
drivers/mtd/nand/lsi_acp_nand.c | 171 +--
1 file changed, 93 insertions(+), 78 deletions(-)
diff --git a/drivers/mtd/nand/lsi_acp_nand.c
From: John Jacques john.jacq...@lsi.com
Signed-off-by: John Jacques john.jacq...@lsi.com
---
arch/powerpc/sysdev/ppc4xx_soc.c | 73 +-
1 file changed, 72 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c
On 14-07-08 10:22 AM, Charlie Paul wrote:
From: John Jacques john.jacq...@lsi.com
The change is larger than I'd expect to add some new support. Is there a mix
of cleanups and new support in this change ? That's what it looks like.
Bruce
Signed-off-by: John Jacques john.jacq...@lsi.com
---
On 14-07-08 10:22 AM, Charlie Paul wrote:
From: John Jacques john.jacq...@lsi.com
When we do a reset (core, not chip or system), the core that is doing the reset
has to
tell all the other cores to reset. To do this, we call
smp_call_function_single().
In this case the function specified in
13 matches
Mail list logo