From: Abhishek Paliwal
From: David Daney
The wide multiplier is twice as wide, so we need to save twice as much
state. Detect the multiplier type (CPU type) at start up and install
model specific handlers.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
arch/mips/cavium-octe
From: Abhishek Paliwal
Add sysfs support for CPU power throttling.
Abhishek Paliwal (1):
MIPS: OCTEON: Add sysfs support for CPU power throttling.
arch/mips/cavium-octeon/Makefile| 1 +
arch/mips/cavium-octeon/octeon-power-throttle.c | 394
2 files
From: Abhishek Paliwal
From: David Daney
There is no FAU on this SoC.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
arch/mips/cavium-octeon/setup.c | 18 ++
arch/mips/include/asm/octeon/octeon-model.h | 3 +++
2 files changed, 13 insertions(+),
From: Abhishek Paliwal
From: David Daney
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
arch/mips/cavium-octeon/Makefile| 1 +
arch/mips/cavium-octeon/octeon-power-throttle.c | 394
2 files changed, 395 insertions(+)
create mode 100
From: Abhishek Paliwal
From: David Daney
They are mostly the same as previous OCTEON models, but we need to
enable them for the OCTEON III CPUs.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
arch/mips/cavium-octeon/setup.c | 38
arc
From: Abhishek Paliwal
From: Aaron Williams
Currently there is no easy way to map a device tree node to a memory
accessor function for devices like I2C EEPROMs. For example, the Vitesse
vsc848x 10G PHY driver needs to be able to use the I2C at24 serial EEPROM
memory accessor function in order t
From: Abhishek Paliwal
From: David Daney
... in order to keep all SMP related code together.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
arch/mips/cavium-octeon/setup.c | 7 ---
arch/mips/cavium-octeon/smp.c | 6 ++
arch/mips/include/asm/octeon/octeo
From: Abhishek Paliwal
From: David Daney
probe 4 mdio devices from device tree as support new models.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
arch/mips/cavium-octeon/octeon-platform.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git
From: Abhishek Paliwal
From: David Daney
When we run as a virtualized guest kernel, the CPU is disassociated
from the OCTEON SoC's L2 cache, so we move the corresponding code to a
SoC specific place. This allows us to share c-octeon.c between both
Normal and VM cases.
Signed-off-by: David Dan
From: Abhishek Paliwal
From: David Daney
cn78XX has a different interrupt architecture, so we have to manage the
interrupts a little differently.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
drivers/i2c/busses/i2c-octeon.c | 172 +++-
1
From: Abhishek Paliwal
Updated GPIO, I2C drivers to work on Octeon3.
Updated at24 driver to work on Octeon3 by adding of-memory-accessor for parsing
device tree for SPI EEPROM devices.
Updated perf utility to work on cn78xx hardware.
Save/Restore wide multiplier registers switching context.
Ab
From: Abhishek Paliwal
From: Aaron Williams
The at24 module will now register its memory accessor functions with its
device tree entry so that other modules may call these functions based on
the device tree node.
Signed-off-by: Aaron Williams
Signed-off-by: Leonid Rosenboim
Signed-off-by: Ab
From: Abhishek Paliwal
From: David Daney
... to allow interaction with cvmx-twsi code.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
arch/mips/include/asm/octeon/octeon.h | 2 ++
drivers/i2c/busses/i2c-octeon.c | 28
2 files changed, 30 i
From: Abhishek Paliwal
From: David Daney
Combined several changes:
Add workaround for chips with broken irqs.
Use High Level Controller when possible.
Retry more situations where arbitration is lost.
Clean up resource allocation code.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
From: Abhishek Paliwal
From: David Daney
The addresses of the GPIO_BIT_CFG registers have a different layout on
cn78XX.
Define OF_GPIO_OPEN_DRAIN flag for Open Drain outputs.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
drivers/gpio/gpio-octeon.c | 50
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