AMD8111: IDE controller at PCI slot 01:04.1
AMD8111: chipset revision 3
AMD8111: not 100% native mode: will probe irqs later
AMD8111: neither IDE port enabled (BIOS)
So you need to add two lines in the MB Config.lb
device pci 1.6 off end
+
in the wiki, you said
At LANL, we are building a new 'no moving parts' 16-node cluster to
demonstrate this capability.
only linuxbios + bproc there?
what's MB?
YH
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did you use CONFIG_OPTION_ROM_RUN
CONFIG_VGA_CONSOLE?
You need
1. set that to get output from linuxbios.
2. Also you need to set DIRECT_VGA and KEY_BOARD in Etherboot to get
out put from that.
3. If you need kernel message you need to use console=tty0
console=ttyS0... with mkelfimage.
YH
On Apr
So you need to add one entry in flash_enable.c
static FLASH_ENABLE enables[] = {
{0x1039, 0x0630, sis630, enable_flash_sis630},
{0x8086, 0x2480, E7500, enable_flash_e7500}, // should use SB name
--- add one entry to you device id
{0x8086, 0x24d0, ICH5ER,
which MB?
YH
On Mon, 21 Mar 2005 17:58:39 +0300,
[EMAIL PROTECTED] wrote:
While booting Linux Video.S initializes video, but
LinuxBios skips this and jumps at start_kernel()
I compiled kernel with standard\serial (dumb) support option
So, I have black monitor, but serial console works
in the MB Config.lb you need add
device pci 1.6 off end
+register ide0_enable = 1
+register ide1_enable = 1
YH
On Wed, 16 Mar 2005 09:17:39 -0800 (PST), Jeff Stevens
[EMAIL
if you have two non coherent ht device in the same ht chain. you
need to assign different unit id value to it.
YH
On Tue, 15 Mar 2005 14:50:48 -0500, [EMAIL PROTECTED]
[EMAIL PROTECTED] wrote:
Hello,
In the file /freebios2/src/northbridge/amd/amdk8/incoherent_ht.c, they are
Why just use one CF disk + IDE interface?
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Monday, March 14, 2005 7:58 AM
To: Thomas Wehrspann
Cc: linuxbios@clustermatic.org
Subject: Re: Looking for advise for DiskOnChip Tyan s2850 setup
On
Ollie,
Please check it.
diff -r freebios2/src/devices/emulator/pcbios/pcibios.c
../freebios2/src/devices/emulator/pcbios/pcibios.c
19c19
X86_EDX = 'P' | 'C' 8 | 'I' | ' ' 24;
---
X86_EDX = 'P' | 'C' 8 | 'I' 16 | ' ' 24;
someone called Liu Tao seems work it out several month ago. Please search
the mail list to talk to him.
YH
-Original Message-
From: Jeff Stevens [mailto:[EMAIL PROTECTED]
Sent: Thursday, March 10, 2005 7:39 AM
To: linuxbios@clustermatic.org
Subject: LinuxBIOS + Etherboot using
are you sure?
It's using type I/II card instead of CF IDE connecter.
YH
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Thursday, March 10, 2005 8:41 AM
To: Dave Olsen
Cc: linuxbios@clustermatic.org
Subject: Re: LinuxBios support for the ELAN SC520
So you mean We should make the ADLO to understand the linuxbios table
like Etherboot and FILO?
YH
On 08 Mar 2005 23:17:04 -0700, Eric W. Biederman ebiederman@lnxi.com wrote:
yhlu [EMAIL PROTECTED] writes:
1. LinuxBIOS need to pass the position pirq table to loader.s --- put
that in CMOS
I plan to put the ADLO and BOCHS into the Etherboot and just like FILO
in the Etherboot. SO I don't need to handle elf header stuff
Is it a good way?
YH
On Wed, 9 Mar 2005 09:18:08 -0800, yhlu [EMAIL PROTECTED] wrote:
So you mean We should make the ADLO to understand the linuxbios table
Ron,
if remove FreeBSD's dependence on BIOS calls. can we move pci bus
routine from Linux Kernel to them?
Is any license problem with that?
YH
On Wed, 9 Mar 2005 09:23:27 -0800, yhlu [EMAIL PROTECTED] wrote:
I plan to put the ADLO and BOCHS into the Etherboot and just like FILO
So need to make shadowing work in V2 before make ADLO working...?
which region?
YH
On 07 Mar 2005 21:34:35 -0700, Eric W. Biederman ebiederman@lnxi.com wrote:
Richard Smith [EMAIL PROTECTED] writes:
On Fri, 04 Mar 2005 15:37:31 -0600, Bari Ari [EMAIL PROTECTED] wrote:
. I also tried
changing the LOG_LEVEL in the amd quartet, compiled
it, and it didn't work either.
Thanks,
Jeff Stevens
--- yhlu [EMAIL PROTECTED] wrote:
How about Tyan s4882 in your compile environment? It
should be OK.
Please try to set LOG_LEVEL in your MB Config to 7.
YH
Then you need to set up one CVS server local to use it...
On Mon, 07 Mar 2005 19:58:33 -0800, Nathanael D. Noblet
[EMAIL PROTECTED] wrote:
So I downloaded the cvs snapshot referenced from the new wiki. It seems
to be a copy of the repository, and not a checkout.(files are .v ) with
all sorts
Can we put the server in US instead of EU?
YH
On Tue, 8 Mar 2005 07:23:50 -0700 (MST), Ronald G. Minnich
rminnich@lanl.gov wrote:
On Tue, 8 Mar 2005, Stefan Reinauer wrote:
We could either use pqm or add ssh keys for each commiter. How many are
there currently?
I think maybe 8 or
Server in US would be faster to access in US. and the LinuxBIOS
version should be done linuxbios.org
YH
On Tue, 8 Mar 2005 13:57:55 -0700 (MST), Ronald G. Minnich
rminnich@lanl.gov wrote:
On Tue, 8 Mar 2005, yhlu wrote:
Can we put the server in US instead of EU?
I'm afraid
why does the Linux kernel use bitkeeper?
YH
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Tuesday, March 08, 2005 1:09 PM
To: linuxbios@clustermatic.org
Subject: we need to sequence this
we need a 'controlled shutdown' of the cvs project so we
:
Richard Smith [EMAIL PROTECTED] writes:
On Tue, 8 Mar 2005 09:53:03 -0800, yhlu [EMAIL PROTECTED] wrote:
So need to make shadowing work in V2 before make ADLO working...?
which region?
0xf - 0xf and 0xc- 0xc. Look at util/ADLO/loader.s
That shows you the ranges
While use ADLO to boot HD, the kernel can not found mptable
ootdata ok (command line is root=/dev/hda2 console=tty0
console=ttyS0,115200 splash=silent apic)
Linux version 2.6.11-rc4 ([EMAIL PROTECTED]) (gcc version 3.3.3 (SuSE Linux))
#2 SMP Fri Feb 18 15:15:37 PST 2005
BIOS-provided physical RAM
be copied by LinuxBIOS, but should still need let
ADLO know the dev and fun of that .--- put that in CMOS?
4. mptable is alredy in the RAM.
Any suggestion about 1 and 2.
YH
On 08 Mar 2005 20:01:48 -0700, Eric W. Biederman ebiederman@lnxi.com wrote:
yhlu [EMAIL PROTECTED] writes:
LinuxBIOS
ADLO need to use CMOS to pass ram range at 1MB to BOCHS.
0x30, 0x31, 0x34, 0x35.
So it would be
[384, 400), [416, 432). it will confilt with cmos.layout.
why use that position?
YH
On Tue, 8 Mar 2005 19:27:32 -0800, yhlu [EMAIL PROTECTED] wrote:
1. LinuxBIOS need to pass the position pirq
How about Tyan s4882 in your compile environment? It should be OK.
Please try to set LOG_LEVEL in your MB Config to 7.
YH
On Mon, 7 Mar 2005 09:06:42 -0700 (MST), Ronald G. Minnich
rminnich@lanl.gov wrote:
On Mon, 7 Mar 2005, Jeff Stevens wrote:
I'm sorry, I was wrong. The AMD
depends if you can get enough Info about MB and chipset.
Anyway SB is easier than NB
YH
On Mon, 7 Mar 2005 16:42:43 +1100 (EST), Geoffrey McRae
[EMAIL PROTECTED] wrote:
I would like the:
Asus K8N-E Delux Please
I have a lan cafe with 40 of these machines in it, would be nice to be
where is the ADLO latest code and doc?
YH
On Fri, 04 Mar 2005 14:15:47 -0600, Bari Ari [EMAIL PROTECTED] wrote:
Richard Smith wrote:
Anyone tried LinuxBIOS with freeBSD?
I talked to freebsd guys about it. Freebsd makes BIOS calls, so that would
need to be fixed.
That or see if
All,
Please email me if you are using LinuxBIOS with Tyan MB esp in production.
Please include MB and usage...
I want to some data to let my company to spend more effect to support
LinuxBIOS and Opensource project.
Regards
YH
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Anyone tried LinuxBIOS with freeBSD?
regards
YH
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Cool.
Anyone has ASUS z80k or Z81k, that one has 5 USB port.
YH
On Wed, 2 Mar 2005 02:03:27 -0700, David Hendricks
[EMAIL PROTECTED] wrote:
Here's the info on the ZV5000 I promised earlier (To Yhlu IIRC) in case
you're still interested in K8 laptops.
HP Pavillion ZV5000
:00:00.0 Host
Why not try Etherboot at first? That would be easier.
On Wed, 2 Mar 2005 20:06:40 +0100, Stefan Reinauer [EMAIL PROTECTED] wrote:
* [EMAIL PROTECTED] [EMAIL PROTECTED] [050302 19:40]:
I'm using FILO with nVidia reference board with a CK804. I've got
LinuxBIOS to load FILO and FILO sees
Ron,
At least your update the MB support list at first.
V1:
.
V2:
.
YH
On Mon, 28 Feb 2005 10:12:33 -0700 (MST), Ronald G. Minnich
rminnich@lanl.gov wrote:
On Mon, 28 Feb 2005, Jamie Rollins wrote:
I agree very strongly on this point. If linuxbios is going to move
Any one got D0 Opteron?
It seems that AMD put the D0 releated info in their BIOS porting guide
(PUBLIC Version). But didn't release new revision guide about that.
YH
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Any laptop with athlon 64 or Opteron cpu?
And how about chipset on that?
I'd like to get one to play LinuxBIOS with it at home.
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:03 -0600, Ken Fuchs [EMAIL PROTECTED] wrote:
yhlu wrote:
Which MB you are using?
I'm using nVidia's CK8-04 CRB.
--
I'm having trouble with the smbus and reading the SIMMs SPD.
Sincerely,
Ken Fuchs [EMAIL PROTECTED]
___
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Any one is using
New! Asus Z80K Athlon 64 Notebook- 15inch SXGA+ w/ATI Radeon 9700
128MB/CDRW+DVD/Reader/Wi-Fi B+G
YH
On Wed, 23 Feb 2005 18:12:03 -0800, yhlu [EMAIL PROTECTED] wrote:
Any laptop with athlon 64 or Opteron cpu?
And how about chipset on that?
I'd like to get one to play
I could try seeing how the PhoenixBIOS does this, but I'd prefer good
documentation on the CK8-04. Is anyone aware of any CK8-04 documentation
useful for porting LinuxBIOS to the CK8-04 that isn't covered by an NDA?
NDA should be enough.
Besides that there is one Internel text file. But they
Why waste time on that?
USB stick should be big enough to put (kernel+Initrd)elf in it.
LinuxBIOS--FILO in Etherboot--ELF on USB--console... flash_rom and
get image from USB too.
YH
On Tue, 22 Feb 2005 20:43:47 +0100, Stefan Reinauer [EMAIL PROTECTED] wrote:
* Gin [EMAIL PROTECTED] [050222
Which MB you are using?
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CVS or maillist system?
YH
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Thursday, February 17, 2005 8:49 PM
To: linuxbios@clustermatic.org
Subject: Re: Refill Notification Ref: GE-99663054409128
folks, we are getting ready to move linuxbios to a
I will modify your MB Config please check it out.
YH
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Wednesday, February 09, 2005 12:37 AM
To: YhLu
Cc: Li-Ta Lo; LinuxBIOS
Subject: Re: VGA option rom code broken?
* YhLu [EMAIL PROTECTED] [050209 01:48
I'm back to office, and I could do some test on that today.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Wednesday, February 09, 2005 9:28 AM
To: Ronald G. Minnich
Cc: YhLu; Stefan Reinauer; LinuxBIOS
Subject: RE: VGA option rom code broken?
On Wed
card can not get enough Power for PSU?
Can you get more big PSU or 700W one for testing?
YH
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Wednesday, February 09, 2005 9:45 AM
To: Li-Ta Lo
Cc: YhLu; Stefan Reinauer; LinuxBIOS
Subject: RE: VGA option
The one works. --- AGP 2.0
~ # lspci -vvxxx -s 2:0.0
02:00.0 VGA compatible controller: nVidia Corporation NV25GL [Quadro4 750
XGL] (rev a3) (prog-if 00 [VGA])
Subsystem: nVidia Corporation: Unknown device 0139
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-
?
YH
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Tuesday, February 08, 2005 12:53 PM
To: Li-Ta Lo
Cc: LinuxBIOS
Subject: Re: VGA option rom code broken?
* Li-Ta Lo [EMAIL PROTECTED] [050208 21:22]:
YhLu reversed the order of apic_cluster
Yes the posion in rom
Linbios_ram.rom
auto.c
entry
failover
reset_vector
just need to make sure entry/failover is in 64k limit. So enable_rom in
failover can be executed.
YH
Progress however unless I am mistaken this will fail
miserably on an 8111 that only enables 64KiB of ROM by
For 1)
Please don't do that on amd8131_800Mhz.
Also I suggest you need to check the CPU rev to decide if set to 1GMhz.
For 2)
That bit only control x4 DIMM, So please don't do that on x8 or x16. All the
Normal BIOS only compare that to 4 only, and AMD document only said x4
Only.
For 3)
Should
I add one OPT_HT_LINK in it to disable the ht_setup_link.
for the ht_setup_link is already done in auto.c stage.
YH
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-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 25, 2005 7:40 AM
To: YhLu
Cc: linuxbios@clustermatic.org
Subject: Re: fallback reset_vector offset
send me the config file you are using. This is weird.
ron
I mean 0x8 is 36 bit. and the ld will take 0x.
YH
-Original Message-
From: ebiederman@lnxi.com [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 25, 2005 12:31 AM
To: YhLu
Cc: Ronald G. Minnich; linuxbios@clustermatic.org
Subject: Re: fallback reset_vector offset
To: YhLu
Cc: Ronald G. Minnich; linuxbios@clustermatic.org
Subject: Re: fallback reset_vector offset
YhLu [EMAIL PROTECTED] writes:
in reset16.lds
_ROMTOP = (_start = 0x) ? 0xfff0 : 0x8;
0x8 ?
And from the line above.
/* Trigger
I can not release the code now and it could take some time to get it
reviewed.
YH
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Monday, January 24, 2005 9:57 AM
To: [EMAIL PROTECTED]
Cc: linuxbios@clustermatic.org
Subject: Re: HT initialization
*
sometime the linuxbios.strip for fallback reset_vector will have 15 more
offset.
here I set ROM_IMAGE_SIZE 0x19200, and the linuxbios.strip will be 15 bytes
longer. weird?
00191f0: e900
0019200: eeca fffe e900 ef18 fffe
YH
you are right.
in linuxbios.map
_start become to 0xfffeeecc
and ROM_TOP and reset_vector become to 0xfff.
YH
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in reset16.lds
_ROMTOP = (_start = 0x) ? 0xfff0 : 0x8;
0x8 ?
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Accoding to Eric's idea to move cpu init before pci_device.
Move apic cluster before pci_domain in MB Config.lb
add some lines in northbridge.c
So in the MB Config.lb
apic cluster can only have one child.
Also can remove the northbridge/amd/k8 there is incoherent device under it.
For my 8 way
Maybe I need to change my mail program. What should I use?
YH
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About APIC and ACPI.
Some chipset has problems with apic and the workaround must to be used with
acpi BIOS.
YH
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Maybe need to check the CPU rev to find out the errata to be applied to
limit the speed to 800Mz. That would be easy.
YH
-Original Message-
From: Stefan Reinauer [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 18, 2005 5:30 AM
To: linuxbios@clustermatic.org
Subject: configurable HT
Ollie,
I fixed one bug in the class code ...in pci_rom.c. please check it. ...
YH
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Can I use that to connect Exchange Server in IMAP?
YH
-Original Message-
From: Richard Smith [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 18, 2005 10:13 AM
To: YhLu
Cc: ebiederman@lnxi.com; Li-Ta Lo; Sagiv Yefet; LinuxBIOS
Subject: Re: Running with VGA
On Tue, 18 Jan 2005 10:07:00
Yes. I swap the class_hi and class_lo in pci_rom.h
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 18, 2005 10:31 AM
To: YhLu
Cc: Eric W. Biederman; Ronald G. Minnich; LinuxBIOS
Subject: Re: Overlaping IO resource for AMD K8
On Tue, 2005-01-18
You are kidding. I put junk in the CVS server?
I guess he still need some time to figure out how to modify his mptable.c.
YH
-Original Message-
From: ebiederman@lnxi.com [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 18, 2005 11:35 AM
To: Gin
Cc: 'LinuxBIOS'
Subject: Re: SMP linux
With normal BIOS, there is option to let End user to select 1000Mhz or
800Hz.
And customer report there is performance difference with that.
YH
In addition I measured it on a dual cpu system and I could not
detect a performance difference based on the link speed so I decided
to play that one
Eric,
When can you put the E7520 support on the CVS server?
I have worked out all amd64 dual core support even on 8 way system and want
to play something else.
Regards
YH
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I moved that from V1 to V2 before you change the cpu initialization
structure.
YH
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Committed.
Please check it.
i wonder what the different between
offs = ( pci_read_config16(dev, pos + PCI_CAP_FLAGS) (110)) ?
PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS;
and
offs = ( (pci_read_config16(dev, pos + PCI_CAP_FLAGS) 10) 1) ?
PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS;
linkb_to_host and addon display adapter override onboard display card
committed.
1. linkb_to_host use bit 10 to find it if linkb to host.
Please refer to in_coherent.c and hypertransport.c
2. Add vga_pri in device.c to make it = add on card instead of onboard vga,
if add on card presents.
You will create another member in dev?
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Monday, January 17, 2005 5:18 PM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
On Fri, 2005-01-14 at 20:59, YhLu wrote:
I add the code to amd_earlymtrr.c
Ok with me.
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Monday, January 17, 2005 5:21 PM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
On Mon, 2005-01-17 at 18:31, YhLu wrote:
You will create another member in dev?
in device_operations
Then Eric need to fix the MTRR for AMD...?
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Friday, January 14, 2005 6:58 AM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
On Thu, 2005-01-13 at 22:20, YhLu wrote:
The problem is no body touch
The amd_setup_mtrrs that is called by model cpu init is right
So make the amd_early_setup_mtrr work right as later one
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Friday, January 14, 2005 9:35 AM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE
I check the amd_early_mtrr.c with old amd earymtrr.inc. It seems the only
difference is not enable SYSCFG_MSR_MtrrFixDramModEn before clear MTRR
fixed.
I enable that, but the result shows no change
YH
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CONFIG_PCI_ROM_RUN added in Option.lb
#if CONFIG_PCI_ROM_RUN==1
And #if CONFIG_CONSOLE_VGA==1
Added in device.c pci_device.c and pci_rom.c and Config.lb in src/devices
Also console/vga_console.c modified.
YH
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PCI: 02:06.0 30 - [0x00fff8 - 0x00fff7] rom
It seems it can not be processed by pci_set_resource properly.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 12, 2005 10:10 PM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
I guess it can not get size correctly.
So you need to change the pci_get_rom_resource to get the size for it.
And then assign the base to it.
YH
-Original Message-
From: YhLu
Sent: Thursday, January 13, 2005 9:49 AM
To: Li-Ta Lo
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
:06.0 init
pci_rom_probe, rom address for PCI: 02:06.0 = 1d300
pci_rom_probe, Incorrect Expansion ROM Header Signature 1fe8
I wonder if we can not store that value into PCI_ROM_ADDRESS
YH
-Original Message-
From: YhLu
Sent: Thursday, January 13, 2005 10:06 AM
To: YhLu; Li-Ta Lo
Cc: Sagiv
Works not.
I happen to delete in pci_read_config(dev, PCI_ROM_ADDRESS)
-Original Message-
From: YhLu
Sent: Thursday, January 13, 2005 10:20 AM
To: YhLu; 'Li-Ta Lo'
Cc: 'Sagiv Yefet'; 'LinuxBIOS'
Subject: RE: Running with VGA
Move /* for on board device with embedded ROM image
Works now. please check it.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, January 13, 2005 11:12 AM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
On Thu, 2005-01-13 at 10:49, YhLu wrote:
PCI: 02:06.0 30 - [0x00fff8
-Original Message-
From: YhLu
Sent: Thursday, January 13, 2005 11:27 AM
To: Li-Ta Lo
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
Works now. please check it.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, January 13, 2005 11:12 AM
I have done some interesting test.
I plug one display adapter to the MB, and let linuxbios excute onboard vga
option rom at first, and then option rom in addon card.
Then power down and I unplug the add on card
At last boot the system, after linuxbios, it works well.
The option rom in Adapter
No, no problem.
Same addon card (ati rage xl) (pci) on S2895 works well.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, January 13, 2005 2:17 PM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
On Thu, 2005-01-13 at 15:22, YhLu wrote
S2892 has onboard atirage xl
S2895 has no onboard.
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, January 13, 2005 3:10 PM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
On Thu, 2005-01-13 at 15:45, YhLu wrote:
No, no problem.
Same
PM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
On Thu, 2005-01-13 at 16:23, YhLu wrote:
S2892 has onboard atirage xl
S2895 has no onboard.
With exactly the same chip and BIOS? Then probably the order
of calling device::init() does matter.
Ollie
-Original Message
;
dev-ops-init(dev);
}
}
printk_info(Devices initialized\n);
}
-Original Message-
From: YhLu
Sent: Thursday, January 13, 2005 6:51 PM
To: Li-Ta Lo
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
It seems after if after cpu init do
No, Top to down will more worse.
1. I thank Northbridge PCI_DEV(0, 0x18, 0)... should be initial before
CPU
2. In tree apic cluster is after pci_domain.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Thursday, January 13, 2005 7:11 PM
To: YhLu
Cc: Sagiv
I add some lines in devices.c and pci_device.c
In case to disable the onboard vga to use add on card.
Please check it.
YH
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Cool!
-Original Message-
From: Bari Ari [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 12, 2005 10:44 AM
To: Eric W. Biederman
Cc: Ronald G. Minnich; Adam Talbot; Linuxbios@clustermatic.org
Subject: Re: speaker beeper
Eric W. Biederman wrote:
I think morse code would actually tie
, and have rom_address in Config.lb, it should use
that instead of allocate one for it.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 12, 2005 5:26 PM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
Subject: RE: Running with VGA
On Wed, 2005-01-12 at 17:23, YhLu
The chip.h is already in /drivers/pci/onboard.
So may need to
#include ../drivers/pci/onboard/chip.h
In pci_device.c
Also in get_pci_rom_resource begin
Add
if(dev-on_mainboard) {
struct drivers_pci_onboard_config *conf;
conf = dev-chip_info;
much better,
Because don't need to cast conf to drivers_pci_onboard_config, it is not
safe in pci_rom.c or pci_device.c
Do it.
YH
How about we bring the device:rom_address back and in the
driver_pci_onboard::enable_dev(dev)
{
dev-rom_address = conf-rom_address;
}
and in
Committed.
Also I added readme in /drivers/pci/onboard/onboard.c
YH
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You assign the value to the new resource.
I wonder if it will confuse the resource allocator. Because the range is out
of touch of allocator.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Wednesday, January 12, 2005 9:48 PM
To: YhLu
Cc: Sagiv Yefet; LinuxBIOS
[mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 11, 2005 9:12 AM
To: YhLu
Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen;
[EMAIL PROTECTED]; [EMAIL PROTECTED]; [EMAIL PROTECTED]; Matt
Domsch
Subject: RE: Enable apic ext id to use 256 apic id for AMD64
On Mon, 2005-01-10 at 15:27
Ollie,
I recall sth about mtrr setting, I wonder if I enable the NC could affect
your code. Please check cpu/x86/mtrr/mtrr.c about enable NC below 4G.
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 11, 2005 10:21 AM
To: LinuxBIOS; Eric Biederman
Complie error
You missed sth?
Tue Jan 11 10:17:11 PST 2005
FAILED! Log excerpt:
/home/yhlu/xx/xx/freebios2/src/devices/emulator/biosemu.c: In function
`setup_system_bios':
/home/yhlu/xx/xx/freebios2/src/devices/emulator/biosemu.c:219: warning:
implicit declaration of function `memset'
/home/yhlu
As the Nvidia card it does
not have PCI IO resource so we got the 2 to 1 thing.
It mean it doesn't allocate resource to it. Limitstart
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Tuesday, January 11, 2005 11:13 AM
To: YhLu
Cc: LinuxBIOS; Eric Biederman
For dual core and lifting apic id, you can not just use apic id as node id.
And you have to use
Lapicid() 0xf
Or cupid to get it.
Regards
YH
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Monday, January 10, 2005 2:14 PM
To: YhLu
Cc: Stefan Reinauer; Ronald G
OK.
-Original Message-
From: Li-Ta Lo [mailto:[EMAIL PROTECTED]
Sent: Monday, January 10, 2005 2:16 PM
To: YhLu
Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen;
[EMAIL PROTECTED]; [EMAIL PROTECTED]; [EMAIL PROTECTED]; Matt
Domsch
Subject: RE: Enable apic ext id to use 256
I changed that for all tyan, amd, and arima MB.
YH
-Original Message-
From: YhLu
Sent: Monday, January 10, 2005 2:28 PM
To: Li-Ta Lo
Cc: Stefan Reinauer; Ronald G. Minnich; LinuxBIOS; Andi Kleen;
[EMAIL PROTECTED]; [EMAIL PROTECTED]; [EMAIL PROTECTED]; Matt
Domsch
Subject: RE: Enable
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