Mark, that patch is not needed, there is already code in place to do that.
But thanks for the input, we appreciate it.
I'm impressed that you got that all worked out!
thanks!
ron
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On Wed, 1 Oct 2003, Stefan Reinauer wrote:
'default OPTION value' tag in the Mainboard Config.lb overriding the value set
Is that not possible already? I've been using it in some of the opteron
builds since a while...?!?
default was not allowed in mainboard files until I added that patch.
On Wed, 1 Oct 2003, Greg Watson wrote:
The problem is you're relying on obscure behavior of an option.
You're setting (or not setting) an option in the target config file,
then subsequently changing it's default value, then using whichever
happens to override the other. See my reply to
On Tue, 30 Sep 2003, Stefan Reinauer wrote:
Can it safely be removed, or will this code come back to life?
I am convinced that code is dead.
I also saw there are some old config method files lying around.
Using the old config method is discouraged. Is there anything speaking
against
On 30 Sep 2003, Eric W. Biederman wrote:
There are boards that a pirq routing table simply does not work
for, because not all interrupts go through the pirq router. For those
boards we either we need to just go through the mptable, or we
need to pre route the irqs and fill in the routing in
On Tue, 30 Sep 2003, Zachary Miller wrote:
which of the stable motherboards supports the fastest processor?
money is no object? Go to Tyan, they'll sell you a supported (by Tyan!) K8
mobo TODAY.
ron
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I think at this point I'm hanging on Eric's merge, because anything I do
could well got lost in that shuffle.
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Thanks to Stefan Reinauer we now have a fix for the linuxbios sourceforge
problems. You can now get snapshots at: http://snapshots.linuxbios.org/.
Thanks to the OpenBIOS organization too for setting up this excellent
facility. sourceforge may someday be fixed but we can't wait.
Now all you
I'm getting a bad feeling about SPD on EPIA.
I have tried to scan SPD on both a normal bios and linuxbios, and I don't
get any real data back. The SMBUS hardware all acts correctly, but on
linuxbios every SPD byte reads back as 0, and on the normal bios every spd
byte reads back as 3.
now,
In v2, it is pretty much impossible to do PCI setup BEFORE the PCI scan is
called and device trees are built. Sometimes, however, you need to be able
to work on PCI before the scan, e.g. to enable certain functions. I don't
want this code in mainboard auto.c -- that's a bad way to go.
See the
anybody want to send me that code and see what might be working right in
it?
thanks
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OK, I just loaded from flash. Next step is to fix the PIRQ, then look at
SPD and memory setup.
The fix, for now, is this in auto.c
static void
enable_mainboard_devices(void) {
device_t dev;
/* dev 0 for southbridge */
dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
if (dev ==
On Tue, 30 Sep 2003, Svante Signell wrote:
i) Does this code work for 440BX motherboards?
it's processor-dependent, 440bx or not is not an issue.
ii) Is it possible to extract this code and try out after the kernel has
booted (slowly), to verify my assumption?
yes, we tested it that way.
OK, I've committed code that turns on shadow dram in F segment, so PIRQ
will work; also committed what should be working SMBUS code in
vt8231_early_smbus.c; now the fun begins. I could use advice on:
- what SMBUS bytes we need to care about
- what we should program the north with using those
On Tue, 30 Sep 2003, Randall H. Craig wrote:
At the end of the compilation, I get this.
gcc -nostdlib -nostartfiles -static -o linuxbios -T ldscript.ld crt0.o
nm -n linuxbios | sort linuxbios.map
objcopy -O binary linuxbios linuxbios.strip
gcc -o buildrom
On Tue, 30 Sep 2003, Bari Ari wrote:
Randall H. Craig wrote:
I know I sound like an idiot but what does the acronym SPD stand for?
serial presence detect (SPD)
You can read about it here:
http://www.intel.com/technology/memory/pc133sdram/spec/spdsd12b.htm
On Wed, 1 Oct 2003, Andrew Ip wrote:
I'm able to build and run LinuxBIOS on EPIA with some treaking on Config.lb.
send me the tweaks, although they should not have been needed.
However, it fails to jump to payload(etherboot). I suspect LinuxBIOS is
jumping to a wrong location. Is it
Changes:
new epia target for 512k: targets/via/epia/Config.512kflash.lb
epia defaults to 256k flash
buildtarget now takes either a directory, and uses directory/Config.lb, or
takes a file
e.g.
buildtarget via/epia will use via/epia/Config.lb, and
buildtarget via/epia/Config.512kflash.lb
don't commit! I fixed that for you already.
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OK, for VGA, here we go again.
I just found out that a well-known linuxbios company ships their boards in
some cases with the old bios in it because the field engineers want
vga.
Here is my plan.
I will combine vgabios + idt into one file, put it in pc80, make it a
standard device,
On Wed, 1 Oct 2003, Andrew Ip wrote:
ZKERNEL_START is not really needed any more. I don't think. Am I wrong?
Is it changed to CONFIG_ROM_STREAM_START?
Think so. Those names are terrible (we need to fix them) but I think
that's it.
yes. You may need to get the latest cvs ... I have a few
On Mon, 29 Sep 2003, Stefan Reinauer wrote:
Andi Kleen stated that this is a result from wrong pirq- and acpi
tables.
OK, what version linux are they using for this statement.
PIRQ doesn't come into the picture for a long time. ACPI I have not seen
in the PCI parsing on my kernels.
If
looks like RAM is up!
Now I get to this:
Enumerating: VIA vt8601 Northbridge
Enumerating: VIA vt8231
Enumerating buses...PCI: pci_scan_bus for bus 1
PCI:
thought I should include this ...
static struct device_operations mainboard_operations = {
.read_resources = root_dev_read_resources,
.set_resources= root_dev_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
OK, I am now almost at the limit of my understanding :-)
I need to set up the device_operations for the 8601. Here is the mainboard
config that is relevant.
northbridge via/vt8601 vt8601
pci 0:0.0
pci 0:1.0
southbridge via/vt8231 vt8231
pci 0:11.0
Filling in the blanks ...
First all functions of a device save function 0 get this error:
PCI: 00:11.1 missing read_resources
seems like a bug.
So there looks like a problem for functions other than 0.
Bridges don't have a path that is named:
@�: bus
On Mon, 29 Sep 2003, YhLu wrote:
Stefan,
It's bus 1, that LinuxBIOS and OpenBIOS
find really well, only Linux refuses to see it.
Do you update the irq_table.c's interrupt router bus no. from to 0 to 1?
that's not the problem. The problem is that linux does not see bus 1 at
all.
ron
I really think that if you are working on EPIA-*, you should make the cut
to V2. I need the help. The port is going to be a much better job, and we
won't have to keep fighting hacks in assembly code.
Things that need looking at right now:
- vt8231 early spd code
- pci bus set up
- northbridge
On Mon, 29 Sep 2003, YhLu wrote:
In Arima, You still can not see bus1 device now?
exactly.
I think there is a simple problem with bridge configuration, I'm not sure
what. The EPIA is showing me that there is work left to do on this.
ron
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not sure why yet but ... all functions other than 0 are not having their
OPS set correctly.
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On Mon, 29 Sep 2003, Stefan Reinauer wrote:
* ron minnich [EMAIL PROTECTED] [030929 20:15]:
not sure why yet but ... all functions other than 0 are not having their
OPS set correctly.
Ron, Eric, can you confirm that your MPTable is correct for the Arima
Hdama?
yes, I have booted SMP
On Mon, 29 Sep 2003, Stefan Reinauer wrote:
But you have no devices on bus 1, right? Are the devices on the other
busses there?
ah, you are right. The only working thing I've done has been with no
devices on bus 1. I forgot.
Linux tries to rely on the information firmware provides. Not
this is bad:
Read config 32 bus 1,devfn 0x0,reg 0x18,val 0x
1:0.0 register 18.l is all . Very bad, it should be 010100
Stefan, what was that about hardware bugs again?
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Here's what I had to do. First, though, let me say: the new linuxbios
architecture, while hard to get the hang of (learning curve) is very
powerful.
You can have a mainboard-specific pci scan function, and that's what I
needed. I may put this as a generic thing into the pci device code.
overall, we have some work to do on PCI, so my guess is that you are not
digging in the dark at all, Stefan.
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On Mon, 29 Sep 2003, Stefan Reinauer wrote:
* ron minnich [EMAIL PROTECTED] [030929 21:36]:
this is bad:
Read config 32 bus 1,devfn 0x0,reg 0x18,val 0x
1:0.0 register 18.l is all . Very bad, it should be 010100
Stefan, what was that about
On Sun, 28 Sep 2003, Alex Scarbro wrote:
If the K7SEM is working, then could someone please update the K7SEM
howto with the correct information, as by following the existing howto,
my K7SEM freezes at Setting MTTR...UC.
It's not working. My next step after EPIA is the K7SEM, since it
On 28 Sep 2003, Eric W. Biederman wrote:
Mostly I suspect this is a matter of keeping the irq tables
in sync, or something similar where hard codes don't match the dynamic
assignments. And if that is the case we need to dig and do a good fix
instead of papering over the problem.
the PIRQ
I knew this would be a bit of work, but it is worth it as it is flushing
out K8 and SMP assumptions in the tree.
I really would appreciate it if somebody could look at the early smbus
code.
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OK, where we are is this: there is a freebios2 version for the via/epia.
It builds. I have set it up so memory config *should* *be* what we have
now, i.e. static. But this will get us to status quo, and then we can look
at SPD etc.
ron
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I could use a fragment of code that makes the uart sane.
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On Fri, 26 Sep 2003, ron minnich wrote:
I could use a fragment of code that makes the uart sane.
never mind, done.
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comes up with POST 10. That's it.
But hey, I didn't expect more yet ... this is a start :-)
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here is what I get:
0
LinuxBIOS-1.1.4.0Fallback Fri Sep 26 16:04:07 MDT 2003 starting...
SMBus controller enabled
vt8601 init starting
0800 is the north
vt8601 done
LinuxBIOS-1.1.4.0Fallback Fri Sep 26 16:04:07 MDT 2003
OK, here is where I am.
Here is the start of the key function
in src/northbridge/via/vt8601/raminit.c
static void sdram_set_registers(const struct mem_controller *ctrl) {
static const uint16_t raminit_ma_reg_table[] = {
/* Values for MA type register to try */
0x, 0x8088, 0xe0ee,
interesting.
This: north = pci_locate_device(PCI_ID(0x1106, 0x8601), 0);
returned: 0800
Which is Wrong. And the 8601 reads ok, but writes fail in config space.
Once I just set it to 0, things got a lot better!
But it still fails :-)
ron
___
Closer. I'm getting through all of the 8601 setup. But the values are
bogus:
Good VIA!
00: 06 11 01 06 06 00 90 a2 05 00 00 06 00 40 00 00
10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
I think I've got the last kinks out on 8601; we'll find out monday.
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On Thu, 25 Sep 2003, Ian Smith wrote:
Blows a hole in my theory about the 128MB being detected
sorry, but those registers you are mentioning have *zero* impact on size
detection. That's not what's going on here. Size detect is via SPD.
We wrote a lot of that code here 3 years ago, and it
Let's just start. Andrew, I will try to populate a skeleton epia directory
in freebios2, and we can start filling it in.
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I'm putting together an EPIA tree in V2. Give me a couple days.
If this works it's definitely what we want to do. It should work.
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I've added a few things for epia.
epia folks please look in freebios2 at
src/northbridge/via/vt8601 (not done yet)
src/southbridge/via/vt8231
the big thing to look at in the southbridge is how it is set up. The
previous code was really out of touch w.r.t. the way you're supposed to do
in arima/hdama/Config.lb
##
## Clean up the motherboard id strings
##
option MAINBOARD_PART_NUMBER=HDAMA
option MAINBOARD_VENDOR=ARIMA
OK, the config tool will create this by default:
MAINBOARD_PART_NUMBER=hdama
MAINBOARD_VENDOR=arima
why do we need to put this type of thing in the mainboard
On 25 Sep 2003, Eric W. Biederman wrote:
If no objections, I am going to remove the default setting in Options.lb,
make the mainboard ROM_SIZE settings defaults, so I can continue to set
them in the target config files.
That sounds like a good path forward.
committed.
Also, I
you're not missing anything. Sourceforge is sucking big time.
if it is not fixed soon, I'll be moving my projects.
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On Fri, 26 Sep 2003, SONE Takeshi wrote:
EPIA and EPIA-M are two totally different boards (different chipsets,
etc).
stupid ofme. I got mixed up because so many of the registers are the same.
So, please open a epia-m directory, instead of epia, in the freebios2
tree.
I'm going to do both.
The config tool has been changed to allow 'default' statements in the
mainboard file.
Now, you can have
default ROM_SIZE 512*1024
in the mainboard file, and over-ride that with (e.g.)
option ROM_SIZE=1024*1024
in the target file.
I've tested this and it works fine; it's now committed.
Yeah, but it's free. It's hard to complain too hard.
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On Thu, 25 Sep 2003, YhLu wrote:
Then where can the config tool got that info to produce
MAINBOARD_PART_NUMBER=hdama
MAINBOARD_VENDOR=arima
The config tool produces it automatically from the name of the mainboard.
In other words, when you say:
mainboard arima/hdama
The config tools
I'm putting the pieces together but this will go lots faster with help.
If somebody can look at
freebios2/src/via/southbridge/vt8231/vt8231_early_smbus.c and send me
fixes for the actual correct code, that will save a lot of time.
If I can toss these kinds of tasks out and get help, we
OK, if you
cd targets
./buildtarget epia/via
-bash-2.05b$ cd targets/via/epia/epia/
-bash-2.05b$ make
if (cd fallback; \
make linuxbios.rom)\
then true; else exit 1; fi;
make[1]: Entering directory
`/home/rminnich/src/bios/freebios2/targets/via/epia/epia/fallback'
./romcc -O ./auto.E
On Wed, 24 Sep 2003, Niki Waibel wrote:
instead of copying to ram, execute the code directly from the rom?
yes indeed, the original way we used to run linuxbios.
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On Wed, 24 Sep 2003, Niki Waibel wrote:
no. executed memtest86 from lilo -- not as payload.
ah, so we really don't know anything from that test. OK.
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what machine are you on, what install of what os?
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David Hendriks has tested and I have committed these new idt.c and
vgabios.c
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I think you have found a bug, but we need to let andrew ip take a close
look. I would say your patch is correct as well.
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On Tue, 23 Sep 2003, Niki Waibel wrote:
name CPU Extension Speed RAM remarks
EPIA-M C3 3DNOW 800 Mhz SDRAM
EPIA-M C3 3DNOW 600 MHz SDRAM fanless
# cat /proc/cpuinfo
processor : 0
On Tue, 23 Sep 2003, jay wrote:
Is the list of motherboards on the linuxbios status page up to date? I
am just curious, since it seems like a lot of mainstream boards (asus,
abit, etc) are not listed there, but I would expect them to be. Also,
with the K8 support, what motherboard is that
On Tue, 23 Sep 2003, Bernd Modeker wrote:
I tried the following bios which I extracted from insyde bios:
sh-2.05b# ./testbios elpin.vga -d 94
running file elpin.vga
No size specified. defaulting to 32k
No base specified. defaulting to 0xc
No initial code
On Tue, 23 Sep 2003, Niki Waibel wrote:
any idea why linuxbios is not starting on the epia-m 600?
i run memtest86 -- all tests (took about 24hours ;-) - everyting ok.
(run memtest86 from lilo).
i also tried the patch of Ian Smith [EMAIL PROTECTED].
ok, so you did memtest86 as a payload and
name CPU Extension Speed RAM remarks
EPIA C3 3DNOW 800 Mhz SDRAM
EPIA C3 3DNOW 600 MHz SDRAMfanless
EPIA-MC3 3DNOW 933 MHz DDR-SDRAM
Is this more accurate now?
what is
On 23 Sep 2003, Justin Cormack wrote:
Thats really great. Though I am *still* waiting for my Tyan boards to
actually arrive. Maybe I will cancel my order and reorder with
linuxbios. Is there a different part number, or how does one specify?
supported on the S2880 and S2885
ron
On Tue, 23 Sep 2003, Bernd Mödeker wrote:
the internal vga pci device at 0:12.4 should be found when you write
0x80009400 to pci index reg
0xcf8. After that the value 0x0504100b should be returned at 0xcfc as vendor
id (0x100b) and device id (0x0504).
After single stepping this return value
On Tue, 23 Sep 2003, ron minnich wrote:
c000:0124 ed INEAX,DX
no 66 prefix means it really is 16 bits, btw.
Anyway, can you check and see if there is a vga enable? there almost
always is in these chipsets.
ron
On Tue, 23 Sep 2003, Bernd Mödeker wrote:
I could'nt follow. What do you mean?
frequently, in the north bridge, there is a magic bit in some
register in device 0:0.0 that enables the VGA hardware. If you don't set
it, the VGA hardware will act like it is not there when you probe it.
ron
On Wed, 24 Sep 2003, SONE Takeshi wrote:
I saw an old version of my fixes to idt.c and vgabios.c is commited.
This version does not pass dev/busfn to the VGABIOS correctly.
send me the fix. I thought this was the right one. Sorry.
ron
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On Wed, 24 Sep 2003, Peter Stuge wrote:
On Tue, Sep 23, 2003 at 10:19:56PM +0200, Bernd Mödeker wrote:
Anyway, can you check and see if there is a vga enable? there almost
always is in these chipsets.
The vga device is enabled. If I use devmem I can read the vendor and device
ID and
On Mon, 22 Sep 2003, bendany wrote:
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0 ebx 0x10 ecx 0x20 edx 0x9d2e
biosint: ebp 0x12060 esp 0xff6 edi 0xe0ac esi 0x846a2
biosint: ip 0x3 cs 0x0 flags 0x46
biosint: Unsupport int #0x6
biosint: # 0x6, eax 0x0
I think you should get memtest86, set it up to run on serial console, and
see if it works or not.
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On Mon, 22 Sep 2003, Bernd Modeker wrote:
Is there anyone who solved this problem for SC1200?
not yet. If you have a copy of the vgabios binary for that hardware you
could try seeing if it would work.
The vga register problem is a mess, as the vendors rarely want to help.
ron
this these.
ron
/*
* $Id: rdcmos.c,v 1.1 1998/09/24 21:08:20 hendriks Exp $
*/
#include stdio.h
#include unistd.h
#include errno.h
#include asm/io.h
static inline
unsigned char readreg(int regno) {
outb(regno, 0x70);
return inb(0x71);
}
static inline
void writereg(int regno, unsigned
On Mon, 22 Sep 2003, Niki Waibel wrote:
i've never used memtest86.
make memtest86 the payload. be sure to build with serial console only.
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I just committed various patches that have allowed us here to use VGA on
the M800
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On Mon, 22 Sep 2003, Damien Charlet wrote:
My original BIOS is a 39SF020 A.
According to http://www.ioss.com.tw/web/English/RD1BIOSSavior/SelectionSheet.html I
got the good savior for epia (better double check !).
You don't think so ?
I don't think that 39F and 49F are compatible.
ron
david hendriks has now built linuxbios from scratch, from the cvs tree,
and it all works with graphics etc.
ide is still not working well.
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fixes welcome. This is CF that is failing. Actually it reads the data and
the data is fine, but when it jumps to the payload nothing happens.
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On Tue, 23 Sep 2003, Andrew Ip wrote:
actually, as near as we could tell the data was getting in to memory. But
once it jumped to the payload it never came back.
Interesting. What payload are u using? I have been using etherboot which
is pretty stable. However, Filo will be my next
we're working the lp0 issue.
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And HOWTO on these last steps, with sample kernel .config, is most
welcome.
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On Sat, 20 Sep 2003, rimy2000 wrote:
Has the util/vgabios bug fixed?
which one?
ron
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On Wed, 17 Sep 2003, Niki Waibel wrote:
what about haveing bios savior + DoC in a mb _and_
connecting the bios savior switch to an address pin...
which address pin? where are you going to find it? I've not had good luck
with adding wires to these boards -- we've done it (see the web page) but
On Wed, 17 Sep 2003, Niki Waibel wrote:
could you send me / point me to some more info about init a ddr?
look at the linuxbios ddr code ;-)
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On Wed, 17 Sep 2003, Niki Waibel wrote:
yes. i got the point. but to be sure we need to know _how_ a ddr
is initialized. so the question is -- who knows how to init a ddr?
we do. It's all over the newer mobos.
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On Wed, 17 Sep 2003, Jeffrey Knight wrote:
I noticed on the linuxbios site that there was some suceess with
linuxBIOS on an IBM T22 thinkpad. Nice!
no, sorry, there was only failure. IBM (Thinkpad division) has no interest
in linuxbios.
If the installation was pretty smooth, I was
On Tue, 16 Sep 2003, Niki Waibel wrote:
i am currently playing with this. my epia-m has no DIP32 socket. i
decided to use a DIP2PLCC adapter to use the MD2802-D08. so i can plug
it directly into the bios socket.
please remember, getting to work in the socket is the easy part. Getting
epia
On Tue, 16 Sep 2003, Gregg C Levine wrote:
Actually gentlemen, and ladies, no it is not. I have available for
this system a USB Key Drive, from Memorex, and a CF reader, also from
them. To use them under Linux, I need to turn on SCSI, and USB-Mass
drive support. Also, the mass drive functions
On Tue, 16 Sep 2003, Stefan Reinauer wrote:
Is there any need in going 64bit for the LinuxBIOS C payload on Opteron?
Since the kernel does long mode switching itself this should not be the
case, but maybe there are different opinions.
I think maybe when we start putting 4 GB memory on these
On Tue, 16 Sep 2003, Stefan Reinauer wrote:
* ron minnich [EMAIL PROTECTED] [030915 16:51]:
On Mon, 15 Sep 2003, Stefan Reinauer wrote:
buildrom imagename.rom
size ROM_SIZE
data ./lsiscsifw 65536
? What is that data thing?
I assumed that packing option roms
On Tue, 16 Sep 2003, ron minnich wrote:
On Tue, 16 Sep 2003, Stefan Reinauer wrote:
* ron minnich [EMAIL PROTECTED] [030915 16:51]:
On Mon, 15 Sep 2003, Stefan Reinauer wrote:
buildrom imagename.rom
size ROM_SIZE
data ./lsiscsifw 65536
So the one change I'd make
On Tue, 16 Sep 2003, Niki Waibel wrote:
where can i get more info in how to init the mem on a
epia-m? do i have to rev eng the bios?
read the linuxbios source, of course!
ron
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