Quoting Tom Sylla [EMAIL PROTECTED]:
Can you check the SERR and PERR status in the bridge before the
enable? (they are in offset 1f of config space) If you clear them
first, does it help? We have a platform with a different southbridge
where we find that to be the case (clearing the status
Hi Mark,
On 9/10/07, Marc Jones [EMAIL PROTECTED] wrote:
...
Hi Darmawan,
Currently there is no support in LinuxBIOS for any ATI(now AMD)
chipsets. We do plan to work on this in the next six months but I don't
have a specific release date.
Is it possible for us here to obtain the SB600
Hi all,
On 9/14/07, Darmawan Salihun [EMAIL PROTECTED] wrote:
Hi Mark,
On 9/10/07, Marc Jones [EMAIL PROTECTED] wrote:
...
Hi Darmawan,
Currently there is no support in LinuxBIOS for any ATI(now AMD)
chipsets. We do plan to work on this in the next six months but I don't
have a
Hi Marc,
(CC to list)
On Thu, Sep 13, 2007 at 06:33:17PM -0600, Marc Jones wrote:
Uwe Hermann wrote:
Hi,
here's my first try with the K9N. It took me a while to figure out how
to make serial work (the Super I/O is at 0x4e on this board, and you
need a small hack to switch to 24MHz, see
Hi,
please checkout http://linuxbios.org/Flashrom#Supported_mainboards.
I've added a section where we can collect a list of known-good and
known-bad mainboards, i.e.
- those which support flashrom out of the box (given that chipset and
ROM chip are supported)
- those that support flashrom
Hallo Liste,
Am Freitag, den 14.09.2007, 11:24 +0200 schrieb Uwe Hermann:
Please add more verified boards to the list (or post them here and I'll
add them).
I have an ASUS P4C800-E Deluxe mainboard. This is what flashrom says.
$ sudo flashrom
Calibrating delay loop... ok
No LinuxBIOS table
On Fri, Sep 14, 2007 at 12:41:15PM +0200, Paul Menzel wrote:
I have an ASUS P4C800-E Deluxe mainboard. This is what flashrom says.
$ sudo flashrom
Calibrating delay loop... ok
No LinuxBIOS table found.
Found chipset ICH5/ICH5R: Enabling flash write... OK.
Pm49FL004 found at physical
On Fri, Sep 14, 2007 at 01:52:55PM +0200, Peter Stuge wrote:
On Mon, Sep 10, 2007 at 03:25:46PM +0200, Uwe Hermann wrote:
Add a common/global failover.c file which can be used by all
(or at least most) mainboards.
How would this be used by a mainboard?
Pretty much like this:
On Fri, Sep 14, 2007 at 03:01:17PM +0200, Uwe Hermann wrote:
On Fri, Sep 14, 2007 at 01:52:55PM +0200, Peter Stuge wrote:
On Mon, Sep 10, 2007 at 03:25:46PM +0200, Uwe Hermann wrote:
Add a common/global failover.c file which can be used by all
(or at least most) mainboards.
How would
Darmawan Salihun [EMAIL PROTECTED] skrev:
hmmm, can be downloaded from:
http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_15137,00.html
But, I don't know how complete the datasheet over there ;-).
I had a look at the 690 stuff. It looked like it mainly contained info
Am Freitag, den 14.09.2007, 14:58 +0200 schrieb Uwe Hermann:
Have you done that? If not, please make sure you have a backup chip
in case something goes wrong. You can try writing the vendor's BIOS
(e.g. from the website) via flashrom, that should tell you if it works.
Oh, sorry. It looks like
Hi,
testing my mainboard ASUS P4C800-E Deluxe with flashrom, Uwe told me
also to try to write to it and to have a backup chip. I am a little bit
fearfull.
But I found that the board has a feature called CrashFree BIOS 2, where
the board flashes the BIOS by itself, when something is wrong [1,
Author: stepan
Date: 2007-09-14 16:58:33 +0200 (Fri, 14 Sep 2007)
New Revision: 2776
Modified:
trunk/LinuxBIOSv2/src/devices/hypertransport.c
trunk/LinuxBIOSv2/src/northbridge/amd/amdk8/early_ht.c
trunk/LinuxBIOSv2/src/northbridge/amd/amdk8/incoherent_ht.c
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer stepan checked in revision 2776 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
More range for HT_CHAIN_UNITID_BASE and HT_CHAIN_END_UNITID_BASE.
For example: in
Marc Jones [EMAIL PROTECTED] wrote:
The register documents have not been released. As Rasmus pointed out,
the datasheets that have been released don't contain the registers.
Marc
Are you held back by legal stuff or is it just the fact that it's of
ATI origin? Also, is ACPI done by someone
Rasmus Wiman wrote:
Darmawan Salihun [EMAIL PROTECTED] skrev:
hmmm, can be downloaded from:
http://www.amd.com/us-en/Processors/TechnicalResources/0,,30_182_739_15137,00.html
But, I don't know how complete the datasheet over there ;-).
I had a look at the 690 stuff. It looked like it
Rasmus Wiman wrote:
Marc Jones [EMAIL PROTECTED] wrote:
The register documents have not been released. As Rasmus pointed out,
the datasheets that have been released don't contain the registers.
Marc
Are you held back by legal stuff or is it just the fact that it's of
ATI origin? Also,
On Fri, Sep 14, 2007 at 03:08:56PM +0200, Peter Stuge wrote:
How would this be used by a mainboard?
Pretty much like this:
http://tracker.linuxbios.org/trac/LinuxBIOS/changeset/2772
Instead of the usual Config.lb blurb to use the local failover.c
you change it to use the common
On Fri, Sep 14, 2007 at 05:45:18PM +0200, LinuxBIOS information wrote:
Compilation of newisys:khepri has been broken
See the error log at
http://qa.linuxbios.org/log_buildbrd.php?revision=2776device=kheprivendor=newisys
too few registers. Maybe this can be quick-fixed by disabling some
debug
Author: uwe
Date: 2007-09-14 18:28:23 +0200 (Fri, 14 Sep 2007)
New Revision: 37
Modified:
buildrom-devel/README
Log:
Mention 'make menuconfig' in the README (trivial).
Signed-off-by: Uwe Hermann [EMAIL PROTECTED]
Acked-by: Uwe Hermann [EMAIL PROTECTED]
Modified: buildrom-devel/README
On Wed, Sep 12, 2007 at 06:43:37PM -0400, Tom Sylla wrote:
Hm, what about at least a tiny update to README that says that
menuconfig is available? (it currently says to use oldconfig)
Good point. Done.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
On Fri, Sep 14, 2007 at 06:22:39PM +0200, Uwe Hermann wrote:
Thanks, but it's already committed in r2772, Corey ACKed that in
a different thread too, and I forgot to reply here...
Doh. I looked for it in my tree but forgot to svn up.
//Peter
--
linuxbios mailing list
linuxbios@linuxbios.org
On 9/14/07, Uwe Hermann [EMAIL PROTECTED] wrote:
On Fri, Sep 14, 2007 at 05:45:18PM +0200, LinuxBIOS information wrote:
Compilation of newisys:khepri has been broken
See the error log at
http://qa.linuxbios.org/log_buildbrd.php?revision=2776device=kheprivendor=newisys
too few registers.
On Mon, Sep 10, 2007 at 10:49:03PM +0200, Marcin Juszkiewicz wrote:
On http://linuxbios.org/EHCI_Debug_Port wiki page there is an info that
Intel ICH4/ICH4-M chipset does not supports Debug Port. I have Dell D400
laptop with that chipset and Debug Port is available according to lspci
On Sat, Sep 08, 2007 at 10:37:08PM +0200, Uwe Hermann wrote:
On Sat, Sep 08, 2007 at 08:12:27PM +0200, Stefan Reinauer wrote:
* Uwe Hermann [EMAIL PROTECTED] [070908 00:30]:
+ $(Q)# On Debian GNU/kFreeBSD we need the linker output format
+ $(Q)# 'elf32-i386-freebsd' instead of just
Uwe Hermann wrote:
On Fri, Sep 14, 2007 at 05:45:18PM +0200, LinuxBIOS information wrote:
Compilation of newisys:khepri has been broken
See the error log at
http://qa.linuxbios.org/log_buildbrd.php?revision=2776device=kheprivendor=newisys
too few registers. Maybe this can be
Quoting Tom Sylla [EMAIL PROTECTED]:
[EMAIL PROTECTED] wrote:
So, I should just need to clear any parity and serr errors after
pci_bus_enable_resources() function runs but before the
pci_dev_enable_resources() function runs. Like this:
Well, my suggestion was only to try that as a
I tried to flash. MS-6337 with recently added MS-6178. It was needed to put
WP# and TBL# pins to high but since another chip is in use it is ok.
With filo as payload, post card gave 10 ... pause... 80, f8, fe ..short
pause and ff. (+ some other codes between them)
So at least ram is ok I think.
Jouni Mettälä wrote:
I tried to flash. MS-6337 with recently added MS-6178. It was needed
to put WP# and TBL# pins to high but since another chip is in use it
is ok.
With filo as payload, post card gave 10 ... pause... 80, f8, fe
..short pause and ff. (+ some other codes between them)
So
Uwe Hermann wrote:
Hi Marc,
...
I suspect that this is the SPD address is different.
How do I find out the correct one? i2cdetect/i2cdump?
Uwe.
I think that a scan with i2cdump would be your best bet.
Marc
--
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:[EMAIL
With some fiddling I booted into the Windows install CD and installed
Windows XP on a hard drive. It took fiddling because the BIOS is so old
that it doesn't conform to the ATA-3 specifications.
I haven't been able to boot using a hard drive from ADLO yet because it
doesn't recognize my hard
Myles Watson wrote:
With some fiddling I booted into the Windows install CD and installed
Windows XP on a hard drive. It took fiddling because the BIOS is so old
that it doesn't conform to the ATA-3 specifications.
I haven't been able to boot using a hard drive from ADLO yet because it
On Fri, Sep 14, 2007 at 03:49:18PM +0200, Paul Menzel wrote:
But I found that the board has a feature called CrashFree BIOS 2,
where the board flashes the BIOS by itself, when something is wrong
[1, page 73 or 4-4].
Has anybody experience with this feature? Or does it get deleted
when using
Hi,
On Fri, Sep 14, Uwe Hermann wrote:
Fixed in the wiki, thanks!
I was the one who added the ICH4 in the wiki, but I don't remember which
system I used to test that back then. Maybe I confused it with
some other chipset or I was drunk or something ;-)
hmm, may system has no debug port:
This is great,
I'd like to help with ADLO, could give me some more details when you try
to boot using ADLO?
Thanks,
Augusto Pedroza
On 9/14/07, Stefan Reinauer [EMAIL PROTECTED] wrote:
Myles Watson wrote:
With some fiddling I booted into the Windows install CD and installed
Windows XP
On Fri, Sep 14, 2007 at 04:53:17PM -0600, Myles Watson wrote:
2. Backport Filo's driver
I started #2.
Please don't spend time on the FILO IDE driver. It's a mess and not
worth the effort.
Instead I'd suggest the OpenBIOS IDE driver, which is much nicer.
To build it, replace your rombios.c
I need recommendation for Dual-core supported motherboard to try linuxBIOS on.
Appreciate your time.
-
Boardwalk for $500? In 2007? Ha!
Play Monopoly Here and Now (it's updated for today's economy) at Yahoo! Games.--
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