Hi All,
i have a board shipped with Linux kernel 2.6.27.
i have some problems in interrupts but while i was gathering some info about
the interrupts on my board by
cat /proc/interrupts
CPU0
16: 2525 OpenPIC Level enet_tx
17: 5606 OpenPIC Level enet_rx
Wolfgang Denk wrote:
Dear John,
in message 4b73d43f0906061708o763409d0u10a344dfc30e3...@mail.gmail.com you
wrote:
The big question seems to be what the RefMan means when talking about
the system clock frequency. Obiously it is NOT the CPU clock as
...
But which one is it?
My best
Dear Wolfgang,
In message 4a2cc1de.5040...@grandegger.com you wrote:
Hm... so that means on MPC512x we should use mpc512x_find_ips_freq(),
while on MPC5200 we should use mpc52xx_find_ipb_freq() - but hey,
apart from the name these two functions are identical.
Grant - how would you
On Saturday 06 June 2009, Michael Ellerman wrote:
On Fri, 2009-06-05 at 19:08 +1000, Stephen Rothwell wrote:
I do, however, have the old archives, so maybe we can do something ...
We could use the old archive to work out the mapping between old and new
and write a billion rewrite rules, but
On Thu, Jun 04, 2009 at 07:23:15PM +0900, KOSAKI Motohiro wrote:
Current linux policy is, zone_reclaim_mode is enabled by default if the
machine
has large remote node distance. it's because we could assume that large
distance
mean large server until recently.
We don't make assumptions
Pekka J Enberg wrote:
Hi Sachin,
On Fri, 5 Jun 2009, Sachin Sant wrote:
I can still recreate this bug on a Power 6 hardware with today's next tree.
I can recreate this problem at will.
Let me know if i can help in debugging this problem.
Can you please reproduce the issue with this
Current ucc_uart driver doesn't work at UART mode,
The TxBD[READY] is not cleared by H/W (RISC engine)
when user send characters to Tx buffer of QE UART.
so, these characters stay on the QE forever, never
go to UART line.
The patch is fixing th bug.
Signed-off-by: Dave Liu dave...@freescale.com
On Sun, Jun 7, 2009 at 2:34 PM, Wolfgang Denkw...@denx.de wrote:
Dear John,
in message 4b73d43f0906061708o763409d0u10a344dfc30e3...@mail.gmail.com you
wrote:
The big question seems to be what the RefMan means when talking about
the system clock frequency. Obiously it is NOT the CPU
On Mon, Jun 8, 2009 at 2:19 AM, Wolfgang Denkw...@denx.de wrote:
Dear Wolfgang,
In message 4a2cc1de.5040...@grandegger.com you wrote:
Hm... so that means on MPC512x we should use mpc512x_find_ips_freq(),
while on MPC5200 we should use mpc52xx_find_ipb_freq() - but hey,
apart from the
Hello,
using 2.6.30-rc6, I get the following problems when I read from a SSD
disk, connected to the
3.0 Gb SATA controller of the MPC8315E SoC rev 1.0 running Linux 2.6.30-rc6.
Below see the output from two dd read runs.
The disk behaves fine on a x86 box.
What I can do to (help) pin-point the
Sorry, was on vacation. Copying a couple mailing lists...
On Tue, 2009-06-02 at 12:34 +0300, Avi Kivity wrote:
I am now doing regular build tests on various platforms (kernel only for
now).
That's great! Much appreciated.
But ppc wants a mkimage and I don't have one to give it. Where
can
Peter Korsgaard wrote:
Joachim == Joachim Foerster j...@gmx.de writes:
Hi,
Joachim Any hints? Does anybody use SD card support with
Joachim mmc_spi+xilinx_spi ?
I don't, but have you compared the spi signals on a scope in the 2
setups? Is timing significantly different?
Hollis Blanchard wrote:
But ppc wants a mkimage and I don't have one to give it. Where
can I find it?
mkimage is a tool provided by u-boot
(http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary). IIRC
people have discussed the need to include a copy in the kernel source in
the
Question: why is bank-width even relevant for a RAM device?
The underlying map_ram-driver uses it once while erasing. The question remains
if this is really needed? And: Does this need to get solved before merging my
patches because changing the binding afterwards is hard? Or can they go
wael showair wrote:
You cannot really rely on getting the exact same number of edge
interrupts that were emitted. At least not unless you have a hard RT
system and can guarantee that you'll always dequeue them fast enough.
Yes, my system is a hard RT i want to receive all the
On Mon, Jun 08, 2009 at 10:48:58AM -0500, Hollis Blanchard wrote:
Sorry, was on vacation. Copying a couple mailing lists...
On Tue, 2009-06-02 at 12:34 +0300, Avi Kivity wrote:
I am now doing regular build tests on various platforms (kernel only for
now).
That's great! Much appreciated.
But
Am 08.06.09 18:35 schrieb(en) Wolfram Sang:
Question: why is bank-width even relevant for a RAM device?
The underlying map_ram-driver uses it once while erasing. The
question remains if this is really needed?
Am 06.06.09 18:16 schrieb(en) Albrecht Dreß:
At least if the RAM is attached to
On Jun 6, 2009, at 5:42 PM, Benjamin Herrenschmidt wrote:
On Sun, 2009-06-07 at 00:07 +0200, Wolfgang Denk wrote:
Dear David Jander,
In message 200903161652.09747.david.jan...@protonic.nl you wrote:
Complete workaround for DTLB errata in e300c2/c3/c4 processors.
Due to the bug, the
On Saturday 30 May 2009 12:46:43 Andrey Gusev wrote:
On Wed, 20 May 2009 17:56:14 +0200
Bartlomiej Zolnierkiewicz bzoln...@gmail.com wrote:
On Friday 15 May 2009 22:40:07 Andrey Gusev wrote:
On Wed, 13 May 2009 20:46:33 +0200
Bartlomiej Zolnierkiewicz bzoln...@gmail.com wrote:
On Mon, 2009-06-08 at 09:45 -0700, wael showair wrote:
wael showair wrote:
You cannot really rely on getting the exact same number of edge
interrupts that were emitted. At least not unless you have a hard RT
system and can guarantee that you'll always dequeue them fast enough.
On Jun 8, 2009, at 5:13 PM, Nate Case wrote:
+static void xes_mpc85xx_configure_l1(void)
+{
+ uint spr;
+ asm volatile(msync; isync);
+ spr = mfspr(SPRN_L1CSR1);
+ asm volatile(msync; isync);
+ /* Enable instruction cache */
+ mtspr(SPRN_L1CSR1, spr |
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/
powerpc/platforms/85xx/xes_mpc85xx.c
new file mode 100644
index 000..c1b55b8
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
@@ -0,0 +1,332 @@
+/*
+ * Copyright (C) 2009 Extreme Engineering Solutions, Inc.
+ *
+ *
MPC85xx platforms do support 4 ethernet ports, so make sure the boot
wrapper fixes up all of them in the fdt.
Signed-off-by: Nate Case nc...@xes-inc.com
---
arch/powerpc/boot/cuboot-85xx.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/cuboot-85xx.c
On Mon, 2009-06-08 at 22:20 +0200, Bartlomiej Zolnierkiewicz wrote:
[ 70.584122] hdb:3ide-pmac lost interrupt, dma status: 8480
DMA status indicates that DMA transfer is still active according to
the controller. This one is really a platform/hardware specific issue.
I've partially
sensors can't be detected on i2c-mpc
Hi all,
The sensors can't be detected on the built-in I2C interface on the Freescale's
MPC processors on linux-2.6.29.
If it is not yet fixed, I think that it is forgotten to set the following
values in the class.
Signed-off-by: Hideo Saito
On Mon, Jun 8, 2009 at 7:20 PM, Hide Saitohsaito@gmail.com wrote:
sensors can't be detected on i2c-mpc
Hi all,
The sensors can't be detected on the built-in I2C interface on the
Freescale's MPC processors on linux-2.6.29.
If it is not yet fixed, I think that it is forgotten to set the
On Sun, 2009-06-07 at 20:06 +0530, Subrata Modak wrote:
On Sat, 2009-06-06 at 09:36 -0400, Frank Mori Hess wrote:
On Saturday 06 June 2009, Greg KH wrote:
Frank and Ian, any thoughts about the vmap call in the
comedi_buf_alloc() call? Why is it using PAGE_KERNEL_NOCACHE, and what
is
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