Creates P1020si.dtsi, containing information for the P1020 SoC. Modifies dts
files for P1020 based systems to use dtsi file.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
Acked-by: Kumar Gala kumar.g...@freescale.com
---
Based upon
On Apr 7, 2011, at 12:48 AM, Matt Evans wrote:
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm/cputable.h
index be3cdf9..7b0fe7c 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -178,22 +178,15 @@ extern const char
On Wed, 2011-04-06 at 14:01 +0100, Evan Lavelle wrote:
#define MY_ASSERT(expr) if(!(expr)) BUG()
Make it
#define MY_ASSERT(expr) do { if } while(0)
To ensure it has proper single statement semantics in C.
Cheers,
Ben.
___
Linuxppc-dev mailing
On Thu, Apr 07, 2011 at 11:55:34AM +0530, Prabhakar Kushwaha wrote:
Creates P1020si.dtsi, containing information for the P1020 SoC. Modifies dts
files for P1020 based systems to use dtsi file.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
Acked-by: Kumar Gala
On 07/04/11 17:06, Kumar Gala wrote:
On Apr 7, 2011, at 12:48 AM, Matt Evans wrote:
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm/cputable.h
index be3cdf9..7b0fe7c 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
On 06/04/11 18:00, Leon Woestenberg wrote:
Hello,
after investigating problems with sata_sil24.c on a freescale p2020
soc, I wonder if this driver works on powerpc at all?
Does anyone know of a working setup of sata_sil24 on a big endian
powerpc system?
Yes, I think we even use it on a
Creates P1020si.dtsi, containing information for the P1020 SoC. Modifies dts
files for P1020 based systems to use dtsi file
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
Acked-by: Kumar Gala kumar.g...@freescale.com
---
Based upon
Hi Dave,
This is the old DRM driver for radeon, which relies on userspace to
start X then calls the kernel
Actually, even the old DRM driver occasionally hangs on this machine,
I suspect a missing barrier, but I might be completely off base.
The system is up, only X uses 100% of one
Hi Dave,
sorry, in my previous message I forgot the strace
output, which is an inifinite loop of the following:
--- SIGALRM (Alarm clock) @ 0 (0) ---
sigreturn() = ? (mask now [])
ioctl(7, 0xc0286429, 0xffdf9bb8)= -1 EBUSY (Device or resource busy)
---
RTAS returns extended error codes as a hint of how long the
OS might want to wait before retrying a call. If we have nothing
else useful to do we may as well call back straight away.
This was found when testing the new dynamic dma window feature.
Firmware split the zeroing of the TCE table into
On Mit, 2011-04-06 at 22:43 +0200, Gabriel Paubert wrote:
The probem is that, at least on one of my machines, the new driver
does not work: the system hangs (apparently solid, but it's before
networking starts up and I've not yet hooked up a serial console),
after the radeon: ib pool ready
On Thu, Apr 07, 2011 at 02:40:55PM +0530, Prabhakar Kushwaha wrote:
Creates P1020si.dtsi, containing information for the P1020 SoC. Modifies dts
files for P1020 based systems to use dtsi file
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
Acked-by: Kumar Gala
Hi,
Up to now I've been working ltib over and ads5121 based board.
So as not to work with frozen images I would like to change to u-boot and
kernel from denx. I did the following:
- Download and compile u-boot: OK.
- Download and kernel (mpc512x_defconfig): compilation fails if I enable
On Thu, 07 Apr 2011, Benjamin Herrenschmidt wrote:
Doesn't that mean that power_pmu_read() can only ever increase the value
of
the perf_event and so will essentially -stop- once the counter rolls over
?
Similar comments every where you do this type of comparison.
Hello Prabhakar,
thanks for your response. My answer below:
On Thu, Apr 7, 2011 at 6:48 AM, Kushwaha Prabhakar-B32579
b32...@freescale.com wrote:
Hi Leon,
Can you please check p2020rdb.dts for IDSEL entries for pci0/1 node?
In order to work in legacy mode, IDSEL entries are required.
No,
Because of speculative event roll back, it is possible for some event coutners
to decrease between reads on POWER7. This causes a problem with the way that
counters are updated. Delta calues are calculated in a 64 bit value and the
top 32 bits are masked. If the register value has decreased,
Hello Martyn,
thanks for a confirmation.
On Thu, Apr 7, 2011 at 10:27 AM, Martyn Welch martyn.we...@ge.com wrote:
On 06/04/11 18:00, Leon Woestenberg wrote:
Does anyone know of a working setup of sata_sil24 on a big endian
powerpc system?
Yes, I think we even use it on a p2020 board,
On Thu, Apr 7, 2011 at 2:55 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Wed, 2011-04-06 at 14:01 +0100, Evan Lavelle wrote:
#define MY_ASSERT(expr) if(!(expr)) BUG()
Make it
#define MY_ASSERT(expr) do { if } while(0)
To ensure it has proper single statement semantics
Hello,
On Thu, Dec 17, 2009 at 9:28 PM, Felix Radensky fe...@embedded-sol.com wrote:
Kumar Gala wrote:
On Dec 17, 2009, at 2:59 AM, Mahajan Vivek-B08308 wrote:
Thanks a lot. If I understand you correctly, the only way I can get
ath9k driver to work on this board using legacy interrupts is to
On 07.04.2011 [21:54:07 +1000], Anton Blanchard wrote:
RTAS returns extended error codes as a hint of how long the
OS might want to wait before retrying a call. If we have nothing
else useful to do we may as well call back straight away.
This was found when testing the new dynamic dma
Hello,
On 11/30/2010 09:25 PM, Daniel Walker wrote:
This driver adds a basic console that uses the arm JTAG
DCC to transfer data back and forth. It has support for
ARMv6 and ARMv7.
This console is created under the HVC driver, and should be named
/dev/hvcX (or /dev/hvc0 for example).
Cc: Tony
On Thu, Apr 7, 2011 at 14:39, RONETIX - Asen Dimov wrote:
On 11/30/2010 09:25 PM, Daniel Walker wrote:
This driver adds a basic console that uses the arm JTAG
DCC to transfer data back and forth. It has support for
ARMv6 and ARMv7.
This console is created under the HVC driver, and should be
DEBUG_PER_CPU_MAPS is used in lib/cpumask.c as well as in
inlcude/linux/cpumask.h and thus it has outgrown its use within x86
and powerpc alone. Any arch with SMP support may want to get some
more debugging, so make this option generic.
Cc: linux-a...@vger.kernel.org
Cc: x...@kernel.org
Cc:
On Apr 6, 2011, at 1:02 PM, Scott Wood wrote:
On Wed, 6 Apr 2011 07:29:03 -0500
Kumar Gala ga...@kernel.crashing.org wrote:
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm/cputable.h
index be3cdf9..9028a9e 100644
--- a/arch/powerpc/include/asm/cputable.h
+++
On Thu, 7 Apr 2011 14:38:57 -0500
Kumar Gala ga...@kernel.crashing.org wrote:
On Apr 6, 2011, at 1:02 PM, Scott Wood wrote:
On Wed, 6 Apr 2011 07:29:03 -0500
Kumar Gala ga...@kernel.crashing.org wrote:
diff --git a/arch/powerpc/include/asm/cputable.h
On Thu, 2011-04-07 at 12:04 -0500, kevin diggs wrote:
On Thu, Apr 7, 2011 at 2:55 AM, Benjamin Herrenschmidt
b...@kernel.crashing.org wrote:
On Wed, 2011-04-06 at 14:01 +0100, Evan Lavelle wrote:
#define MY_ASSERT(expr) if(!(expr)) BUG()
Make it
#define MY_ASSERT(expr) do { if }
-Original Message-
From: linux-ide-ow...@vger.kernel.org [mailto:linux-ide-
ow...@vger.kernel.org] On Behalf Of Leon Woestenberg
Sent: Thursday, April 07, 2011 10:23 PM
To: Kushwaha Prabhakar-B32579
Cc: Moffett, Kyle D; Linux PPC; linux-...@vger.kernel.org; Tejun Heo;
Jeff Garzik
-Original Message-
From: Leon Woestenberg [mailto:leon.woestenb...@gmail.com]
Sent: Thursday, April 07, 2011 10:50 PM
To: linuxppc-...@ozlabs.org
Cc: Kumar Gala; Mahajan Vivek-B08308; Aggrwal Poonam-B10812; Felix
Radensky; Kushwaha Prabhakar-B32579
Subject: Re: Problem with
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