On 11/29/2011 12:31 PM, Benjamin Herrenschmidt wrote:
> On Tue, 2011-11-29 at 12:12 +0530, Deepthi Dharwar wrote:
>>
>> Yes, this could be problematic as there is small window for the
>> race condition to occur . Otherwise we need to manually schedule
>> it by running a kernel thread but this woul
On Tue, 2011-11-29 at 12:12 +0530, Deepthi Dharwar wrote:
>
> Yes, this could be problematic as there is small window for the
> race condition to occur . Otherwise we need to manually schedule
> it by running a kernel thread but this would definitely have a
> overhead and would be an overkill.
D
The AppliedMicro APM8018X embedded processor targets embedded applications that
require low power and a small footprint. It features a PowerPC 405 processor
core built in a 65nm low-power CMOS process with a five-stage pipeline executing
up to one instruction per cycle. The family has 128-kbytes of
On 11/29/2011 02:09 AM, Benjamin Herrenschmidt wrote:
> On Mon, 2011-11-28 at 16:33 +0530, Deepthi Dharwar wrote:
>
>> On an LPAR if cpuidle is disabled, ppc_md.power_save is still set to
>> cpuidle_idle_call by default here. This would result in calling of
>> cpuidle_idle_call repeatedly, only f
On 11/29/2011 02:05 AM, Benjamin Herrenschmidt wrote:
> On Mon, 2011-11-28 at 16:32 +0530, Deepthi Dharwar wrote:
>
>>> Additionally, I'm a bit worried (but maybe we already discussed that a
>>> while back, I don't know) but cpu_idle_wait() has "wait" in the name,
>>> which makes me think it migh
On Mon, Nov 28, 2011 at 4:49 AM, Benjamin Herrenschmidt
wrote:
> On Fri, 2011-11-25 at 17:49 +0530, Tanmay Inamdar wrote:
>
>>
>> >
>> > +#if defined(CONFIG_APM8018X)
>> > +/* CPR */
>> > +#define DCRN_CPR0_CONFIG_ADDR 0xa
>> > +#define DCRN_CPR1_CONF
On Mon, 2011-10-10 at 15:50 -0500, Becky Bruce wrote:
> From: Becky Bruce
>
> This updates the hugetlb page table code to handle 64-bit FSL_BOOKE.
> The previous 32-bit work counted on the inner levels of the page table
> collapsing.
Seriously, my brain hurts !!!
So I've tried to understand tha
boot_cpuid and init_thread_info.cpu are redundant, just use the
var that stays around longer and add a define to make boot_cpuid
point at the correct value
boot_cpudid_phys is not needed and can completly go away from the
SMP case, we leave it there for the non-SMP case since the paca
struct is no
On Mon, 2011-10-10 at 15:50 -0500, Becky Bruce wrote:
> diff --git a/arch/powerpc/include/asm/hugetlb.h
> b/arch/powerpc/include/asm/hugetlb.h
> index 8600493..70f9885 100644
> --- a/arch/powerpc/include/asm/hugetlb.h
> +++ b/arch/powerpc/include/asm/hugetlb.h
> @@ -124,7 +124,18 @@ static inline
Hi Ira,
see my comments below.
Thanks,
Forrest
-Original Message-
From: Ira W. Snyder [mailto:i...@ovro.caltech.edu]
Sent: 2011年11月29日 0:38
To: Shi Xuelin-B29237
Cc: vinod.k...@intel.com; dan.j.willi...@intel.com;
linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; linux-ker...@vger.kernel
> Subject: Re: [PATCH][RFC] fsldma: fix performance degradation by optimizing
> spinlock use.
>
> On Thu, Nov 24, 2011 at 08:12:25AM +, Shi Xuelin-B29237 wrote:
> > Hi Ira,
> >
> > Thanks for your review.
> >
> > After second thought, I think your scenario may not occur.
> > Because the cookie
>Da: ag...@denx.de
>Data: 28/11/2011 21.22
>A: "acrux"
>Cc: "Josh Boyer",
>Ogg: Re: sam460ex, sm501 incorrect device id with kernel >=linux-2.6.39
>
>On Mon, 28 Nov 2011 20:56:55 +0100
>acrux wrote:
>...
>> it seems to be an endianess issue but i didn't find when it was
>> introduced. Really st
From: Becky Bruce
This avoids an extra find_vma() and is less error-prone.
Signed-off-by: Becky Bruce
---
arch/powerpc/include/asm/hugetlb.h |3 ++-
arch/powerpc/mm/hugetlbpage-book3e.c |8 ++--
arch/powerpc/mm/mem.c|2 +-
3 files changed, 9 insertions(+), 4 d
On Thu, Nov 17, 2011 at 11:56 AM, Dmitry Eremin-Solenikov
wrote:
> diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c
> b/arch/powerpc/platforms/85xx/p1022_ds.c
> index 00d93a4..cacb4d4 100644
> --- a/arch/powerpc/platforms/85xx/p1022_ds.c
> +++ b/arch/powerpc/platforms/85xx/p1022_ds.c
> @@ -33
Amit,
You said that the work would be serialized "due to port additions
being on work items on the same workqueue". I'm not seeing that.
I've double checked this by using a mutex_trylock in
hvc_console::hvc_alloc(), and here's the relevant output from dmesg:
root@myubuntu:~# dmesg | grep MBH
[33
On Thu, 2011-11-24 at 17:07 +1100, Anton Blanchard wrote:
> plain text document attachment (clock3)
> Use clocksource_register_hz which calculates the shift/mult
> factors for us. Also remove the shift = 22 assumption in
> vsyscall_update - thanks to Paul Mackerras and John Stultz for
> catching th
On Thu, Nov 24, 2011 at 10:15:42PM +0200, Michael S. Tsirkin wrote:
> define GENERIC_IOMAP in a central location
> instead of all architectures. This will be helpful
> for the follow-up patch which makes it select
> other configs. Code is also a bit shorter this way.
For the Hexagon config,
Acked
On 11/23/2011 10:47 AM, Josh Boyer wrote:
> On Mon, Nov 14, 2011 at 12:41 AM, Suzuki K. Poulose wrote:
>> The current implementation of CONFIG_RELOCATABLE in BookE is based
>> on mapping the page aligned kernel load address to KERNELBASE. This
>> approach however is not enough for platforms, where
> return;
>
> #ifdef CONFIG_PPC_MM_SLICES
> - psize = mmu_get_tsize(get_slice_psize(mm, ea));
> - tsize = mmu_get_psize(psize);
> + psize = get_slice_psize(mm, ea);
> + tsize = mmu_get_tsize(psize);
> shift = mmu_psize_defs[psize].shift;
> #else
> - vma = find_vm
On 11/28/2011 03:48 PM, Scott Wood wrote:
> On 11/23/2011 06:41 PM, b35...@freescale.com wrote:
>> From: Liu Shuo
>>
>> Freescale FCM controller has a 2K size limitation of buffer RAM. In order
>> to support the Nand flash chip whose page size is larger than 2K bytes,
>> we read/write 2k data repe
On 11/23/2011 06:41 PM, b35...@freescale.com wrote:
> From: Liu Shuo
>
> Freescale FCM controller has a 2K size limitation of buffer RAM. In order
> to support the Nand flash chip whose page size is larger than 2K bytes,
> we read/write 2k data repeatedly by issuing FIR_OP_RB/FIR_OP_WB and save
>
On 11/23/2011 06:14 AM, LiuShuo wrote:
> 于 2011年11月23日 07:55, Scott Wood 写道:
>> On 11/15/2011 03:29 AM, b35...@freescale.com wrote:
>>> From: Liu Shuo
>>>
>>> -if (elbc_fcm_ctrl->oob || elbc_fcm_ctrl->column != 0 ||
>>> +if (elbc_fcm_ctrl->column>= mtd->writesize) {
>>> +
Hi.
There seems to be a breakage in the VLAN TX HW acceleration in gianfar (kernel
3.1). It seems like the previous patch that was submitted forgotten to
initialize the TX registers.
--- drivers/net/gianfar.c-orig 2011-11-28 11:04:09.318992481 +0100
+++ drivers/net/gianfar.c 2011-11-28 1
On Mon, 2011-11-28 at 15:48 -0500, Kyle Moffett wrote:
> On Sun, Nov 27, 2011 at 18:51, Benjamin Herrenschmidt
> wrote:
> > Overall I really look your series. It doesn't quite apply cleanly
> > anymore so I'll as you for a new shoot after you address the comments
> > below, at which point, if you'
On Sun, Nov 27, 2011 at 18:51, Benjamin Herrenschmidt
wrote:
> Overall I really look your series. It doesn't quite apply cleanly
> anymore so I'll as you for a new shoot after you address the comments
> below, at which point, if you're fast enough, I'll stick it in -next :-)
Awesome! Thanks!
As
On Mon, 2011-11-28 at 16:33 +0530, Deepthi Dharwar wrote:
> On an LPAR if cpuidle is disabled, ppc_md.power_save is still set to
> cpuidle_idle_call by default here. This would result in calling of
> cpuidle_idle_call repeatedly, only for the call to return -ENODEV. The
> default idle is never exe
On Mon, 2011-11-28 at 16:32 +0530, Deepthi Dharwar wrote:
> > Additionally, I'm a bit worried (but maybe we already discussed that a
> > while back, I don't know) but cpu_idle_wait() has "wait" in the name,
> > which makes me think it might need to actually -wait- for all cpus to
> > have come out
On Mon, 2011-11-28 at 10:04 -0600, Kumar Gala wrote:
> > +#ifndef CONFIG_BOOKE
> > + {MSR_RI,"RI"},
>
> We have 'RI' on some BOOKE so lets allow for it to be decoded
>
> > + {MSR_LE,"LE"},
> > +#endif
> > {0, NULL}
> > };
>
> Since you're fixing this can you
On 11/28/2011 02:12 PM, Josh Boyer wrote:
> On Mon, Nov 28, 2011 at 3:04 PM, Scott Wood wrote:
>> On 11/28/2011 01:46 PM, Josh Boyer wrote:
>>> Could introduce BOOK3E_32 to cover cases like this.
>>
>> Why _32? These bits apply to 64-bit as well. MSR_CM is only for 64-bit.
>
> Because CONFIG_BO
On Mon, 28 Nov 2011 20:56:55 +0100
acrux wrote:
...
> it seems to be an endianess issue but i didn't find when it was
> introduced. Really strange this kind of issue was never noticed
> bumping from 2.6.38.x to 2.6.39.x .
Look at commit bf5f0019046d596d613caf74722ba4994e153899
(video, sm501: add
On Mon, Nov 28, 2011 at 3:04 PM, Scott Wood wrote:
> On 11/28/2011 01:46 PM, Josh Boyer wrote:
>> On Mon, Nov 28, 2011 at 2:30 PM, Scott Wood wrote:
>>> On 11/28/2011 10:23 AM, Josh Boyer wrote:
On Mon, Nov 28, 2011 at 11:04 AM, Kumar Gala
wrote:
>
> Since you're fixing this c
On 11/28/2011 01:46 PM, Josh Boyer wrote:
> On Mon, Nov 28, 2011 at 2:30 PM, Scott Wood wrote:
>> On 11/28/2011 10:23 AM, Josh Boyer wrote:
>>> On Mon, Nov 28, 2011 at 11:04 AM, Kumar Gala
>>> wrote:
Since you're fixing this can you add the following for CONFIG_BOOKE:
MSR_GS,
Signed-off-by: Kumar Gala
---
* Need to fixup the commit message
arch/powerpc/boot/dts/asp834x-redboot.dts|4 ++--
arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi |4 ++--
arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi |4 ++--
arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi |4 ++--
On Mon, 2011-11-28 at 11:44 -0600, Scott Wood wrote:
> > -#ifndef CONFIG_BOOKE
> > - /* On server, re-trigger the decrementer if it went negative since
> > - * some processors only trigger on edge transitions of the sign bit.
> > - *
> > - * BookE has a level sensitive decremente
On Mon, 28 Nov 2011 07:12:38 -0500
Josh Boyer wrote:
> On Sun, Nov 27, 2011 at 11:37 AM, acrux wrote:
> >
> > Acube Sam460ex has SM502 as onboard video.
> > I got this with any kernel newer than 2.6.38.x thus the framebuffer
> > is lost too:
> >
> > root@sam4x0:~# diff dmesg-2.6.38.8 dmesg-2.6.3
On Mon, Nov 28, 2011 at 2:30 PM, Scott Wood wrote:
> On 11/28/2011 10:23 AM, Josh Boyer wrote:
>> On Mon, Nov 28, 2011 at 11:04 AM, Kumar Gala
>> wrote:
>>>
>>> Since you're fixing this can you add the following for CONFIG_BOOKE:
>>>
>>> MSR_GS, MSR_UCLE, MSR_PMM, MSR_CM
>>
>> Those don't exist
On 11/28/2011 10:23 AM, Josh Boyer wrote:
> On Mon, Nov 28, 2011 at 11:04 AM, Kumar Gala
> wrote:
>>
>> Since you're fixing this can you add the following for CONFIG_BOOKE:
>>
>> MSR_GS, MSR_UCLE, MSR_PMM, MSR_CM
>
> Those don't exist on 4xx, so CONFIG_BOOKE doesn't seem appropriate.
They're de
On 11/24/2011 12:07 AM, Anton Blanchard wrote:
> Index: linux-build/arch/powerpc/kernel/irq.c
> ===
> --- linux-build.orig/arch/powerpc/kernel/irq.c2011-11-17
> 10:04:16.551137554 +1100
> +++ linux-build/arch/powerpc/kernel/ir
Kumar Gala wrote:
> If you want me to apply this please also provided a 32-bit .dts for
> p1022ds. This should be pretty trivial based on my recent .dts
> cleanups.
I think I found another bug in the 36-bit DTS. Looking at U-Boot, I see this:
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_PCIE2_M
On 11/24/2011 01:37 AM, Li Yang-R58472 wrote:
>> +static void io_to_buffer(struct mtd_info *mtd, int subpage, int oob)
>> +{
>> +struct nand_chip *chip = mtd->priv;
>> +struct fsl_elbc_mtd *priv = chip->priv;
>> +struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand;
>> +void *
On Nov 24, 2011, at 6:43 PM, Benjamin Herrenschmidt wrote:
> On Mon, 2011-10-10 at 15:50 -0500, Becky Bruce wrote:
>
> .../...
>
>> #ifdef CONFIG_PPC_MM_SLICES
>> -psize = mmu_get_tsize(get_slice_psize(mm, ea));
>> -tsize = mmu_get_psize(psize);
>> +psize = get_slice_psize(mm, ea);
On Thu, Nov 24, 2011 at 08:12:25AM +, Shi Xuelin-B29237 wrote:
> Hi Ira,
>
> Thanks for your review.
>
> After second thought, I think your scenario may not occur.
> Because the cookie 20 we query must be returned by fsl_dma_tx_submit(...) in
> practice.
> We never query a cookie not return
On Mon, Nov 28, 2011 at 11:04 AM, Kumar Gala wrote:
>
> On Nov 24, 2011, at 11:35 PM, Anton Blanchard wrote:
>
>>
>> On a 64bit book3s machine I have an oops from a system reset that
>> claims the book3e CE bit was set:
>>
>> MSR: 80021032 CR: 24004082 XER: 0010
>>
>> On a book3s ma
On Nov 24, 2011, at 11:35 PM, Anton Blanchard wrote:
>
> On a 64bit book3s machine I have an oops from a system reset that
> claims the book3e CE bit was set:
>
> MSR: 80021032 CR: 24004082 XER: 0010
>
> On a book3s machine system reset sets IBM bit 46 and 47 depending on
> the
On Nov 24, 2011, at 6:43 PM, Benjamin Herrenschmidt wrote:
> On Mon, 2011-10-10 at 15:50 -0500, Becky Bruce wrote:
>
> .../...
>
>> #ifdef CONFIG_PPC_MM_SLICES
>> -psize = mmu_get_tsize(get_slice_psize(mm, ea));
>> -tsize = mmu_get_psize(psize);
>> +psize = get_slice_psize(mm, ea);
On 11/28/2011 12:30 PM, Wolfgang Grandegger wrote:
> This driver works with both, static platform data and device tree
> bindings. It has been tested on a TQM855L board with two AN82527
> CAN controllers on the local bus.
>
> CC: devicetree-disc...@lists.ozlabs.org
> CC: linuxppc-...@ozlabs.org
>
On Sun, Nov 27, 2011 at 11:37 AM, acrux wrote:
>
> Acube Sam460ex has SM502 as onboard video.
> I got this with any kernel newer than 2.6.38.x thus the framebuffer is lost
> too:
>
> root@sam4x0:~# diff dmesg-2.6.38.8 dmesg-2.6.39.4
> 1,2c1,3
> < Using PowerPC 44x Platform machine description
> <
Hi Kumar,
> > static void register_decrementer_clockevent(int cpu)
> > {
> > struct clock_event_device *dec = &per_cpu(decrementers,
> > cpu).event; @@ -955,7 +928,8 @@ static void __init
> > init_decrementer_cloc {
> > int cpu = smp_processor_id();
> >
> > - setup_clockevent_multiplie
This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
.../devi
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 19 ++
On 11/28/2011 04:37 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2011-11-17 at 16:59 +0530, Deepthi Dharwar wrote:
>> This patch makes pseries_idle_driver not to be registered when
>> power_save=off kernel boot option is specified. The
>> boot_option_idle_override variable used here is similar to
>
On 11/28/2011 04:35 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2011-11-17 at 16:58 +0530, Deepthi Dharwar wrote:
>> This patch enables cpuidle for pSeries and cpuidle_idle_call() is
>> directly called from the idle loop. As a result pseries_idle cpuidle
>> driver registered with cpuidle subsystem
On 11/28/2011 04:33 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2011-11-17 at 16:58 +0530, Deepthi Dharwar wrote:
>> This patch implements a backhand cpuidle driver for pSeries
>> based on pseries_dedicated_idle_loop and pseries_shared_idle_loop
>> routines. The driver is built only if CONFIG_CPU
Hi Ben,
Thanks a lot for the review.
On 11/28/2011 04:18 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2011-11-17 at 16:58 +0530, Deepthi Dharwar wrote:
>> This patch provides cpu_idle_wait() routine for the powerpc
>> platform which is required by the cpuidle subsystem. This
>> routine is requied
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