Arshad, Farrukh wrote:
> Hi Tiejun,
>
> Thanks for your response. Yes, I am running two kernels one on each core in
> SAMP configuration on P1022RDK board. Given is my memory partitioning. Core 0
> is loading fine but Core 1 is not loading. CONFIG_RELOCATABLE is not set.
>
> ---
Hi Tiejun,
Thanks for your response. Yes, I am running two kernels one on each core in
SAMP configuration on P1022RDK board. Given is my memory partitioning. Core 0
is loading fine but Core 1 is not loading. CONFIG_RELOCATABLE is not set.
Hi Greg,
Today's linux-next merge of the driver-core tree got a conflict in
arch/powerpc/kernel/sysfs.c between commit 595fe91447b0 ("powerpc: Export
PIR data through sysfs") from the powerpc tree and commits 8a25a2fd126c
("cpu: convert 'cpu' and 'machinecheck' sysdev_class to a regular
subsystem"
On Sun, 2011-12-25 at 11:48 +0100, Alexander Graf wrote:
> On 24.12.2011, at 07:53, Benjamin Herrenschmidt wrote:
>
> > On Fri, 2011-12-23 at 17:54 +0100, Alexander Graf wrote:
> >> Hi guys,
> >>
> >> While trying to test my latest patch queue for ppc kvm, I realized
> >> that even though the dev
From: Tang Yuantian
The p1024rdb has the similar feature as the p1020rdb. Therefore, p1024rdb use
the same platform file as the p1/p2 rdb board.
Overview of P2020RDB platform
- DDR3 1G
- NOR flash 16M
- 3 Ethernet interfaces
- NAND Flash 32M
- SPI EEPROM 16
From: Tang Yuantian
P2020RDB-PC Board shares the same design(PCB) as P102x RDB style platforms.
The difference between this platform and the already existing P2020RDB
is mainly with respect to DDR. The P2020RDB-PC has a DDR3 memory.
The P2020RDB-PC also has a CPLD device connected to local bus.
Hi,
On a custom board based on MPC8260 I have to replace end-of-life
2GB Sandisk mDoc H3 by other storage device of comparable density.
The most natural choice seems to be NAND connected to UPM.
However FSL UPM NAND driver in mainline does not support MPC82xx.
I have several questions in this reg
From: Xie Xiaobo
Date: Tue, 27 Dec 2011 17:48:48 +0800
> * Revert commit "ucc_geth: Fix hangs after switching from full to half duplex"
> This commit impacted the driver in all link state change more than
> duplex change.
> * Change some parameters.
> Increased the BD ring length.
>
> Sign
On Tue, 2011-12-27 at 09:25 +0100, Marek Szyprowski wrote:
[...]
> > > Usually these drivers don't touch the buffer data at all, so the mapping
> > > in kernel virtual address space is not needed. We can introduce
> > > DMA_ATTRIB_NO_KERNEL_MAPPING attribute which lets kernel to skip/ignore
> > > c
Integrated Flash Controller(IFC) can be used to hook NAND Flash
chips using NAND Flash Machine available on it.
Signed-off-by: Dipen Dudhat
Signed-off-by: Scott Wood
Signed-off-by: Li Yang
Signed-off-by: Liu Shuo
Signed-off-by: Prabhakar Kushwaha
---
Based upon git://git.kernel.org/pub/scm/l
Integrated Flash Controller supports various flashes like NOR, NAND
and other devices using NOR, NAND and GPCM Machine available on it.
IFC supports four chip selects.
Signed-off-by: Dipen Dudhat
Signed-off-by: Scott Wood
Signed-off-by: Li Yang
Signed-off-by: Liu Shuo
Signed-off-by: Prabhakar
Integrated Flash Controller supports various flashes like NOR, NAND
and other devices using NOR, NAND and GPCM Machine available on it.
IFC supports four chip selects.
Signed-off-by: Dipen Dudhat
Signed-off-by: Scott Wood
Signed-off-by: Li Yang
Signed-off-by: Liu Shuo
Signed-off-by: Prabhakar
On certain chip like MPC8536 and P1022, system can be waked up from
sleep by user-defined packet and Magic Patcket.(The eTSEC cannot
supports both types of wake-up event simultaneously.) This patch
implements wake-up on user-defined patcket including ARP request
packet and unicast patcket to this s
From: Li Yang
Some 85xx silicons like MPC8536 and P1022 have a JOG feature, which provides
a dynamic mechanism to lower or raise the CPU core clock at runtime.
This patch adds the support to change CPU frequency using the standard
cpufreq interface. The ratio CORE to CCB can be 1:1(except MPC853
Arshad, Farrukh wrote:
> Greetings All,
>
> I have a basic question. I have 512 MB memory. I want my kernel to use only
> last 128 MB of memory starting from address 0x1000. I have configured the
> kernel CONFIG_PHYSICAL_START=0x1000 and in kernel boot parameter I have
> set mem=128M. I
>
> * Revert commit "ucc_geth: Fix hangs after switching from full to half duplex"
> This commit impacted the driver in all link state change more than
> duplex change.
hmm, so what will happen now when switching from full to half duplex? Will it
just hang? If so
that doesn't seem like an imp
* Revert commit "ucc_geth: Fix hangs after switching from full to half duplex"
This commit impacted the driver in all link state change more than
duplex change.
* Change some parameters.
Increased the BD ring length.
Signed-off-by: Haiying Wang
Signed-off-by: Xie Xiaobo
---
drivers/net/et
Hello,
On Friday, December 23, 2011 5:35 PM Matthew Wilcox wrote:
> On Fri, Dec 23, 2011 at 01:27:19PM +0100, Marek Szyprowski wrote:
> > The first issue we identified is the fact that on some platform (again,
> > mainly ARM) there are several functions for allocating DMA buffers:
> > dma_alloc_c
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