On P7 systems, users can define SMT priority levels 2,3 and 4 for
processes so that some can run higher priority than the other ones.
In the current kernel, the default priority is set to 4 which prohibits
processes for using higher priority. Also the kernel boosts the priority to
4 during
The first instruction in ACCOUNT_CPU_USER_ENTRY is 'beq' which checkes for
exceptions coming from kernel mode. PPR value will be saved immediately after
ACCOUNT_CPU_USER_ENTRY and is also for user level exceptions. So moved this
branch instruction in the caller code.
Signed-off-by: Haren Myneni
enable_ppr kernel parameter is used to enable PPR save and restore.
Supported on Power7 and later processors.
By default, CPU_FTR_HAS_PPR is set for POWER7. If this parameter is not
passed, disable CPU_FTR_HAS_PPR.
Signed-off-by: Haren Myneni ha...@us.ibm.com
---
ppr in thread_info is used to save PPR and restore it before process exits
from kernel.
This patch sets the default priority to 3 when tasks are created such
that users can use 4 for higher priority tasks.
Signed-off-by: Haren Myneni ha...@us.ibm.com
---
arch/powerpc/include/asm/thread_info.h
Using paca to save user defined PPR value in the first level exception vector.
Signed-off-by: Haren Myneni ha...@us.ibm.com
---
arch/powerpc/include/asm/exception-64s.h |1 +
arch/powerpc/include/asm/paca.h |6 +++---
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git
Several macros are defined for saving and restore user defined PPR value.
Signed-off-by: Haren Myneni ha...@us.ibm.com
---
arch/powerpc/include/asm/exception-64s.h | 35 ++
arch/powerpc/include/asm/reg.h |1 +
2 files changed, 36 insertions(+)
diff
When the task enters in to kernel space, the user defined priority (PPR)
will be saved in to PACA at the beginning of first level exception
vector and then copy from PACA to thread_info in second level vector.
PPR will be restored from thread_info before exits the kernel space.
P7 temporarily
On Sep 7, 2012, at 5:08 PM, Bjorn Helgaas wrote:
On Mon, Aug 6, 2012 at 8:45 PM, Zang Roy-R61911 r61...@freescale.com wrote:
-Original Message-
From: Linuxppc-dev [mailto:linuxppc-dev-bounces+tie-
fei.zang=freescale@lists.ozlabs.org] On Behalf Of Liu Shengzhou-B36685
Sent:
On Sun, Sep 9, 2012 at 10:41 PM, Geert Uytterhoeven
ge...@linux-m68k.org wrote:
JFYI, when comparing v3.6-rc5 to v3.6-rc4[3], the summaries are:
- build errors: +15/-4
+ arch/powerpc/platforms/512x/mpc512x_shared.c: error:
'FSL_DIU_PORT_DVI' undeclared (first use in this function): = 189:9
On Thu, 2012-08-30 at 15:49 -0500, Kumar Gala wrote:
On Aug 24, 2012, at 5:50 AM, Shaohui Xie wrote:
PowerPC platform only supports ZONE_DMA zone for 64bit kernel, so all the
memory will be put into this zone. If the memory size is greater than
the device's DMA capability and device uses
On Sat, 2012-09-08 at 16:44 +0800, Gavin Shan wrote:
The patch does cleanup on EEH PCI address cache based on the fact
EEH core is the only user of the component.
* Cleanup on function names so that they all have prefix
eeh and looks more short.
* Function printk()
On Mon, Sep 10, 2012 at 09:59:43AM +1000, Benjamin Herrenschmidt wrote:
On Sat, 2012-09-08 at 16:44 +0800, Gavin Shan wrote:
The patch does cleanup on EEH PCI address cache based on the fact
EEH core is the only user of the component.
* Cleanup on function names so that they all have
On Sun, 2012-09-09 at 04:36 -0700, Haren Myneni wrote:
The first instruction in ACCOUNT_CPU_USER_ENTRY is 'beq' which checkes for
exceptions coming from kernel mode. PPR value will be saved immediately after
ACCOUNT_CPU_USER_ENTRY and is also for user level exceptions. So moved this
branch
On Sun, 2012-09-09 at 04:37 -0700, Haren Myneni wrote:
enable_ppr kernel parameter is used to enable PPR save and restore.
Supported on Power7 and later processors.
By default, CPU_FTR_HAS_PPR is set for POWER7. If this parameter is not
passed, disable CPU_FTR_HAS_PPR.
What is the point ?
Benjamin Herrenschmidt b...@kernel.crashing.org wrote:
On Sun, 2012-09-09 at 04:37 -0700, Haren Myneni wrote:
enable_ppr kernel parameter is used to enable PPR save and restore.
Supported on Power7 and later processors.
By default, CPU_FTR_HAS_PPR is set for POWER7. If this parameter is
Hi Wen,
2012/09/01 5:49, Andrew Morton wrote:
On Tue, 28 Aug 2012 18:00:07 +0800
we...@cn.fujitsu.com wrote:
This patch series aims to support physical memory hot-remove.
Have you had much review and testing feedback yet?
The patches can free/remove the following things:
-
At 09/10/2012 09:46 AM, Yasuaki Ishimatsu Wrote:
Hi Wen,
2012/09/01 5:49, Andrew Morton wrote:
On Tue, 28 Aug 2012 18:00:07 +0800
we...@cn.fujitsu.com wrote:
This patch series aims to support physical memory hot-remove.
Have you had much review and testing feedback yet?
The patches can
On Wed, Sep 05, 2012 at 11:19:35AM +1000, Alexey Kardashevskiy wrote:
The upcoming VFIO support requires a way to know which
entry in the TCE map is not empty in order to do cleanup
at QEMU exit/crash. This patch adds such functionality
to POWERNV platform code.
Signed-off-by: Alexey
+ /* Workaround for data length mismatch errata */
+ if (unlikely(hstatus INT_ON_DATA_LENGTH_MISMATCH)) {
+ for (tag = 0; tag ATA_MAX_QUEUE; tag++) {
+ qc = ata_qc_from_tag(ap, tag);
+ if (qc ata_is_atapi(qc-tf.protocol)) {
+
On Mon, Sep 10, 2012 at 10:51:22AM +0800, Gavin Shan wrote:
Hi Fengguang,
Hi Gavin,
FYI, kernel build failed on
tree: git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next
head: 4715fed600109e0bd3d6cfa2b925a643173a08b4
commit: 22f4ab123f10e1862579785c73d9e60fa24afd4f
On Sun, 2012-09-09 at 04:43 -0700, Haren Myneni wrote:
Several macros are defined for saving and restore user defined PPR value.
Signed-off-by: Haren Myneni ha...@us.ibm.com
---
arch/powerpc/include/asm/exception-64s.h | 35
++
arch/powerpc/include/asm/reg.h
On Mon, 2012-07-23 at 15:46 +0530, Bharat Bhushan wrote:
On powerpc64 machine get/put_user64() is same as get/put_user() while
on powerpc32 machine get_user64 is different. With this patch we can
use get_user64() and put_user64() on 32 and 64 bit machines.
Signed-off-by: Bharat Bhushan
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 8d21cc4..034dbb7 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -33,6 +33,7 @@
#include asm/irqflags.h
#include asm/ftrace.h
#include asm/hw_irq.h
+#include
There are a few tracepoints in the interrupt code path, which is before
irq_enter(), or after irq_exit(), like
trace_irq_entry()/trace_irq_exit() in do_IRQ(),
trace_timer_interrupt_entry()/trace_timer_interrupt_exit() in
timer_interrupt().
If the interrupt is from idle(), and because tracepoint
On Mon, 2012-09-10 at 12:58 +0800, Li Zhong wrote:
There are a few tracepoints in the interrupt code path, which is before
irq_enter(), or after irq_exit(), like
trace_irq_entry()/trace_irq_exit() in do_IRQ(),
trace_timer_interrupt_entry()/trace_timer_interrupt_exit() in
timer_interrupt().
On Mon, 2012-09-10 at 10:51 +0800, Gavin Shan wrote:
The global functions eeh_pe_get() and eeh_pe_get_parent() will be used
by subsequent patches. I think ppc/next merged 23 patches for EEH core
this time. I'm not sure I should refactor those patches to avoid the
build failure? :-)
No,
On Mon, 2012-09-10 at 12:35 +1000, David Gibson wrote:
Looks good to me. Ben, do you plan to merge this soon?
Yes, it will hit powerpc-next any minute now.
Cheers,
Ben.
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On Sat, 2012-09-08 at 22:27 +0530, Aneesh Kumar K.V wrote:
.../...
slice array size and slice mask size depend on PGTABLE_RANGE. We
can't directly include pgtable.h in these header because there is
a circular dependency. So split the pgtable range into a separate
header and include that
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