On Tue, 2013-12-10 at 08:39 +0100, Philippe Bergheaud wrote:
> All the important PThread locking occurs in GLIBC libpthread.so
>
> For scaling to large core counts we need to stay out of the kernel and
> scheduler as much as possible which implies increasing the spin time in user
> mode. For POW
On Wed, Dec 11, 2013 at 02:54:40PM +1100, Paul Mackerras wrote:
> On Thu, Oct 31, 2013 at 01:38:58PM -0500, Tom wrote:
> > From: Tom Musta
> >
> > This patch addresses unaligned single precision floating point loads
> > and stores in the single-step code. The old implementation
> > improperly tr
On Thu, Oct 31, 2013 at 01:38:58PM -0500, Tom wrote:
> From: Tom Musta
>
> This patch addresses unaligned single precision floating point loads
> and stores in the single-step code. The old implementation
> improperly treated an 8 byte structure as an array of two 4 byte
> words, which is a clas
Alexander Graf writes:
> On 10.12.2013, at 15:21, Aneesh Kumar K.V
> wrote:
>
>> From: "Aneesh Kumar K.V"
>>
>> We already checked need_resched. So we can call schedule directly
>>
>> Signed-off-by: Aneesh Kumar K.V
>
> The real fix for the issue you're seeing is
>
> https://lkml.org/lkml
Today, the only way to load kernels whose size is greater than 8Mbytes is to
activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is
limited to 8Mbytes. This patch adds the capability to select the size of initial
memory between 8/16/24 Mbytes and this is regardless of whether C
From: "Aneesh Kumar K.V"
We already checked need_resched. So we can call schedule directly
Signed-off-by: Aneesh Kumar K.V
---
NOTE: This patch also work around a regression upstream w.r.t PR KVM
BUG: soft lockup - CPU#0 stuck for 23s! [qemu-system-ppc:4394]
Modules linked in:
CPU: 0 PID:
adjust (expand on or move) a few comments,
add markers for easier navigation around helpers
Signed-off-by: Gerhard Sittig
---
arch/powerpc/platforms/512x/clock-commonclk.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-comm
this series improves the previously introduced common clock support for
MPC512x such that SoC variants 5123 and 5125 get addressed appropriately
(MPC5125 turned out to be rather different from MPC5121 than I perceived
before -- there is much more than "just two FECs and no MBX")
thus this series d
improve the common clock support code for MPC512x
- expand the CCM register set declaration with MPC5125 related registers
(which reside in the previously "reserved" area)
- tell the MPC5121, MPC5123, and MPC5125 SoC variants apart, and derive
the availability of components and their clocks fr
Le 11/12/2013 00:18, Scott Wood a écrit :
On Wed, 2013-12-11 at 00:05 +0100, leroy christophe wrote:
Le 10/12/2013 23:24, Scott Wood a écrit :
On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote:
Today, the only way to load kernels whose size is greater than 8Mbytes is to
activate CONFI
On Wed, 2013-12-11 at 00:05 +0100, leroy christophe wrote:
> Le 10/12/2013 23:24, Scott Wood a écrit :
> > On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote:
> >> Today, the only way to load kernels whose size is greater than 8Mbytes is
> >> to
> >> activate CONFIG_PIN_TLB. Otherwise, the
Hi Mark,
Is there some reason you've excluded OpenRISC here? Did you just miss
it, or does the implementation diverage too much to be usable with
your generic version?
Regards,
Jonas
On 25 November 2013 17:13, Mark Salter wrote:
> Many architectures provide an asm/fixmap.h which defines suppor
add clock related specs to the MPC5125 "tower" board DTS
- add clock providers (crystal/oscillator, clock control module)
- add consumers (the CAN, SDHC, I2C, DIU, FEC, USB, PSC peripherals)
Signed-off-by: Gerhard Sittig
---
arch/powerpc/boot/dts/mpc5125twr.dts | 53 +++
On Tue, 2013-12-10 at 15:40 +0100, Alexander Graf wrote:
> On 10.12.2013, at 15:21, Aneesh Kumar K.V
> wrote:
>
> > From: "Aneesh Kumar K.V"
> >
> > We already checked need_resched. So we can call schedule directly
> >
> > Signed-off-by: Aneesh Kumar K.V
>
> The real fix for the issue you'r
From: Joseph Myers
The e500 SPE floating-point emulation code clears existing exceptions
(__FPU_FPSCR &= ~FP_EX_MASK;) before ORing in the exceptions from the
emulated operation. However, these exception bits are the "sticky",
cumulative exception bits, and should only be cleared by the user
pro
Le 10/12/2013 23:24, Scott Wood a écrit :
On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote:
Today, the only way to load kernels whose size is greater than 8Mbytes is to
activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is
limited to 8Mbytes. This patch adds the c
On Tue, 2013-12-10 at 23:48 +0100, Peter Zijlstra wrote:
>
> Yeah, I went on holidays and the patch just sat there. I'll prod Ingo
> into merging it.
Thanks !
Cheers,
Ben.
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozla
On 10.12.2013, at 15:21, Aneesh Kumar K.V
wrote:
> From: "Aneesh Kumar K.V"
>
> We already checked need_resched. So we can call schedule directly
>
> Signed-off-by: Aneesh Kumar K.V
The real fix for the issue you're seeing is
https://lkml.org/lkml/2013/11/28/241
Alex
On 10.12.2013, at 17:08, Aneesh Kumar K.V
wrote:
> Alexander Graf writes:
>
>> On 10.12.2013, at 15:21, Aneesh Kumar K.V
>> wrote:
>>
>>> From: "Aneesh Kumar K.V"
>>>
>>> We already checked need_resched. So we can call schedule directly
>>>
>>> Signed-off-by: Aneesh Kumar K.V
>>
>> Th
the SDHC clock is derived from CSB with a fractional divider which can
address "quarters"; the implementation multiplies CSB by 4 and divides
it by the (integer) divider value
a bug in the clock domain synchronisation requires that only even
divider values get setup; we achieve this by
- multiplyi
On Wed, Dec 11, 2013 at 07:52:51AM +1100, Benjamin Herrenschmidt wrote:
> On Tue, 2013-12-10 at 15:40 +0100, Alexander Graf wrote:
> > On 10.12.2013, at 15:21, Aneesh Kumar K.V
> > wrote:
> >
> > > From: "Aneesh Kumar K.V"
> > >
> > > We already checked need_resched. So we can call schedule di
My e-mail address is , not
On Tue, 2013-12-10 at 05:37 +, bharat.bhus...@freescale.com wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Saturday, December 07, 2013 12:55 AM
> > To: Bhushan Bharat-R65777
> > Cc: Alex Williamson; linux-...@vger.kernel.org; ag...@su
On Mon, Dec 9, 2013 at 8:59 PM, Benjamin Herrenschmidt wrote:
> On Mon, 2013-12-09 at 17:01 -0700, Bjorn Helgaas wrote:
>> [+cc arch lists]
>>
>> On Thu, Dec 05, 2013 at 07:52:53PM +0800, Yijing Wang wrote:
>> > Use dev_is_pci() instead of directly compare
>> > pci_bus_type to check whether it is
[ trimmed Cc: list to PowerPC and CCF ]
On Sat, Nov 30, 2013 at 23:51 +0100, Gerhard Sittig wrote:
>
> this series introduces support for the common clock framework (CCF,
> COMMON_CLK Kconfig option) in the PowerPC based MPC512x platform,
> which brings device tree based clock lookup as well
For
On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote:
> Today, the only way to load kernels whose size is greater than 8Mbytes is to
> activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is
> limited to 8Mbytes. This patch adds the capability to select the size of
> initi
On Tue, 2013-12-10 at 18:33 +0800, Hongbo Zhang wrote:
> Scott,
> This issue is due to the non-continuous MPIC register, I think there is
> two ways to fix it.
>
> The first one is as what we are discussing, in fact the Bman/Qman DT
> author had introduced this way, and I had to follow it, it is
On Tue, Dec 10, 2013 at 11:05 +0100, Gerhard Sittig wrote:
>
> FYI: I only noticed yesterday that MPC5125 suffers from the same
> issue, have sent <1386669068-2477-1-git-send-email-...@denx.de>
> to fix that as well. Both patches may get squashed when going
> upstream. Don't have a dump at hand
Scott,
This issue is due to the non-continuous MPIC register, I think there is
two ways to fix it.
The first one is as what we are discussing, in fact the Bman/Qman DT
author had introduced this way, and I had to follow it, it is a trick,
adding 208 is a bit ugly I think, and even difficult t
[ Cc: to Matteo as well ]
On Tue, Dec 03, 2013 at 15:04 +0100, Anatolij Gustschin wrote:
>
> On Tue, 3 Dec 2013 11:56:52 +0100
> Gerhard Sittig wrote:
>
> > the 'soc' node in the common .dtsi for MPC5121 has an '#interrupt-cells'
> > property although this node is not an interrupt controller
>
the 'soc' node in the MPC5125 "tower" board .dts has an '#interrupt-cells'
property although this node is not an interrupt controller
remove this erroneously placed property because starting with v3.13-rc1
lookup and resolution of 'interrupts' specs for peripherals gets misled
(tries to use the 's
> -Original Message-
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Tuesday, December 10, 2013 11:23 AM
> To: Bhushan Bharat-R65777
> Cc: Wood Scott-B07421; linux-...@vger.kernel.org; ag...@suse.de; Yoder Stuart-
> B08248; io...@lists.linux-foundation.org; bhelg...@go
For allocating resource under bus path, we do not have dev to pass along,
and we only have bus to use instead.
-v2: drop pcibios_bus_addr_to_resource().
-v3: drop __* change requested by Bjorn.
Signed-off-by: Yinghai Lu
Cc: linux-al...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: sparcl
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