The PCI core can already deal with that. An MSI chip can be set per bus
and the weak pcibios_add_bus() can be used to set that. Often it might
not even be necessary to do it via pcibios_add_bus() if you create the
root bus directly, since you can attach the MSI chip at that time.
But I'm
On Thu, Sep 25, 2014 at 02:27:47PM +1000, Michael Ellerman wrote:
On Tue, 2014-26-08 at 07:56:16 UTC, Gavin Shan wrote:
From: Mike Qiu qiud...@linux.vnet.ibm.com
The patch synchronizes firmware header file (opal.h) for PCI error
injection.
diff --git a/arch/powerpc/include/asm/opal.h
On Fri, Sep 26, 2014 at 10:04:45AM +0800, Yijing Wang wrote:
On 2014/9/25 15:19, Thierry Reding wrote:
On Thu, Sep 25, 2014 at 11:14:13AM +0800, Yijing Wang wrote:
Currently, pcie-designware, pcie-rcar, pci-tegra drivers
use irq chip_data to save the msi_chip pointer. They
already call
On Thu, Sep 25, 2014 at 11:14:13AM +0800, Yijing Wang wrote:
Currently, pcie-designware, pcie-rcar, pci-tegra drivers
use irq chip_data to save the msi_chip pointer. They
already call irq_set_chip_data() in their own MSI irq map
functions. So irq_set_chip_data() in arch_setup_msi_irq()
is
On Fri, Sep 26, 2014 at 11:42:23AM +0800, Yijing Wang wrote:
I am actually in disagreement with you, Thierry. I don't like the general
direction
of the patches, or at least I don't like the fact that we don't have a
portable
way of setting up the msi_chip without having to rely on weak
On Fri, Sep 26, 2014 at 02:20:35PM +0800, Yijing Wang wrote:
The PCI core can already deal with that. An MSI chip can be set per bus
and the weak pcibios_add_bus() can be used to set that. Often it might
not even be necessary to do it via pcibios_add_bus() if you create the
root bus
On Fri, Sep 26, 2014 at 10:54:32AM +0200, Thierry Reding wrote:
[...]
At least for Tegra it's trivial to just hook it up in tegra_pcie_scan_bus()
directly (patch attached).
Really attached this time.
Thierry
From 2cedfcf38cdfe21688d1363659f28e271ce43358 Mon Sep 17 00:00:00 2001
From: Thierry
On Fri, 26 Sep 2014, Yijing Wang wrote:
On 2014/9/25 18:38, Thomas Gleixner wrote:
On Thu, 25 Sep 2014, Yijing Wang wrote:
Introduce weak arch_find_msi_chip() to find the match msi_chip.
Currently, MSI chip associates pci bus to msi_chip. Because in
ARM platform, there may be more than
On Fri, 2014-09-26 at 14:05 +1000, Anton Blanchard wrote:
From: Ian Munsie imun...@au1.ibm.com
__spu_trap_data_seg() currently contains code to determine the VSID
and ESID required for a particular EA and mm struct.
This code is generically useful for other co-processors. This moves
On Fri, 2014-09-26 at 14:33 +1000, Anton Blanchard wrote:
From: Ian Munsie imun...@au1.ibm.com
This add a hook into tlbie() so that we use global invalidations when
there are cxl contexts active.
Normally cxl snoops broadcast tlbie. cxl can have TLB entries
invalidated via MMIO,
Hi Mikey,
We only map what a user processes maps and we tear it down when the
process is teared down (on the file descriptor release). So I think
we are ok.
Unless there's some lazy teardown you're alluding to that I'm missing?
I was trying to make sure things like the TLB batching
On 09/17/2014 07:08 AM, Igal.Liberman wrote:
From: Igal Liberman igal.liber...@freescale.com
The Frame Manager (FMan) combines the Ethernet network interfaces with packet
distribution logic to provide intelligent distribution and queuing decisions
for incoming traffic at line rate.
This
Quoting Scott Wood (2014-09-25 15:56:20)
On Thu, 2014-09-25 at 15:54 -0700, Mike Turquette wrote:
Quoting Scott Wood (2014-09-25 13:08:00)
Well, like I said, I'd rather see the CLK_OF_DECLARE stuff be made to
work on PPC rather than have the driver carry around two binding
methods.
On Wed, Sep 24, 2014 at 12:33:07PM +1000, Anton Blanchard wrote:
We are scratching our heads trying to remember details of the issue
right now. In retrospect we should have linked the gcc bugzilla or
gcc commit details in the kernel commit message :)
There have been many GCC bugs in this area.
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