Le 24/08/2019 à 02:18, Xiaowei Bao a écrit :
-Original Message-
From: Andrew Murray
Sent: 2019年8月23日 22:28
To: Xiaowei Bao
Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com;
shawn...@kernel.org; Leo Li ; kis...@ti.com;
lorenzo.pieral...@arm.co; a...@arndb.de; gre..
> -Original Message-
> From: Andrew Murray
> Sent: 2019年8月23日 21:39
> To: Xiaowei Bao
> Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com;
> shawn...@kernel.org; Leo Li ; kis...@ti.com;
> lorenzo.pieral...@arm.co; a...@arndb.de; gre...@linuxfoundation.org; M.h.
> Lian ;
> -Original Message-
> From: Andrew Murray
> Sent: 2019年8月23日 22:28
> To: Xiaowei Bao
> Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com;
> shawn...@kernel.org; Leo Li ; kis...@ti.com;
> lorenzo.pieral...@arm.co; a...@arndb.de; gre...@linuxfoundation.org; M.h.
> Lian ;
> -Original Message-
> From: Andrew Murray
> Sent: 2019年8月23日 21:58
> To: Xiaowei Bao
> Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com;
> shawn...@kernel.org; Leo Li ; kis...@ti.com;
> lorenzo.pieral...@arm.co; a...@arndb.de; gre...@linuxfoundation.org; M.h.
> Lian ;
> -Original Message-
> From: Andrew Murray
> Sent: 2019年8月23日 21:45
> To: Xiaowei Bao
> Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com;
> shawn...@kernel.org; Leo Li ; kis...@ti.com;
> lorenzo.pieral...@arm.co; a...@arndb.de; gre...@linuxfoundation.org; M.h.
> Lian ;
> -Original Message-
> From: Andrew Murray
> Sent: 2019年8月23日 21:36
> To: Xiaowei Bao
> Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com;
> shawn...@kernel.org; Leo Li ; kis...@ti.com;
> lorenzo.pieral...@arm.co; a...@arndb.de; gre...@linuxfoundation.org; M.h.
> Lian ;
> -Original Message-
> From: Andrew Murray
> Sent: 2019年8月23日 21:25
> To: Xiaowei Bao
> Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com;
> shawn...@kernel.org; Leo Li ; kis...@ti.com;
> lorenzo.pieral...@arm.co; a...@arndb.de; gre...@linuxfoundation.org; M.h.
> Lian ;
Hi Christoph,
On Fri, Aug 16, 2019 at 09:07:48AM +0200, Christoph Hellwig wrote:
> I'd still like to hear a confirmation from the mips folks how
> the write combibe attribute can or can't work with the KSEG1
> uncached segment.
Quoting section 4.8 "Cacheability and Coherency Attributes and Access
On Mon, 19 Aug 2019 11:51:17 +1000
Alexey Kardashevskiy wrote:
> The @tcegrp variable is used in 1) a loop over attached groups
> 2) it stores a pointer to a newly allocated tce_iommu_group if 1) found
> nothing. However the error handler does not distinguish how we got there
> and incorrectly re
It wasn't used anywhere, so lets drop it.
Reviewed-by: Christophe Leroy
Reviewed-by: Thiago Jung Bauermann
Signed-off-by: Sven Schnelle
---
kernel/kexec_elf.c | 4
1 file changed, 4 deletions(-)
diff --git a/kernel/kexec_elf.c b/kernel/kexec_elf.c
index 87935bd5e2ba..6c806ce96ac1 100644
The powerpc version only supported 64 bit. Add some
code to switch decoding of fields during runtime so
we can kexec a 32 bit kernel from a 64 bit kernel and
vice versa.
Signed-off-by: Sven Schnelle
Reviewed-by: Thiago Jung Bauermann
---
kernel/kexec_elf.c | 57 +
It's not used anywhere so just drop it.
Signed-off-by: Sven Schnelle
Reviewed-by: Thiago Jung Bauermann
---
kernel/kexec_elf.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/kernel/kexec_elf.c b/kernel/kexec_elf.c
index 137037603117..87935bd5e2ba 100644
--- a/kernel/kexec_elf.c
+++ b/kern
We're not using them, so we can drop the parsing.
Signed-off-by: Sven Schnelle
Reviewed-by: Thiago Jung Bauermann
---
include/linux/kexec.h | 1 -
kernel/kexec_elf.c| 137 --
2 files changed, 138 deletions(-)
diff --git a/include/linux/kexec.h b/in
Right now powerpc provides an implementation to read elf files
with the kexec_file_load() syscall. Make that available as a public
kexec interface so it can be re-used on other architectures.
Signed-off-by: Sven Schnelle
---
arch/Kconfig | 3 +
arch/powerpc/Kco
base was never assigned, so we can remove it.
Reviewed-by: Christophe Leroy
Reviewed-by: Thiago Jung Bauermann
Signed-off-by: Sven Schnelle
---
kernel/kexec_elf.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/kernel/kexec_elf.c b/kernel/kexec_elf.c
index 6c806ce96a
Change the order to have a 64/32/16 order, no functional change.
Signed-off-by: Sven Schnelle
Reviewed-by: Thiago Jung Bauermann
---
kernel/kexec_elf.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/kernel/kexec_elf.c b/kernel/kexec_elf.c
index 26c6310167a0..34
Changes to v4:
- rebase on current powerpc/merge tree
- fix syscall name in commit message
- remove a few unused #defines in arch/powerpc/kernel/kexec_elf_64.c
Changes to v3:
- add support for 32-bit ELF files
Changes to v2:
- use git format-patch -C
Changes to v1:
- split up patch into sm
Hi Claudio,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[cannot apply to v5.3-rc5 next-20190823]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits
On 08/19/2019 03:45 PM, Segher Boessenkool wrote:
On Mon, Aug 19, 2019 at 05:05:46PM +0200, Christophe Leroy wrote:
Le 19/08/2019 à 16:37, Segher Boessenkool a écrit :
On Mon, Aug 19, 2019 at 04:08:43PM +0200, Christophe Leroy wrote:
Le 19/08/2019 à 15:23, Segher Boessenkool a écrit :
On M
On Fri, 23 Aug 2019 15:32:41 +1000
Paul Mackerras wrote:
> On Mon, Aug 19, 2019 at 11:51:17AM +1000, Alexey Kardashevskiy wrote:
> > The @tcegrp variable is used in 1) a loop over attached groups
> > 2) it stores a pointer to a newly allocated tce_iommu_group if 1) found
> > nothing. However the
On Thu, Aug 22, 2019 at 07:22:40PM +0800, Xiaowei Bao wrote:
> Add PCIe EP mode support for ls1088a and ls2088a, there are some
> difference between LS1 and LS2 platform, so refactor the code of
> the EP driver.
>
> Signed-off-by: Xiaowei Bao
> ---
> v2:
> - New mechanism for layerscape EP drive
Booting a POWER9 PowerNV system generates a few messages below with
"ptrval" due to the pointers printed without a specifier
extension (i.e unadorned %p) are hashed to prevent leaking information
about the kernel memory layout.
radix-mmu: Initializing Radix MMU
radix-mmu: Partition table (
On Fri, Aug 23, 2019 at 04:26:41PM +0800, Xiaowei Bao wrote:
> Add the PCIe compatible string for LS1028A
>
> Signed-off-by: Xiaowei Bao
> Signed-off-by: Hou Zhiqiang
> Reviewed-by: Rob Herring
> ---
> v2:
> - No change.
> v3:
> - No change.
> v4:
> - No change.
>
> Documentation/devicetre
On Thu, Aug 22, 2019 at 07:22:39PM +0800, Xiaowei Bao wrote:
> The layerscape platform use the doorbell way to trigger MSIX
> interrupt in EP mode.
>
I have no problems with this patch, however...
Are you able to add to this message a reason for why you are making this
change? Did dw_pcie_ep_rai
On Thu, Aug 22, 2019 at 07:22:37PM +0800, Xiaowei Bao wrote:
> Fix some format issue of the code in EP driver.
>
> Signed-off-by: Xiaowei Bao
Reviewed-by: Andrew Murray
> ---
> v2:
> - No change.
>
> drivers/pci/controller/dwc/pci-layerscape-ep.c | 4 ++--
> 1 file changed, 2 insertions(+)
On Thu, Aug 22, 2019 at 07:22:35PM +0800, Xiaowei Bao wrote:
> Move the function of getting MSI capability to the front of init
> function, because the init function of the EP platform driver will use
> the return value by the function of getting MSI capability.
>
> Signed-off-by: Xiaowei Bao
Re
On Thu, Aug 22, 2019 at 07:22:34PM +0800, Xiaowei Bao wrote:
> Add the doorbell mode of MSI-X in EP mode.
>
> Signed-off-by: Xiaowei Bao
> ---
> v2:
> - Remove the macro of no used.
>
> drivers/pci/controller/dwc/pcie-designware-ep.c | 14 ++
> drivers/pci/controller/dwc/pcie-desig
On Thu, Aug 22, 2019 at 07:22:33PM +0800, Xiaowei Bao wrote:
> Add multiple PFs support for DWC, different PF have different config space
> we use pf-offset property which get from the DTS to access the different pF
> config space.
It looks like you're missing a --cover-letter again.
>
> Signed-
If no BAT is given to setbat(), select an available BAT.
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/book3s32/mmu.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/book3s32/mmu.c b/arch/powerpc/mm/book3s32/mmu.c
index 50a1991d257f..5f08b93e
On mpc83xx with a QE, IMMR is 2Mbytes.
On mpc83xx without a QE, IMMR is 1Mbytes.
Each driver will map a part of it to access the registers it needs.
Some driver will map the same part of IMMR as other drivers.
In order to reduce TLB misses, map the full IMMR with a BAT.
Signed-off-by: Christophe
Hi Claudio,
Claudio Carvalho writes:
> Ultravisor (UV) provides an in-memory console which follows the OPAL
> in-memory console structure.
>
> This patch extends the OPAL msglog code to also initialize the UV memory
> console and provide a sysfs interface (uv_msglog) for userspace to view
> the U
Currently if we oops or warn while function_graph is active the stack
trace looks like:
.trace_graph_return+0xac/0x100
.ftrace_return_to_handler+0x98/0x140
.return_to_handler+0x20/0x40
.return_to_handler+0x0/0x40
.return_to_handler+0x0/0x40
.return_to_handler+0x0/0x40
.return_to_handl
Paul Mackerras writes:
> On Thu, Aug 22, 2019 at 03:56:13PM +0530, Bharata B Rao wrote:
>> A pseries guest can be run as a secure guest on Ultravisor-enabled
>> POWER platforms. On such platforms, this driver will be used to manage
>> the movement of guest pages between the normal memory managed b
When not using large TLBs, the IMMR region is still
mapped as a whole block in the FIXMAP area.
Do not remove pages mapped in the FIXMAP region when
initialising paging.
Properly report that the IMMR region is block-mapped even
when not using large TLBs.
Signed-off-by: Christophe Leroy
---
arc
Commit d2f15e0979ee ("powerpc/32: always populate page tables for
Abatron BDI.") wrongly sets page tables for any PPC32 for using BDI,
and does't update them after init (remove RX on init section, set
text and rodata read-only)
Only the 8xx requires page tables to be populated for using the BDI.
T
LS1028a implements 2 PCIe 3.0 controllers.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
v2:
- Fix up the legacy INTx allocate failed issue.
v3:
- No change.
v4:
- Remove the num-lanes proparty.
depends on: https://patchwork.kernel.org/project/linux-pci/list/?series=162215
arch
Add support for the LS1028a PCIe controller.
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
---
v2:
- No change.
v3:
- Reuse the ls2088 driver data structurt.
v4:
- No change.
drivers/pci/controller/dwc/pci-layerscape.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci
Add the PCIe compatible string for LS1028A
Signed-off-by: Xiaowei Bao
Signed-off-by: Hou Zhiqiang
Reviewed-by: Rob Herring
---
v2:
- No change.
v3:
- No change.
v4:
- No change.
Documentation/devicetree/bindings/pci/layerscape-pci.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Doc
On Thu, Aug 22, 2019 at 08:12:34PM +0530, Srikar Dronamraju wrote:
> Currently the kernel detects if its running on a shared lpar platform
> and requests home node associativity before the scheduler sched_domains
> are setup. However between the time NUMA setup is initialized and the
> request for
Removed threshold latency which was being used to decide if a state
is cpuidle type or not. This decision can be taken using flags, as this
information has been encapsulated in the state->flags and being read
from idle device-tree.
Signed-off-by: Abhishek Goel
---
arch/powerpc/include/asm/opal-a
New device tree format adds a compatible flag which has version
corresponding to every state, so that only kernel which has the capability
to handle the version of stop state will enable it. Drawback of the array
based dt node is that versioning of idle states is not possible.
Older kernel will st
Instead of passing psscr_val and psscr_mask, we will pass state pointer
to stop loop. This will help to figure out the method to enter/exit idle
state. Removed psscr_mask and psscr_val from driver idle code. Same has
also been done in platform idle code.
Also, added some cleanups and debugging info
Background
--
Previously if a older kernel runs on a newer firmware, it may enable
all available states irrespective of its capability of handling it.
Consider a case that some stop state has a bug, we end up disabling all
the stop states. This patch introduces selective control to
Claudio Carvalho writes:
> In PEF enabled systems, some of the resources which were previously
> hypervisor privileged are now ultravisor privileged and controlled by
> the ultravisor firmware.
>
> This adds FW_FEATURE_ULTRAVISOR to indicate if PEF is enabled.
>
> The host kernel can use FW_FEATU
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