[PATCH 0/2] powerpc/cacheinfo: Add "ibm,thread-groups" awareness

From: "Gautham R. Shenoy" Hi, Currently the cacheinfo code on powerpc indexes the "cache" objects (modelling the L1/L2/L3 caches) where the key is device-tree node corresponding to that cache. On some of the POWER server platforms thread-groups within the core share different sets of caches (Eg:

[PATCH 2/2] powerpc/cacheinfo: Remove the redundant get_shared_cpu_map()

From: "Gautham R. Shenoy" The helper function get_shared_cpu_map() was added in 'commit 500fe5f550ec ("powerpc/cacheinfo: Report the correct shared_cpu_map on big-cores")' and subsequently expanded upon in 'commit 0be47634db0b ("powerpc/cacheinfo: Print correct cache-sibling map/list for L2 ca

[PATCH 1/2] powerpc/cacheinfo: Lookup cache by dt node and thread-group id

From: "Gautham R. Shenoy" Currently the cacheinfo code on powerpc indexes the "cache" objects (modelling the L1/L2/L3 caches) where the key is device-tree node corresponding to that cache. On some of the POWER server platforms thread-groups within the core share different sets of caches (Eg: On S

Re: [RFC Qemu PATCH v2 1/2] spapr: drc: Add support for async hcalls at the drc level

Thanks for the comments! On 12/28/20 2:08 PM, David Gibson wrote: On Mon, Dec 21, 2020 at 01:08:53PM +0100, Greg Kurz wrote: ... The overall idea looks good but I think you should consider using a thread pool to implement it. See below. I am not convinced, however. Specifically, attaching

Re: [PATCH] selftests/powerpc: Fix exit status of pkey tests

Sandipan Das writes: > Since main() does not return a value explicitly, the > return values from FAIL_IF() conditions are ignored > and the tests can still pass irrespective of failures. > This makes sure that we always explicitly return the > correct test exit status. > Reviewed-by: Aneesh Kuma

[PATCH] selftests/powerpc: Only test lwm/stmw on big endian

Newer binutils (>= 2.36) refuse to assemble lmw/stmw when building in little endian mode. That breaks compilation of our alignment handler test: /tmp/cco4l14N.s: Assembler messages: /tmp/cco4l14N.s:1440: Error: `lmw' invalid when little-endian /tmp/cco4l14N.s:1814: Error: `stmw' invalid when

Re: [PATCH v3] powerpc/mce: Remove per cpu variables from MCE handlers

Excerpts from Ganesh Goudar's message of January 15, 2021 10:58 pm: > Access to per-cpu variables requires translation to be enabled on > pseries machine running in hash mmu mode, Since part of MCE handler > runs in realmode and part of MCE handling code is shared between ppc > architectures pserie

Re: [PATCH 1/4] KVM: PPC: Book3S HV: Remove support for running HPT guest on RPT host without mixed mode support

Excerpts from Fabiano Rosas's message of January 19, 2021 11:46 am: > Resending because the previous got spam-filtered: > > Nicholas Piggin writes: > >> This reverts much of commit c01015091a770 ("KVM: PPC: Book3S HV: Run HPT >> guests on POWER9 radix hosts"), which was required to run HPT guest

Re: [PATCH v3 1/8] powerpc/uaccess: Add unsafe_copy_from_user

"Christopher M. Riedl" writes: > On Mon Jan 11, 2021 at 7:22 AM CST, Christophe Leroy wrote: >> Le 09/01/2021 à 04:25, Christopher M. Riedl a écrit : >> > Implement raw_copy_from_user_allowed() which assumes that userspace read >> > access is open. Use this new function to implement raw_copy_from_

Re: [PATCH 1/4] KVM: PPC: Book3S HV: Remove support for running HPT guest on RPT host without mixed mode support

Resending because the previous got spam-filtered: Nicholas Piggin writes: > This reverts much of commit c01015091a770 ("KVM: PPC: Book3S HV: Run HPT > guests on POWER9 radix hosts"), which was required to run HPT guests on > RPT hosts on early POWER9 CPUs without support for "mixed mode", which

Re: [PATCH 2/4] KVM: PPC: Book3S HV: Fix radix guest SLB side channel

Nicholas Piggin writes: > The slbmte instruction is legal in radix mode, including radix guest > mode. This means radix guests can load the SLB with arbitrary data. > > KVM host does not clear the SLB when exiting a guest if it was a > radix guest, which would allow a rogue radix guest to use the

[PATCH v2] powerpc: always enable queued spinlocks for 64s, disable for others

Queued spinlocks have shown to have good performance and fairness properties even on smaller (2 socket) POWER systems. This selects them automatically for 64s. For other platforms they are de-selected, the standard spinlock is far simpler and smaller code, and single chips with a handful of cores i

[PATCH][next] scsi: ibmvfc: Fix spelling mistake "succeded" -> "succeeded"

From: Colin Ian King There is a spelling mistake in a ibmvfc_dbg debug message. Fix it. Signed-off-by: Colin Ian King --- drivers/scsi/ibmvscsi/ibmvfc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/scsi/ibmvscsi/ibmvfc.c b/drivers/scsi/ibmvscsi/ibmvfc.c index 1db

Re: [PATCH] tools/perf: Fix powerpc gap between kernel end and module start

On 1/12/21 3:08 PM, Jiri Olsa wrote: > On Mon, Dec 28, 2020 at 09:14:14PM -0500, Athira Rajeev wrote: > > SNIP > >> c2799370 b backtrace_flag >> c2799378 B radix_tree_node_cachep >> c2799380 B __bss_stop >> c27a B _end >> c0080389 t icmp_checkentry

[PATCH] selftests/powerpc: Fix exit status of pkey tests

Since main() does not return a value explicitly, the return values from FAIL_IF() conditions are ignored and the tests can still pass irrespective of failures. This makes sure that we always explicitly return the correct test exit status. Reported-by: Eirik Fuller Fixes: 1addb6444791 ("selftests/