During memory hotunplug, after each LMB is removed, the HPT may be
resized-down if it would map a max of 4 times the current amount of memory.
(2 shifts, due to introduced histeresis)
It usually is not an issue, but it can take a lot of time if HPT
resizing-down fails. This happens because
Every time a memory hotplug happens, and the memory limit crosses a 2^n
value, it may be necessary to perform HPT resizing-up, which can take
some time (over 100ms in my tests).
It usually is not an issue, but it can take some time if a lot of memory
is added to a guest with little starting
Because hypervisors may need to create HPTs without knowing the guest
page size, the smallest used page-size (4k) may be chosen, resulting in
a HPT that is possibly bigger than needed.
On a guest with bigger page-sizes, the amount of entries for HTP may be
too high, causing the guest to ask for a
This patchset intends to reduce time needed for processing memory
hotplug/hotunplug in hash guests.
The first one, makes sure guests with pagesize over 4k don't need to
go through HPT resize-downs after memory hotplug.
The second and third patches make hotplug / hotunplug perform a single
HPT
Nicholas Piggin writes:
> System calls / hcalls have a different calling convention than
> other interrupts, so there is code in the KVMTEST to massage these
> into the same form as other interrupt handlers.
>
> Move this work into the KVM hcall handler. This means teaching KVM
> a little more
Hi Nick,
> This SPR is set to 0 twice when exiting the guest.
>
Indeed it is.
I checked the ISA because I'd never heard of the PSPB SPR before! It's
the Problem State Priority Boost register. Before I knew what it was, I
was slightly concerned that the chip might change the value while the
other
On 12/03/2021 10:32, Michael Ellerman wrote:
Alan Modra writes:
On Wed, Mar 10, 2021 at 01:44:57PM +0100, Christophe Leroy wrote:
Le 10/03/2021 à 13:25, Alan Modra a écrit :
On Wed, Mar 10, 2021 at 08:33:37PM +1100, Alexey Kardashevskiy wrote:
One more question - the older version had a
Hi!
On Tue, Mar 09, 2021 at 06:19:30AM +, Christophe Leroy wrote:
> With some defconfig including CONFIG_CC_OPTIMIZE_FOR_SIZE,
> (for instance mvme5100_defconfig and ps3_defconfig), gcc 5
> generates a call to _restgpr_31_x.
> I don't know if there is a way to tell GCC not to emit that call,
Fix the following coccicheck warning:
WARNING: casting value returned by memory allocation function is useless.
Signed-off-by: Wang Qing
---
drivers/scsi/ibmvscsi/ibmvscsi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c
On 11/3/21 4:44 am, Laurent Dufour wrote:
It is better to rely on the API provided by the MM layer instead of
directly manipulating the mm_users field.
Signed-off-by: Laurent Dufour
LGTM, thanks for picking this up
Acked-by: Andrew Donnellan
--
Andrew Donnellan OzLabs, ADL
On Tue, 9 Mar 2021 18:26:35 +0100
Cédric Le Goater wrote:
> On 3/9/21 6:08 PM, Daniel Henrique Barboza wrote:
> >
> >
> > On 3/9/21 12:33 PM, Cédric Le Goater wrote:
> >> On 3/8/21 6:13 PM, Greg Kurz wrote:
> >>> On Wed, 3 Mar 2021 18:48:50 +0100
> >>> Cédric Le Goater wrote:
> >>>
>
There is no need for this to be in asm, use the new intrrupt entry wrapper.
Signed-off-by: Nicholas Piggin
---
Hopefully this works on a real G5 now, but I couldn't reproduce the
problem with QEMU.
Thanks,
Nick
arch/powerpc/include/asm/interrupt.h | 19 +++
Excerpts from Paul Mackerras's message of March 10, 2021 7:23 pm:
> On Mon, Mar 08, 2021 at 06:18:47PM +1000, Nicholas Piggin wrote:
>> Excerpts from Fabiano Rosas's message of March 6, 2021 9:10 am:
>> > As one of the arguments of the H_ENTER_NESTED hypercall, the nested
>> > hypervisor (L1)
Excerpts from Christophe Leroy's message of March 11, 2021 10:38 pm:
>
>
> Le 11/03/2021 à 11:38, Christophe Leroy a écrit :
>>
>>
>> Le 10/03/2021 à 02:33, Nicholas Piggin a écrit :
>>> Excerpts from Christophe Leroy's message of March 9, 2021 10:10 pm:
No need to do that is assembly, do
On 12/03/21 1:07 pm, Guenter Roeck wrote:
> On 3/11/21 3:47 PM, Chris Packham wrote:
>> On 12/03/21 10:34 am, Guenter Roeck wrote:
>>> On 3/11/21 1:17 PM, Chris Packham wrote:
On 11/03/21 9:18 pm, Wolfram Sang wrote:
>> Bummer. What is really weird is that you see clock stretching under
On 3/11/21 3:47 PM, Chris Packham wrote:
>
> On 12/03/21 10:34 am, Guenter Roeck wrote:
>> On 3/11/21 1:17 PM, Chris Packham wrote:
>>> On 11/03/21 9:18 pm, Wolfram Sang wrote:
> Bummer. What is really weird is that you see clock stretching under
> CPU load. Normally clock stretching is
On 12/03/21 10:34 am, Guenter Roeck wrote:
> On 3/11/21 1:17 PM, Chris Packham wrote:
>> On 11/03/21 9:18 pm, Wolfram Sang wrote:
Bummer. What is really weird is that you see clock stretching under
CPU load. Normally clock stretching is triggered by the device, not
by the host.
Alan Modra writes:
> On Wed, Mar 10, 2021 at 01:44:57PM +0100, Christophe Leroy wrote:
>>
>> Le 10/03/2021 à 13:25, Alan Modra a écrit :
>> > On Wed, Mar 10, 2021 at 08:33:37PM +1100, Alexey Kardashevskiy wrote:
>> > > One more question - the older version had a construct "DEFINED (.TOC.) ?
>> >
Christophe Leroy writes:
> Le 11/03/2021 à 14:46, Michael Ellerman a écrit :
>> Christophe Leroy writes:
>>> This patch replaces the PPC32 ASM exception exit by C exception exit.
>>>
>>> Signed-off-by: Christophe Leroy
>>> ---
>>> arch/powerpc/kernel/entry_32.S | 481
On 3/11/21 1:17 PM, Chris Packham wrote:
>
> On 11/03/21 9:18 pm, Wolfram Sang wrote:
>>> Bummer. What is really weird is that you see clock stretching under
>>> CPU load. Normally clock stretching is triggered by the device, not
>>> by the host.
>> One example: Some hosts need an interrupt per
On 11/03/21 9:18 pm, Wolfram Sang wrote:
>> Bummer. What is really weird is that you see clock stretching under
>> CPU load. Normally clock stretching is triggered by the device, not
>> by the host.
> One example: Some hosts need an interrupt per byte to know if they
> should send ACK or NACK.
Le 11/03/2021 à 14:46, Michael Ellerman a écrit :
Christophe Leroy writes:
This patch replaces the PPC32 ASM exception exit by C exception exit.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/entry_32.S | 481 +---
arch/powerpc/kernel/interrupt.c |
(cherry picked from commit c119565a15a628efdfa51352f9f6c5186e506a1c)
On book3s/32, page protection is defined by the PP bits in the PTE
which provide the following protection depending on the access
keys defined in the matching segment register:
- PP 00 means RW with key 0 and N/A with key 1.
-
(cherry picked from commit c119565a15a628efdfa51352f9f6c5186e506a1c)
On book3s/32, page protection is defined by the PP bits in the PTE
which provide the following protection depending on the access
keys defined in the matching segment register:
- PP 00 means RW with key 0 and N/A with key 1.
-
On Fri, 19 Feb 2021 21:52:04 -0300, Thiago Jung Bauermann wrote:
> Commit 2377c92e37fe ("powerpc/kexec_file: fix FDT size estimation for kdump
> kernel") fixed how elf64_load() estimates the FDT size needed by the
> crashdump kernel.
>
> At the same time, commit 130b2d59cec0 ("powerpc: Use common
Any comments? I would be good to make some progress on this series
as the base for the various additional pools.
On Mon, Mar 01, 2021 at 08:44:22AM +0100, Christoph Hellwig wrote:
> Hi Konrad,
>
> this series contains a bunch of swiotlb cleanups, mostly to reduce the
> amount of internals
On 3/11/21 12:18 AM, Wolfram Sang wrote:
>
>> Bummer. What is really weird is that you see clock stretching under
>> CPU load. Normally clock stretching is triggered by the device, not
>> by the host.
>
> One example: Some hosts need an interrupt per byte to know if they
> should send ACK or
On 3/11/21 2:48 AM, Jiapeng Chong wrote:
> Fix the following coccicheck warning:
>
> ./drivers/ide/pmac.c:1680:38-39: WARNING comparing pointer to 0.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
> ---
> drivers/ide/pmac.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Christophe Leroy writes:
> This patch replaces the PPC32 ASM exception exit by C exception exit.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/kernel/entry_32.S | 481 +---
> arch/powerpc/kernel/interrupt.c | 4 +
> 2 files changed, 132 insertions(+),
Le 11/03/2021 à 11:38, Christophe Leroy a écrit :
Le 10/03/2021 à 02:33, Nicholas Piggin a écrit :
Excerpts from Christophe Leroy's message of March 9, 2021 10:10 pm:
No need to do that is assembly, do it in C.
Hmm. No issues with the patch as such, but why does ppc32 need this but
not
On Wed, 10 Mar 2021 20:32:27 +0100,
Wolfram Sang wrote:
>
> The I2C attach_adapter callback is gone. Remove this reference.
>
> Signed-off-by: Wolfram Sang
Applied, thanks.
Takashi
Le 10/03/2021 à 02:33, Nicholas Piggin a écrit :
Excerpts from Christophe Leroy's message of March 9, 2021 10:10 pm:
No need to do that is assembly, do it in C.
Hmm. No issues with the patch as such, but why does ppc32 need this but
not 64? AFAIKS 64 sets this when a thread is created.
Fix the following coccicheck warning:
./drivers/ide/pmac.c:1680:38-39: WARNING comparing pointer to 0.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
Changes in v2:
- Modified if condition.
drivers/ide/pmac.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi,
Le 11/03/2021 à 10:40, Jiapeng Chong a écrit :
Fix the following coccicheck warnings:
./arch/powerpc/kernel/prom_init.c:2986:2-3: Unneeded semicolon.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
You already sent this patch in February and it is under Review, see
Fix the following coccicheck warning:
./drivers/ide/pmac.c:1680:38-39: WARNING comparing pointer to 0.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/ide/pmac.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ide/pmac.c b/drivers/ide/pmac.c
index
Fix the following coccicheck warnings:
./arch/powerpc/kernel/prom_init.c:2986:2-3: Unneeded semicolon.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
arch/powerpc/kernel/prom_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/prom_init.c
As per ISA 3.1, prefixed instruction should not cross 64-byte
boundary. So don't allow Uprobe on such prefixed instruction.
There are two ways probed instruction is changed in mapped pages.
First, when Uprobe is activated, it searches for all the relevant
pages and replace instruction in them. In
On Wed, Mar 10, 2021 at 04:29:51PM +, Al Viro wrote:
> On Tue, Mar 09, 2021 at 04:53:42PM +0100, Christoph Hellwig wrote:
> > Just use the generic anon_inode file system.
>
> Umm... The only problem I see here is the lifetime rules for
> that module, and that's not something introduced in
Now that we have H_RPT_INVALIDATE fully implemented, enable
support for the same via KVM_CAP_PPC_RPT_INVALIDATE KVM capability
Signed-off-by: Bharata B Rao
---
Documentation/virt/kvm/api.rst | 18 ++
arch/powerpc/kvm/powerpc.c | 3 +++
include/uapi/linux/kvm.h | 1 +
In the nested KVM case, replace H_TLB_INVALIDATE by the new hcall
H_RPT_INVALIDATE if available. The availability of this hcall
is determined from "hcall-rpt-invalidate" string in ibm,hypertas-functions
DT property.
Signed-off-by: Bharata B Rao
Reviewed-by: Fabiano Rosas
---
Enable support for process-scoped invalidations from nested
guests and partition-scoped invalidations for nested guests.
Process-scoped invalidations for any level of nested guests
are handled by implementing H_RPT_INVALIDATE handler in the
nested guest exit path in L0.
Partition-scoped
Add a field to mmu_psize_def to store the page size encodings
of H_RPT_INVALIDATE hcall. Initialize this while scanning the radix
AP encodings. This will be used when invalidating with required
page size encoding in the hcall.
Signed-off-by: Bharata B Rao
---
H_RPT_INVALIDATE does two types of TLB invalidations:
1. Process-scoped invalidations for guests when LPCR[GTSE]=0.
This is currently not used in KVM as GTSE is not usually
disabled in KVM.
2. Partition-scoped invalidations that an L1 hypervisor does on
behalf of an L2 guest. This is
From: "Aneesh Kumar K.V"
The type values H_RPTI_TYPE_PRT and H_RPTI_TYPE_PAT indicate
invalidating the caching of process and partition scoped entries
respectively.
Signed-off-by: Aneesh Kumar K.V
Signed-off-by: Bharata B Rao
---
arch/powerpc/include/asm/hvcall.h | 4 ++--
1 file changed, 2
This patchset adds support for the new hcall H_RPT_INVALIDATE
and replaces the nested tlb flush calls with this new hcall
if support for the same exists.
Changes in v6:
-
- Split the patch that adds hcall support in to three parts so that
it becomes easy to understand.
part1:
On Wed, Mar 10, 2021 at 04:32:34PM +, Al Viro wrote:
> On Tue, Mar 09, 2021 at 04:53:43PM +0100, Christoph Hellwig wrote:
> > Just use the generic anon_inode file system.
>
> Are you changing the lifetime rules for that module?
The core drm module is pinned by the actual drivers that use the
On Wed, Mar 10, 2021 at 06:39:57PM +, Robin Murphy wrote:
>> Actually... Just mirroring the iommu_dma_strict value into
>> struct iommu_domain should solve all of that with very little
>> boilerplate code.
>
> Yes, my initial thought was to directly replace the attribute with a
> common flag
> Bummer. What is really weird is that you see clock stretching under
> CPU load. Normally clock stretching is triggered by the device, not
> by the host.
One example: Some hosts need an interrupt per byte to know if they
should send ACK or NACK. If that interrupt is delayed, they stretch the
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