resubmission.
Thanks
Feng
On Thu, Jul 29, 2010 at 8:36 PM, Greg KH wrote:
> On Thu, Jul 29, 2010 at 07:02:44PM -0700, Feng Kan wrote:
>> On Thu, Jul 29, 2010 at 6:26 PM, Greg KH wrote:
>> > On Thu, Jul 29, 2010 at 06:19:25PM -0700, Feng Kan wrote:
>> >> Hi Greg:
>>
On Thu, Jul 29, 2010 at 6:26 PM, Greg KH wrote:
> On Thu, Jul 29, 2010 at 06:19:25PM -0700, Feng Kan wrote:
>> Hi Greg:
>>
>> On Thu, Jul 29, 2010 at 5:50 PM, Greg KH wrote:
>> > On Thu, Jul 29, 2010 at 05:14:59PM -0700, Feng Kan wrote:
>> >> Hi Greg:
&g
Hi Greg:
On Thu, Jul 29, 2010 at 5:50 PM, Greg KH wrote:
> On Thu, Jul 29, 2010 at 05:14:59PM -0700, Feng Kan wrote:
>> Hi Greg:
>>
>> We will change to a BSD 3 clause license header. Our legal counsel is
>> talking to Synopsis to make this change.
>
> Why BSD
Hi Greg:
We will change to a BSD 3 clause license header. Our legal counsel is
talking to Synopsis to make this change. We will resubmit once this
is in place. Please let me know if you have any additional concerns.
Feng Kan
Applied Micro
On Mon, Jul 26, 2010 at 4:16 PM, Greg KH wrote:
>
.
Feng Kan
On Mon, Jul 26, 2010 at 3:08 PM, Greg KH wrote:
> On Mon, Jul 26, 2010 at 03:05:13PM -0700, Greg KH wrote:
>> Please, someone needs to go run this past the Synopsys lawyers (yeah,
>> sorry, that's horrible to do, but it needs to be done to get it
>> correct.)
>&
in place, additional patch will be easier. Fushen will make sure this
change is in place on
the next submission.
Thanks
Feng Kan
On Tue, Jul 13, 2010 at 3:16 PM, Chuck Meade wrote:
> On 07/12/2010 07:16 PM, Fushen Chen wrote:
> > The DWC OTG driver module provides the initialization an
Ok thanks. This short string match may be useful in some cases, but I
agree it plays havoc with the current code.
Feng Kan
On Mar 30, 2010, at 14:14, "Benjamin Herrenschmidt" > wrote:
On Wed, 2010-03-31 at 07:48 +1100, Benjamin Herrenschmidt wrote:
On Tue, 2010-03-30 at 10:4
From: Feng Kan
The current matching scheme make the pci node match to pcix or pciex node.
To avoid the match, change the method so only one type of initialization
is called per node.
Signed-off-by: Feng Kan
Signed-off-by: Tirumala R Marri
---
arch/powerpc/sysdev/ppc4xx_pci.c | 14
still think this NAND_ECC_SMC define is somewhat missleading. Given that
both 1-2-3 and 2-1-3 are supported by the correction routine.
Feng
From: Sean MacLennan [mailto:smaclen...@pikatech.com]
Sent: Sat 2/20/2010 5:11 PM
To: Feng Kan
Cc: linux-...@lists.infradead.org
This is to lock down the ordering in the correction routine against
the calculate routine. Otherwise, incorrect define would cause ECC errors.
Signed-off-by: Feng Kan
Acked-by: Victor Gallardo
---
drivers/mtd/nand/ndfc.c |7 ++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff
Yes, I have considered that. However, it would make the #define rather confusing
for the rest.
Cheers,
Feng
-Original Message-
From: Sean MacLennan [mailto:smaclen...@pikatech.com]
Sent: Fri 8/21/2009 11:55 AM
To: Feng Kan
Cc: linuxppc-...@ozlabs.org; linux-...@lists.infradead.org; Feng
= (addressbits[b1] << 4) + addressbits[b0];
The order is change to read it in straight and let the correction
function to revert it to SMC order.
Signed-off-by: Feng Kan
Acked-by: Victor Gallardo
Acked-by: Prodyut Hazarika
---
drivers/mtd/nand/ndfc.c |4 ++--
1 files changed, 2 inse
Hi Stefan:
We had a board with high number of correctable ECC errors. Which crashed
the jffs when it
was miss correcting the wrong byte location.
Do you want me to submit a patch for this, or do you prefer to do it. I
am submitting a patch
for linux right now.
Feng Kan
AMCC Software
On 08
oposing.
Should I change the correction algorithm or the calculate function? If
the later is preferred
it would mean the change must be pushed in both U-Boot and Linux.
Feng Kan
AMCC Software
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
Please do, much appreciated.
Thanks
Feng Kan
AMCC Software
On 08/17/2009 08:34 AM, Josh Boyer wrote:
On Wed, Aug 12, 2009 at 05:38:47PM -0700, Feng Kan wrote:
This patch adds support for the AMCC (AppliedMicro) PPC460SX Eiger evaluation
board.
Signed-off-by: Tai Tri Nguyen
Acked-by
Hi Felix:
Sorry the documentation seems a little miss leading. There is no harm
with the bit
turned off to zero. Once the nand boot is over, we change the EBC to use
the ready
signal, this bit does not affect performance anymore.
Thanks
Feng Kan
On 08/12/2009 11:14 PM, Felix Radensky wrote
This patch adds support for the AMCC (AppliedMicro) PPC460SX Eiger evaluation
board.
Signed-off-by: Tai Tri Nguyen
Acked-by: Feng Kan
Acked-by: Tirumala Marri
---
arch/powerpc/boot/dts/eiger.dts| 421 ++
arch/powerpc/configs/44x/eiger_defconfig | 1200
This patch adds support for the AMCC (AppliedMicro) PPC460SX Eiger evaluation
board.
Signed-off-by: Tai Tri Nguyen
Acked-by: Feng Kan
Acked-by: Tirumala Marri
---
arch/powerpc/boot/dts/eiger.dts| 421 ++
arch/powerpc/configs/44x/eiger_defconfig | 1200
Hi Lada:
Please contact supp...@amcc.com for additional help for the coalescing patch.
Feng Kan
AMCC Software
-Original Message-
From: linuxppc-dev-bounces+fkan=amcc@lists.ozlabs.org on behalf of Lada
Podivin
Sent: Fri 7/3/2009 2:09 AM
To: Cote, Sylvain
Cc: linuxppc-...@ozlabs.org
Signed-off-by: Feng Kan
---
arch/powerpc/boot/dts/canyonlands.dts |8 ++
arch/powerpc/platforms/44x/Makefile|4 +
arch/powerpc/platforms/44x/amcc-sata.c | 125
3 files changed, 137 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc
Signed-off-by: Feng Kan
---
Documentation/powerpc/dts-bindings/4xx/sata.txt | 24 +++
1 files changed, 24 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/4xx/sata.txt
diff --git a/Documentation/powerpc/dts-bindings/4xx/sata.txt
b
Hi Scott:
I agree with your statement, however this driver is wrapped with this
AHB DMA controller.
It would be very hard for it to work on non 460EX platforms. I can
expand the depend in
the future if it is available on more cores.
Thanks
Feng Kan
Scott Wood wrote:
Feng Kan wrote:
This
This adds the OF platform support for the AMCC 460EX Canyonlands SATA port.
Signed-off-by: Feng Kan
---
arch/powerpc/boot/dts/canyonlands.dts |8 ++
arch/powerpc/platforms/44x/Makefile|4 +
arch/powerpc/platforms/44x/amcc-sata.c | 125
3 files
Fixed comment issue. Change goto statements to lower case. Also
fixed the Kconfig problem.
I don't know if I need to add Stefan Roese for the signoff, since he
did the of platform part.
Stefan, if you see this please let me know.
Feng Kan
___
Lin
Signed-off-by: Feng Kan
---
arch/powerpc/boot/dts/canyonlands.dts |8 ++
arch/powerpc/platforms/44x/Makefile|4 +
arch/powerpc/platforms/44x/amcc-sata.c | 125
3 files changed, 137 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc
the fix values for those
registers.
Feng Kan
AMCC Software
SunNeo wrote:
> Hi, Stefan,
>
> Thanks for your help.
>
> My platform uses the MICRON MT47H256M8THN DDRII SDRAM and the DDRII SDRAM is
> soldered on the board.
>
> As I said, my board was similar with "
linux.
Feng Kan
AMCC Software
Eddie Dawydiuk wrote:
Hello,
I'm working on a board based on the Yosemite AMCC 440EP eval board. I'm having
some difficulty getting both network interfaces working. The first problem I
found is the ibm_newemac driver was detecting the two phys at addre
Hi:
Did you try the early kernel printk option in kernel hacking. It can
give some
very helpful information. Make sure the address for the physical uart
address is
passed in correctly.
Feng
Tirumala Reddy Marri wrote:
I am not sure if I understand correctly. But Looks like you are not
pass
Hi RenQuan:
We are aware of the issue, currently the sata is only supported up to
2.6.25.7. We are working on a patchable version
to submit to main line.
Thanks
Feng Kan
Cheng Renquan wrote:
Mark,
I found that the current sata_dwc can only work on
DENX-2.6.25-stable, and have problems in
Hi Guys:
Sequoia uses on board discrete memory with one rank. So one chip
select would be fine.
Turning on both won't matter, since the other cs is never used.
Feng Kan
Stefan Roese wrote:
On Wednesday 11 March 2009, Valentine Barshak wrote:
I've been looking at the docs
Hi:
It looks like the top bit is hard coded to 1. There doesn't seem to
be anyway
Of changing it.
Feng Kan
AMCC Engineering
-Original Message-
From: linuxppc-dev-bounces+fkan=amcc@ozlabs.org
[mailto:linuxppc-dev-bounces+fkan=amcc@ozlabs.org] On Behalf Of
Ben
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