Rather than put a big script into the trap handler, have it call
a function.
Signed-off-by: Nicholas Piggin
---
scripts/arch-run.bash | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
index f22ead6f..cc7da7c5 100644
Migration files weren't being removed when tests were interrupted.
This improves the situation.
Signed-off-by: Nicholas Piggin
---
scripts/arch-run.bash | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
index d0864360
Signed-off-by: Nicholas Piggin
---
s390x/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/s390x/Makefile b/s390x/Makefile
index f79fd009..95ef9533 100644
--- a/s390x/Makefile
+++ b/s390x/Makefile
@@ -227,7 +227,7 @@ $(snippet_asmlib): $$(patsubst %.o,%.S,$$@) $(asm
n selftest so it is suitable for
unit tests. Add it to unit tests.
- Fix a s390x make clean omission that bit me when testing
it. This does not depend on the other patches.
Thanks,
Nick
Nicholas Piggin (9):
s390x: clean lib/auxinfo.o
arch-run: Clean up temporary files properly
arch-run
On Tue Dec 19, 2023 at 4:14 PM AEST, Thomas Huth wrote:
> On 16/12/2023 14.42, Nicholas Piggin wrote:
> > A significant rework that builds an array of 'struct spr', where each
> > element describes an SPR. This makes various metadata about the SPR
> > like name and access
On Tue Dec 19, 2023 at 3:58 PM AEST, Thomas Huth wrote:
> On 16/12/2023 14.42, Nicholas Piggin wrote:
> > This performs 1000 migrations a tight loop to flush out simple issues
> > in the multiple-migration code.
> >
> > Signed-off-by: Nicholas Piggin
> > ---
&
On Tue Dec 19, 2023 at 11:57 PM AEST, Thomas Huth wrote:
> On 16/12/2023 14.42, Nicholas Piggin wrote:
> > Add basic testing of various kinds of interrupts, machine check,
> > page fault, illegal, decrementer, trace, syscall, etc.
> >
> > This has a known failure o
On Tue Dec 19, 2023 at 10:22 PM AEST, Thomas Huth wrote:
> On 16/12/2023 14.42, Nicholas Piggin wrote:
> > The backtrace handler terminates when it sees a NULL caller address,
> > but the powerpc stack setup does not keep such a NULL caller frame
> > at t
On Tue Dec 19, 2023 at 9:53 PM AEST, Thomas Huth wrote:
> On 16/12/2023 14.42, Nicholas Piggin wrote:
> > Installing the same handler twice reports a shifted trap vector
> > address which is hard to decipher. Print the unshifed address.
> >
> > Signed-off-by: Nichola
On Tue Dec 19, 2023 at 9:47 PM AEST, Thomas Huth wrote:
> On 16/12/2023 14.42, Nicholas Piggin wrote:
> > Storing certain values in some registers can cause asynchronous
> > interrupts that can crash the test case, for example decrementer
> > or PMU interrupts.
> >
>
This has a known failure on QEMU TCG machines where the decrementer
interrupt is not lowered when the DEC wraps from -ve to +ve.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/asm/ppc_asm.h | 1 +
lib/powerpc/asm/processor.h | 22 +++
powerpc/Makefile.common | 1 +
powerpc/smp.c
Signed-off-by: Nicholas Piggin
---
powerpc/Makefile.common | 1 +
powerpc/atomics.c | 190
powerpc/unittests.cfg | 9 ++
3 files changed, 200 insertions(+)
create mode 100644 powerpc/atomics.c
diff --git a/powerpc/Makefile.common b/powerpc
The test harness uses spinlocks if they are implemented with larx/stcx.
it can prevent some test scenarios such as testing migration of a
reservation.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/asm/smp.h| 1 +
lib/powerpc/smp.c| 6 ++
lib/powerpc/spinlock.c | 28
powerpc SMP support is very primitive and does not set up a first-class
runtime environment for secondary CPUs.
This adds more complete support for a C environment and interrupt
handling, as well as IPI support.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/asm/processor.h | 6 +
lib
rtas operations.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/asm/rtas.h | 2 ++
lib/powerpc/rtas.c | 78 +-
2 files changed, 64 insertions(+), 16 deletions(-)
diff --git a/lib/powerpc/asm/rtas.h b/lib/powerpc/asm/rtas.h
index 6fb407a1..364bf935
Add basic testing of various kinds of interrupts, machine check,
page fault, illegal, decrementer, trace, syscall, etc.
This has a known failure on QEMU TCG pseries machines where MSR[ME]
can be incorrectly set to 0.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/asm/ppc_asm.h | 21
This enables HV privilege registers to be tested with the powernv
machine.
Acked-by: Thomas Huth
Signed-off-by: Nicholas Piggin
---
powerpc/sprs.c | 33 +
1 file changed, 25 insertions(+), 8 deletions(-)
diff --git a/powerpc/sprs.c b/powerpc/sprs.c
index
Illegal instructions cause 0xe40 (HEAI) interrupts rather
than program interrupts.
Signed-off-by: Nicholas Piggin
---
powerpc/emulator.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/powerpc/emulator.c b/powerpc/emulator.c
index 39dd5964..035a903c
Add support for QEMU's powernv machine. This uses standard firmware
(skiboot) rather than a minimal firmware shim.
Reviewed-by: Cédric Le Goater
Signed-off-by: Nicholas Piggin
---
lib/powerpc/asm/ppc_asm.h | 6 +++
lib/powerpc/asm/processor.h | 13 +++
lib/powerpc/hcall.c | 4
error message.
Signed-off-by: Nicholas Piggin
---
scripts/runtime.bash | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/scripts/runtime.bash b/scripts/runtime.bash
index 0803d02a..96756a0d 100644
--- a/scripts/runtime.bash
+++ b/scripts/runtime.bash
@@ -9,7 +9,7 @@ FAIL
This allows different machines with different requirements to be
supported by run_tests.sh, similarly to how different accelerators
are handled.
Signed-off-by: Nicholas Piggin
---
scripts/common.bash | 8 ++--
scripts/runtime.bash | 16
2 files changed, 18 insertions
if it
were a stack frame. But this is fragile, and does not work with powernv
where address 0 contains firmware instructions.
Use the existing dummy frame on stack as the NULL caller, and create a
new frame on stack for the entry code.
Signed-off-by: Nicholas Piggin
---
powerpc/cstart64.S | 12
The next change will load the kernels at different addresses depending
on test options, so this needs to be reverted back to dynamic
discovery.
Acked-by: Thomas Huth
Signed-off-by: Nicholas Piggin
---
powerpc/cstart64.S | 19 ++-
1 file changed, 14 insertions(+), 5 deletions
can cause this
difference in linking.]
Signed-off-by: Nicholas Piggin
---
powerpc/flat.lds | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/powerpc/flat.lds b/powerpc/flat.lds
index 5eed368d..e07b91c1 100644
--- a/powerpc/flat.lds
+++ b/powerpc/flat.lds
@@ -41,8 +41,7 @
in
a later change.
Acked-by: Thomas Huth
Signed-off-by: Nicholas Piggin
---
lib/powerpc/asm/ppc_asm.h | 3 ++
powerpc/cstart64.S| 79 ---
2 files changed, 68 insertions(+), 14 deletions(-)
diff --git a/lib/powerpc/asm/ppc_asm.h b/lib/powerpc/asm/ppc_asm.h
Exception handlers are currently indexed in units of 0x100, but
powerpc can have vectors that are aligned to as little as 0x20
bytes. Increase granularity of the handler functions before
adding support for those vectors.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/processor.c | 16
Installing the same handler twice reports a shifted trap vector
address which is hard to decipher. Print the unshifed address.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/processor.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/powerpc/processor.c b/lib/powerpc
-by: Nicholas Piggin
---
powerpc/sprs.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/powerpc/sprs.c b/powerpc/sprs.c
index 01041912..313698e0 100644
--- a/powerpc/sprs.c
+++ b/powerpc/sprs.c
@@ -481,12 +481,7 @@ static void set_sprs(uint64_t val
SPRs annotated with SPR_HARNESS can change between consecutive reads
because the test harness code has changed them. Avoid failing the
test in this case.
[XER was observed to change after the next changeset to use mdelay.]
Signed-off-by: Nicholas Piggin
---
powerpc/sprs.c | 2 +-
1 file
, but also the code might one day be
reused for a hypervisor-privileged test.
Acked-by: Thomas Huth
Signed-off-by: Nicholas Piggin
---
powerpc/sprs.c | 643 ++---
1 file changed, 450 insertions(+), 193 deletions(-)
diff --git a/powerpc/sprs.c b/powerpc/sprs.c
ppc64 requires the stack to be 16-byte aligned but the interrupt
stack frame has 8-byte aligned size. Add padding to fix.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/setup.c| 3 +++
lib/ppc64/asm/ptrace.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/lib/powerpc/setup.c b/lib
QEMU TCG does not support TM. Skip this test gracefully when not on KVM.
Signed-off-by: Nicholas Piggin
---
powerpc/unittests.cfg | 1 +
1 file changed, 1 insertion(+)
diff --git a/powerpc/unittests.cfg b/powerpc/unittests.cfg
index dd5f361c..e71140aa 100644
--- a/powerpc/unittests.cfg
+++ b
This performs 1000 migrations a tight loop to flush out simple issues
in the multiple-migration code.
Signed-off-by: Nicholas Piggin
---
powerpc/Makefile.common | 1 +
powerpc/migrate.c | 64 +
2 files changed, 65 insertions(+)
create mode 100644
Quieten this console spam.
Signed-off-by: Nicholas Piggin
---
powerpc/run | 5 +
1 file changed, 5 insertions(+)
diff --git a/powerpc/run b/powerpc/run
index b353169f..e469f1eb 100755
--- a/powerpc/run
+++ b/powerpc/run
@@ -21,6 +21,11 @@ fi
M='-machine pseries'
M+=",accel=$
Using 1 and 2 for source and destination is confusing, particularly
now with multiple migrations that flip between them. Do a rename
pass to tidy things up.
Signed-off-by: Nicholas Piggin
---
scripts/arch-run.bash | 110 +-
1 file changed, 56 insertions
Support multiple migrations by flipping dest file/socket variables to
source after the migration is complete, ready to start again. A new
destination is created if the test outputs the migrate line again.
Test cases may now switch to calling migrate() one or more times.
Signed-off-by: Nicholas
Rather than put a big script into the trap handler, have it call
a function.
Signed-off-by: Nicholas Piggin
---
scripts/arch-run.bash | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
index f22ead6f..cc7da7c5 100644
this to use $! is more robust in testing, and simpler.
Signed-off-by: Nicholas Piggin
---
scripts/arch-run.bash | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
index cc7da7c5..4d4e791c 100644
--- a/scripts/arch-run.bash
Migration files weren't being removed when tests were interrupted.
This seems to improve the situation.
Signed-off-by: Nicholas Piggin
---
scripts/arch-run.bash | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/scripts/arch-run.bash b/scripts/arch-run.bash
index
unsupported tests, etc.
- Fix several powerpc bugs that got exposed (.got, stack backtrace,
stack alignment).
- Added a bunch more tests I've been accumulating, atomics, smp,
timebase, interrupts.
Note the arm64 psci cpu-on test is flakey with/without this series.
Thanks,
Nick
Nicholas Piggin (29
On Tue Nov 28, 2023 at 10:59 AM AEST, Michael Ellerman wrote:
> Christophe Leroy writes:
> > Le 27/11/2023 à 19:39, Timothy Pearson a écrit :
> >> Just wanted to check back and see if this patch was going to be
> >> queued up soon? We're still having to work around / advertise the
> >> data
On Thu Nov 23, 2023 at 7:36 PM AEST, Zhao Ke wrote:
> HeXin Tech Co. has applied for a new PVN from the OpenPower Community
> for its new processor C2000. The OpenPower has assigned a new PVN
> and this newly assigned PVN is 0x0066, add pvr register related
> support for this PVN.
>
>
: de2a20aa7237b ("powerpc: Prepare for splitting giveup_{fpu, altivec,
vsx} in two")
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/process.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 39
Also on that path we're switching to another task, so we'll be reloading
> > the other task's FP state before returning to userspace.
> >
> > So I don't see any bug there.
>
> Yeah, you're right. I was trying to get traces while doing something else,
> and didn't think
On Tue Nov 21, 2023 at 2:10 PM AEST, Timothy Pearson wrote:
> - Original Message -
> > From: "Michael Ellerman"
> > To: "Timothy Pearson"
> > Cc: "Jens Axboe" , "regressions"
> > , "npiggin" ,
> > "christophe leroy" , "linuxppc-dev"
> >
> > Sent: Monday, November 20, 2023 5:39:52 PM
>
ably still need it for older versions, so we still need
your patch.
Reviewed-by: Nicholas Piggin
> Signed-off-by: Masahiro Yamada
> ---
>
> arch/powerpc/lib/Makefile | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib
On Tue Nov 21, 2023 at 9:39 AM AEST, Michael Ellerman wrote:
> Timothy Pearson writes:
> > - Original Message -
> >> From: "Michael Ellerman"
> ...
> >>
> >> But we now have a new path, because io-uring can call copy_process() via
> >> create_io_thread() from the signal handling path.
On Tue Nov 21, 2023 at 2:45 AM AEST, Timothy Pearson wrote:
>
>
> - Original Message -
> > From: "Michael Ellerman"
> > To: "Timothy Pearson" , "Jens Axboe"
> > , "regressions"
> > , "npiggin" , "christophe
> > leroy" ,
> > "linuxppc-dev"
> > Sent: Monday, November 20, 2023 1:10:06 AM
Yeah, awesome.
On Mon Nov 20, 2023 at 5:10 PM AEST, Michael Ellerman wrote:
> Hi Timothy,
>
> Great work debugging this. I think your fix is good, but I want to understand
> it
> a bit more to make sure I can explain why we haven't seen it outside of
> io-uring.
Analysis seems right to me.
on powerpc. And enable the test case.
Signed-off-by: Nicholas Piggin
---
tools/testing/selftests/kvm/Makefile | 1 +
tools/testing/selftests/kvm/kvm_create_max_vcpus.c | 9 +
2 files changed, 10 insertions(+)
diff --git a/tools/testing/selftests/kvm/Makefile
b/tools/testing
are taken in real-mode, so require a page allocated at
gRA 0x0. Interrupt entry is complicated because gVA:gRA is not 1:1 mapped
(like the kernel is), so the MMU can not just just be switched on and
off.
Acked-by: Michael Ellerman (powerpc)
Signed-off-by: Nicholas Piggin
---
MAINTAINERS
powerpc will require this to allocate MMU tables in guest memory that
are larger than guest base page size.
Signed-off-by: Nicholas Piggin
---
.../selftests/kvm/include/kvm_util_base.h | 2 +
tools/testing/selftests/kvm/lib/kvm_util.c| 44 ---
2 files changed, 29
virt_arch_pgd_alloc all do the same test and set of pgd_created. Move
this into common code.
Signed-off-by: Nicholas Piggin
---
tools/testing/selftests/kvm/include/kvm_util_base.h | 5 +
tools/testing/selftests/kvm/lib/aarch64/processor.c | 4
tools/testing/selftests/kvm/lib/riscv
he generic tests.
Since v1:
- Update MAINTAINERS KVM PPC entry to include kvm selftests.
- Fixes and cleanups from Sean's review including new patch 1.
- Add 4K guest page support requiring new patch 2.
Thanks,
Nick
Nicholas Piggin (4):
KVM: selftests: Move pgd_created check into virt_pgd_a
On Fri Nov 17, 2023 at 5:39 PM AEST, Timothy Pearson wrote:
>
>
> - Original Message -
> > From: "Michael Ellerman"
> > To: "Timothy Pearson" , "linuxppc-dev"
> >
> > Cc: "Jens Axboe"
> > Sent: Tuesday, November 14, 2023 6:14:37 AM
> > Subject: Re: [PATCH] powerpc: Fix data corruption
On Fri Oct 13, 2023 at 11:12 PM AEST, Christophe Leroy wrote:
>
>
> Le 07/06/2023 à 02:56, Nicholas Piggin a écrit :
> > Fix an upstream powerpc bug that was discovered with a WARN_ON added in
> > "lazy tlb: consolidate lazy tlb mm switching":
> >
> >
(Sorry I didn't see that Michael already made the same comment,
ignore my previous.)
On Wed Nov 15, 2023 at 7:32 AM AEST, Timothy Pearson wrote:
>
>
> - Original Message -
> > From: "Michael Ellerman"
> > To: "Timothy Pearson" , "linuxppc-dev"
> >
> > Cc: "Jens Axboe"
> > Sent:
On Mon Nov 13, 2023 at 8:45 PM AEST, Aneesh Kumar K V wrote:
> On 11/13/23 3:46 PM, Nicholas Piggin wrote:
> > On Thu Nov 2, 2023 at 11:23 PM AEST, Aneesh Kumar K.V wrote:
> >> There used to be a dependency on _PAGE_PRIVILEGED with pte_savedwrite.
> >> But that
On Mon Nov 13, 2023 at 7:57 PM AEST, Uwe Kleine-König wrote:
> On Mon, Nov 13, 2023 at 07:45:27PM +1000, Nicholas Piggin wrote:
> > On Mon Nov 6, 2023 at 7:44 AM AEST, Uwe Kleine-König wrote:
> > > The function hvc_remove() returns zero unconditionally. Make it return
> >
On Thu Nov 2, 2023 at 11:23 PM AEST, Aneesh Kumar K.V wrote:
> There used to be a dependency on _PAGE_PRIVILEGED with pte_savedwrite.
> But that got dropped by
> commit 6a56ccbcf6c6 ("mm/autonuma: use can_change_(pte|pmd)_writable() to
> replace savedwrite")
>
> With this change numa fault pte
are converted, .remove_new() will be renamed to .remove().
>
> Trivially convert this driver from always returning zero in the remove
> callback to the void returning variant.
Reviewed-by: Nicholas Piggin
>
> Signed-off-by: Uwe Kleine-König
> ---
> drivers/tty/hvc/hvc_o
.
>
> Signed-off-by: Uwe Kleine-König
IIUC these are functionally no change, just tidying and removing
dead code? Unless I'm mistaken, then
Reviewed-by: Nicholas Piggin
> ---
> drivers/tty/hvc/hvc_console.c | 3 +--
> drivers/tty/hvc/hvc_console.h | 2 +-
> driv
When the PMU is disabled, MMCRA is not updated to disable BHRB and
instruction sampling. This can lead to those features remaining enabled,
which can slow down a real or emulated CPU.
Fixes: 1cade527f6e9 ("powerpc/perf: BHRB control to disable BHRB logic when not
used")
Signed-off-by
Rename yield_propagate_owner to yield_sleepy_owner, which better
describes what it does (what, not how).
Signed-off-by: Nicholas Piggin
---
arch/powerpc/lib/qspinlock.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/lib/qspinlock.c b/arch
The sleepy (aka lock-owner-is-preempted) condition is propagated down
the queue by each waiter. If a waiter becomes preempted, it can no
longer propagate sleepy. To allow subsequent waiters to yield to the
lock owner, also check the lock owner in this case.
Signed-off-by: Nicholas Piggin
To simplify things, don't propagate the not-sleepy condition back down
the queue. Instead, have the waiters clear their own node->sleepy when
finding the lock owner is not preempted.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/lib/qspinlock.c | 26 --
1 file chan
propagate the -1 (or
sleepy=false in the new scheme) down the queue. Instead, have the
waiters clear it themselves when finding the lock owner is not
preempted.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/lib/qspinlock.c | 80
1 file changed, 36 insertions
this and just set the sleepy seen clock.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/lib/qspinlock.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/lib/qspinlock.c b/arch/powerpc/lib/qspinlock.c
index 6dd2f46bd3ef..75608ced14c2 100644
down
the queue")
Reported-by: Srikar Dronamraju
Reported-by: Laurent Dufour
Reported-by: Shrikanth Hegde
Debugged-by: Nysal Jan K.A
Signed-off-by: Nicholas Piggin
---
arch/powerpc/lib/qspinlock.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/lib/qspinlock.c b/arch/p
This fixes a long-standing latency bug in the powerpc qspinlock
implementation that quite a few people have reported and helped
out with debugging.
The first patch is a minimal fix that avoids the problem. The
other patches are streamlining and improvements after the fix.
Thanks,
Nick
Nicholas
\
> - SHARED_WRAPPER(reg, size) \
> +#define KVMPPC_BOOKE_HV_SPRNG_OR_VCPU_SHARED_REGS_ACCESSOR(reg, size,
> bookehv_spr) \
> + KVMPPC_VCPU_SHARED_REGS_ACESSOR(reg, size) \
Not the greatest name I've ever see
On Mon Aug 7, 2023 at 11:45 AM AEST, Jordan Niethe wrote:
> The LPID register is 32 bits long. The host keeps the lpids for each
> guest in an unsigned word struct kvm_arch. Currently, LPIDs are already
> limited by mmu_lpid_bits and KVM_MAX_NESTED_GUESTS_SHIFT.
>
> The nestedv2 API returns a 64
On Mon Aug 7, 2023 at 11:45 AM AEST, Jordan Niethe wrote:
> There are already some getter and setter functions used for accessing
> vcpu register state, e.g. kvmppc_get_pc(). There are also more
> complicated examples that are generated by macros like
> kvmppc_get_sprg0() which are generated by
On Wed Aug 9, 2023 at 6:01 PM AEST, Christophe Leroy wrote:
> With skiboot_defconfig, Clang reports:
>
> CC arch/powerpc/mm/book3s64/radix_tlb.o
> arch/powerpc/mm/book3s64/radix_tlb.c:419:20: error: unused function
> '_tlbie_pid_lpid' [-Werror,-Wunused-function]
> static inline void
On Mon Jul 3, 2023 at 11:27 PM AEST, Thomas Huth wrote:
> On 08/06/2023 09.58, Nicholas Piggin wrote:
> > Posting again, a couple of patches were merged and accounted for review
> > comments from last time.
>
> Sorry for not being very responsive ... it's been a busy month.
On Tue Jul 18, 2023 at 12:54 PM AEST, Michael Ellerman wrote:
> Nicholas Piggin writes:
> > This performs lazy tlb mm shootdown when doing the exit TLB flush when
> > all mm users go away and user mappings are removed, which avoids having
> > to do the lazy tlb mm shootd
On Mon Jun 26, 2023 at 1:11 PM AEST, Masahiro Yamada wrote:
> On Mon, Jun 26, 2023 at 10:58 AM Nicholas Piggin wrote:
> >
> > On Sun Jun 25, 2023 at 6:02 PM AEST, Masahiro Yamada wrote:
> > > On Thu, Jan 19, 2023 at 9:37 PM Masahiro Yamada
> > > wrote:
> >
On Sun Jun 25, 2023 at 6:02 PM AEST, Masahiro Yamada wrote:
> On Thu, Jan 19, 2023 at 9:37 PM Masahiro Yamada wrote:
> >
> > On Thu, Jan 19, 2023 at 9:12 PM Joel Stanley wrote:
> > >
> > > On Thu, 19 Jan 2023 at 08:24, Masahiro Yamada
> > > wrote:
> > > >
> > > > Commit e4412739472b
On Wed Jun 21, 2023 at 10:38 AM AEST, Yu Zhao wrote:
> On Tue, Jun 20, 2023 at 1:48 AM Nicholas Piggin wrote:
> >
> > On Sat May 27, 2023 at 9:44 AM AEST, Yu Zhao wrote:
> > > Implement kvm_arch_test_clear_young() to support the fast path in
> > > m
On Tue Jun 20, 2023 at 6:00 PM AEST, Yu Zhao wrote:
> On Tue, Jun 20, 2023 at 12:33 AM Nicholas Piggin wrote:
> >
> > On Sat May 27, 2023 at 9:44 AM AEST, Yu Zhao wrote:
> > > KVM page tables are currently not RCU safe against remapping, i.e.,
> > > kvmppc_u
On Sat May 27, 2023 at 9:44 AM AEST, Yu Zhao wrote:
> Implement kvm_arch_test_clear_young() to support the fast path in
> mmu_notifier_ops->test_clear_young().
>
> It focuses on a simple case, i.e., radix MMU sets the accessed bit in
> KVM PTEs and VMs are not nested, where it can rely on RCU and
On Sat May 27, 2023 at 9:44 AM AEST, Yu Zhao wrote:
> Add mmu_notifier_ops->test_clear_young() to supersede test_young()
> and clear_young().
>
> test_clear_young() has a fast path, which if supported, allows its
> callers to safely clear the accessed bit without taking
> kvm->mmu_lock.
>
> The
On Sat May 27, 2023 at 9:44 AM AEST, Yu Zhao wrote:
> KVM page tables are currently not RCU safe against remapping, i.e.,
> kvmppc_unmap_free_pmd_entry_table() et al. The previous
Minor nit but the "page table" is not RCU-safe against something. It
is RCU-freed, and therefore some algorithm that
r's caller
and that mismatch is what causes gdb's dwarf unwinder to go haywire.
Nice catch, and I think I follow the fix and I think I agree with it.
Before the bug was introduced, NIP also came from the grandparent.
Which is what xmon presumably wanted, but since then I think maybe it
makes more sense to just have the parent caller.
Reivewed-by: Nicholas Piggin
Fixes: d16a58f8854b1 ("powerpc: Improve ppc_save_regs()")
Thanks,
Nick
On Wed Jun 14, 2023 at 11:09 AM AEST, Joel Stanley wrote:
> On Thu, 8 Jun 2023 at 07:58, Nicholas Piggin wrote:
> >
> > Posting again, a couple of patches were merged and accounted for review
> > comments from last time.
>
> I saw some failures in the spr tests running
On Wed Jun 14, 2023 at 3:56 PM AEST, Michael Ellerman wrote:
> Michael Ellerman writes:
> > Nicholas Piggin writes:
> >> The most expensive ordering for hwsync to provide is the store-load
> >> barrier, because all prior stores have to be drained to the caches
> >
On Tue Jun 13, 2023 at 3:31 PM AEST, Joel Stanley wrote:
> On Fri, 9 Jun 2023 at 10:01, Nicholas Piggin wrote:
> >
> > ISA v3.1 introduces new sync types for store ordering.
> >
> > stncisync
> > stcisync
> > stsync
> >
> > Add ppc-opcode d
, and does not prevent
completion of subsequent instructions. So it should be faster than
hwsync.
Use stsync for wmb(). Older processors that don't recognise the SC
field should treat this as hwsync.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/barrier.h | 2 +-
1 file changed, 1
stncisync orders less than lwsync (only cacheable store-store, not
load-load or load-store) so it should be as cheap or cheaper.
Microbenchmarks with no actual loads to order shows that the basic
execution cost is the same on POWER10.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm
-by: Nicholas Piggin
---
arch/powerpc/include/asm/mmiowb.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/mmiowb.h
b/arch/powerpc/include/asm/mmiowb.h
index 74a00127eb20..cd071fb97eba 100644
--- a/arch/powerpc/include/asm/mmiowb.h
+++ b/arch/powerpc
ISA v3.1 introduces new sync types for store ordering.
stncisync
stcisync
stsync
Add ppc-opcode defines for these. This changes PPC_RAW_SYNC to take
L,SC parameters and adds a PPC_RAW_HWSYNC for callers that want the
plain old sync (aka hwsync).
Signed-off-by: Nicholas Piggin
---
arch
Add --orphan-handlin for vdsos, and adjust vdso linker scripts to deal
with orphan sections.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/vdso/Makefile | 2 ++
arch/powerpc/kernel/vdso/vdso32.lds.S | 4 +++-
arch/powerpc/kernel/vdso/vdso64.lds.S | 4 +++-
3 files changed, 8
This enables HV privilege registers to be tested with the powernv
machine.
Acked-by: Thomas Huth
Signed-off-by: Nicholas Piggin
---
powerpc/sprs.c | 33 +
1 file changed, 25 insertions(+), 8 deletions(-)
diff --git a/powerpc/sprs.c b/powerpc/sprs.c
index
tests (e.g., rtas) and adjust parameters (e.g., increase memory
size) to allow powernv to work. For now it can run single test cases.
Reviewed-by: Cédric Le Goater
Signed-off-by: Nicholas Piggin
---
Since v3:
- Typo fix [Thomas]
lib/powerpc/asm/ppc_asm.h | 5 +++
lib/powerpc/asm/processor.h
The next change will load the kernels at different addresses depending
on test options, so this needs to be reverted back to dynamic
discovery.
Acked-by: Thomas Huth
Signed-off-by: Nicholas Piggin
---
powerpc/cstart64.S | 19 ++-
1 file changed, 14 insertions(+), 5 deletions
in
a later change.
Acked-by: Thomas Huth
Signed-off-by: Nicholas Piggin
---
Since v3:
- Build fix [Joel]
lib/powerpc/asm/ppc_asm.h | 3 ++
powerpc/cstart64.S| 79 ---
2 files changed, 68 insertions(+), 14 deletions(-)
diff --git a/lib/powerpc/asm/ppc_asm.h
Exception handlers are currently indexed in units of 0x100, but
powerpc can have vectors that are aligned to as little as 0x20
bytes. Increase granularity of the handler functions before
adding support for those vectors.
Signed-off-by: Nicholas Piggin
---
Since v3:
- Fix typo [Thomas]
lib
Huth
Signed-off-by: Nicholas Piggin
---
lib/powerpc/asm/hcall.h | 1 +
lib/ppc64/asm/vpa.h | 62 +++
powerpc/Makefile.ppc64 | 2 +-
powerpc/spapr_vpa.c | 172
powerpc/unittests.cfg | 3 +
5 files changed, 239 insertions(+), 1
, but also the code might one day be
reused for a hypervisor-privileged test.
Acked-by: Thomas Huth
Signed-off-by: Nicholas Piggin
---
This ended up a little over-engineered perhaps, but there are lots of
SPRs, lots of access types, lots of changes between processor and ISA
versions, and lots of places
Move some common helpers and defines to processor.h.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/asm/processor.h | 38 +
powerpc/spapr_hcall.c | 9 +
powerpc/sprs.c | 9 -
3 files changed, 35 insertions(+), 21 deletions
301 - 400 of 6237 matches
Mail list logo
