den menu, so I suggest that it be moved to just before the
> option that it allow be selected.
Right, it'll me more convenient. My [v5] patch addresses this.
Regards, Yuri
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_
need shmem with 256KB pages, you can always remove the !SHMEM
dependency in 'config PPC_256K_PAGES', and use the workaround available here:
http://lkml.org/lkml/2008/12/19/20
Signed-off-by: Yuri Tikhonov
Signed-off-by: Ilya Yanok
---
arch/powerpc/Kconfig
On Friday, January 16, 2009 you wrote:
> On Fri, Jan 16, 2009 at 4:51 AM, Yuri Tikhonov wrote:
>> The reason why I preferred to use async_pq() instead of async_xor()
>> here is to maximize the chance that the whole D+D recovery operation
>> will be handled in one ADMA
Hello Dan,
On Friday, January 16, 2009 you wrote:
> On Fri, Jan 16, 2009 at 4:41 AM, Yuri Tikhonov wrote:
>>> I don't think this will work as we will be mixing Q into the new P and
>>> P into the new Q. In order to support (src_cnt > device->max_pq) we
>&g
Hello Milton,
On Friday, January 16, 2009 you wrote:
> On Jan 12, 2009, at 4:49 PM, Yuri Tikhonov wrote:
>> This patch adds support for 256KB pages on ppc44x-based boards.
> Another day, another comment. The motivation for reply was the second
> comment below.
>>
>>
/83/83 MBps
Phw = 288/275/274 MBps
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On Friday, January 16, 2009 you wrote:
> On Thu, Jan 15, 2009 at 2:51 PM, Dan Williams
> wrote:
>> On Mon, Dec 8, 2008 at 2:57 PM, Yuri Tikhonov wrote:
>> What's the reasoning behind changing the logic here, i.e. removing
>> must_compute and such? I'd fee
ursday, January 15, 2009 you wrote:
> Hello Yuri,
> On Tue, Jan 13, 2009 at 03:43:55AM +0300, Yuri Tikhonov wrote:
>> Adds the platform device definitions and the architecture specific support
>> routines for the ppc440spe adma driver.
>>
>> Any board equipped with P
On Thursday, January 15, 2009 Dan Williams wrote:
> On Mon, Jan 12, 2009 at 5:43 PM, Yuri Tikhonov wrote:
>> + /* (2) Calculate Q+Qxy */
>> + lptrs[0] = ptrs[failb];
>> + lptrs[1] = ptrs[disks-1];
>> + lptrs[2] = NULL;
>> + tx =
}
>> +
>> + return async_xor(pdst, blocks, offset,
>> +src_cnt, len, flags, depend_tx,
>> + cb_fn, cb_param);
> If we assume that async_pq always regen
x-2.6-denx.git;a=shortlog;h=refs/heads/raidstuff
Regards, Yuri
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en (surely, taking into account all the comments made
from community). But, even now, the driver works, so we publish this
so interested people could use and test it.
Some comments mixed in below.
On Tuesday, January 13, 2009 you wrote:
> On Tue, Jan 13, 2009 at 03:43:55AM +0300, Yuri Tikhonov w
This patch introduces the state machine for handling the RAID-6 parities
check and repair functionality.
Signed-off-by: Yuri Tikhonov
Signed-off-by: Ilya Yanok
---
drivers/md/raid5.c | 164 +++-
1 files changed, 111 insertions(+), 53 deletions
STRIPE_OP_POSTXOR
- recalculate parity for new data that has entered the cache
STRIPE_OP_CHECK
- verify that the parity is correct
The flow is the same as in the RAID-5 case.
Signed-off-by: Yuri Tikhonov
Signed-off-by: Ilya Yanok
---
drivers/md/Kconfig |2 +
drivers/md/raid5.c
Signed-off-by: Yuri Tikhonov
Signed-off-by: Ilya Yanok
---
crypto/async_tx/Kconfig |5 +
crypto/async_tx/Makefile|1 +
crypto/async_tx/async_r6recov.c | 286 +++
include/linux/async_tx.h| 11 ++
4 files changed, 303
synchronous
case.
To support this API dmaengine driver should set DMA_PQ and
DMA_PQ_ZERO_SUM capabilities and provide device_prep_dma_pq and
device_prep_dma_pqzero_sum methods in dma_device structure.
Signed-off-by: Yuri Tikhonov
Signed-off-by: Ilya Yanok
---
crypto/async_tx/Kconfig |4
Hello,
This is the next attempt on asynchronous RAID-6 support. This patch-set
has the Dan Williams' comments (Dec, 17) addressed with the following
exception:
- I still think that using 'enum dma_ctrl_flags' for PQ-specific
operations is better than introducing another group of flags and
enh
n always remove the !SHMEM
dependency in 'config PPC_256K_PAGES', and use the workaround available here:
http://lkml.org/lkml/2008/12/19/20
Signed-off-by: Yuri Tikhonov
Signed-off-by: Ilya Yanok
---
arch/powerpc/Kconfig | 15 +++
arch/powerpc/include
e47ff0] [c000d8c4] kernel_thread+0x4c/0x68
Instruction dump:
7fe3fb78 7c0803a6 bb210014 38210030 4e800020 3800 90040024 90040020
90a40010 90c4000c 9084 38040018 <8123003c> 3963003c 91240018 90840004
---[ end trace 22428c4f73106ff5 ]---
This is with Linus's tree, head ae0..e10bb.
Hello Prodyut,
On Monday, January 12, 2009 you wrote:
> On Sun, Jan 11, 2009 at 10:42 AM, Yuri Tikhonov wrote:
>>
>> This patch adds support for 256KB pages on ppc44x-based boards.
>>
> Hi Yuri,
> Do you still need the mm/shmem.c patch to avoid division by zero?
ELF_MAXPAGESIZE0x1
+#define ELF_MAXPAGESIZE0x4
Signed-off-by: Yuri Tikhonov
Signed-off-by: Ilya Yanok
---
arch/powerpc/Kconfig | 15 +++
arch/powerpc/include/asm/highmem.h | 10 +-
arch/powerpc/include/asm/mmu-44x.h
Hello Hugh,
On Tuesday, December 23, 2008 you wrote:
> On Fri, 19 Dec 2008, Yuri Tikhonov wrote:
>>
>> The following patch fixes division by zero, which we have in
>> shmem_truncate_range() and shmem_unuse_inode(), if use big
>> PAGE_SIZE values (e.g. 256KB on
On Sunday, December 21, 2008 you wrote:
> Yuri Tikhonov writes:
>> Thanks for pointing this. I guess, the -zmax-page-size option is new
>> to binutils 2.17.50.0.10. Right?
> It was added 2½ years ago.
Yes, approximately: http://gcc.gnu.org/ml/gcc/2006-07/msg00361.html
&
Hello Andreas,
On Sunday, December 21, 2008 you wrote:
> Yuri Tikhonov writes:
>> Because ELF standard supports only page sizes up to 64K, then you should
>> use patched binutils for building applications to be run with the 256KB-
>> page sized kernel. The patch for binut
igned-off-by: Yuri Tikhonov
Signed-off-by: Ilya Yanok
---
arch/powerpc/Kconfig | 14 ++
arch/powerpc/include/asm/highmem.h | 10 +-
arch/powerpc/include/asm/mmu-44x.h |2 ++
arch/powerpc/include/asm/page.h|6 --
arch/powerpc/in
Hello Milton,
Thanks for reviewing. I'll re-post the updated patch shortly.
On Sunday, December 21, 2008 you wrote:
> On Dec 19, 2008, at 12:39 AM, Yuri Tikhonov wrote:
>> This patch adds support for 256KB pages on ppc44x-based boards.
>>
> Hi. A couple of small c
dma operation
>> @@ -322,6 +327,7 @@ struct dma_device {
>>struct list_head global_node;
>>dma_cap_mask_t cap_mask;
>>int max_xor;
>> + int max_pq;
>>
> max_xor and max_pq can be changed to unsigned shorts to keep the size
igned-off-by: Yuri Tikhonov
Signed-off-by: Ilya Yanok
---
arch/powerpc/Kconfig | 10 ++
arch/powerpc/include/asm/highmem.h | 10 +-
arch/powerpc/include/asm/mmu-44x.h |2 ++
arch/powerpc/include/asm/page.h|6 --
arch/powerpc/includ
'ulong' to 'ullong' where it's necessary.
Signed-off-by: Yuri Tikhonov
---
mm/shmem.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/mm/shmem.c b/mm/shmem.c
index 0ed0752..99d7c91 100644
--- a/mm/shmem.c
+++ b/mm/shmem.c
@@ -57,7 +57,7
0x1..
>> when PAGE_SIZE is 256K.
>>
>> How about the following fix ?
[snip]
> Looks sane.
Thanks for reviewing.
> But to apply this I'd prefer a changelog, a signoff and a grunt from Hugh.
Sure, I'll post this in the separate thread t
Hello Paul,
On Friday 12 December 2008 03:48, Paul Mackerras wrote:
> Andrew Morton writes:
>
> > > +#if (8 * THREAD_SIZE) > PAGE_SIZE
> > > max_threads = mempages / (8 * THREAD_SIZE / PAGE_SIZE);
> > > +#else
> > > + max_threads = mempages * (PAGE_SIZE / (8 * THREAD_SIZE));
> > > +#endif
> >
e tree for `num_physpages', you will find a splendid
> number of similar bugs. num_physpages should be unexported, burnt,
> deleted, etc. It's just an invitation to write buggy code.
Regards, Yuri
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Hello Dan,
On Wednesday, December 10, 2008 you wrote:
> On Mon, 2008-12-08 at 14:08 -0700, Dan Williams wrote:
>> On Mon, 2008-12-08 at 12:14 -0700, Yuri Tikhonov wrote:
>> > The destination address may be present in the source list, so we should
>> > map the add
Hello Scott,
On Wednesday, December 10, 2008 you wrote:
> On Wed, Dec 10, 2008 at 01:29:12PM +0300, Yuri Tikhonov wrote:
>> On Wednesday, December 10, 2008 you wrote:
>> > x * y / z is parsed as (x * y) / z, not x * (y / z).
>>
>> Here we believe in preprocesso
h the things actually done
in the code.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
kernel/fork.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/kernel/fork.c b/kernel/fork.c
index 8d6a7dd..638eb7f 10
Hello David,
On Wednesday, December 10, 2008 you wrote:
> Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
>> Here we believe in preprocessor: since all PAGE_SIZE, 8, and
>> THREAD_SIZE are the constants we expect it will calculate this.
> The preprocessor shouldn't be
gt; @@ -400,7 +395,7 @@ void kernel_map_pages(struct page *page, int numpages,
>> int enable)
>> #endif /* CONFIG_DEBUG_PAGEALLOC */
>>
>> static int fixmaps;
>> -unsigned long FIXADDR_TOP = 0xf000;
>> +unsigned long FIXADDR_TOP = (-PAGE_SIZE);
>&g
Hello Al,
On Wednesday, December 10, 2008 you wrote:
> On Wed, Dec 10, 2008 at 01:01:13PM +0300, Yuri Tikhonov wrote:
>> >> + max_threads = mempages * PAGE_SIZE / (8 * THREAD_SIZE);
>> >
>> >> +#endif
>>
Hello Geert,
On Wednesday, December 10, 2008 you wrote:
> On Tue, 9 Dec 2008, Yuri Tikhonov wrote:
>> The following patch fixes divide-by-zero error for the
>> cases of really big PAGE_SIZEs (e.g. 256KB on ppc44x).
>> Support for such big page sizes on 44x is not pres
h the things actually done
in the code.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
kernel/fork.c |8 ++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/kernel/fork.c b/kernel/fork.c
index 2a372a0..b0a
device definitions and the architecture specific support
>> >> routines for the ppc440spe adma driver.
>> >>
>> >> Any board equipped with PPC440SP(e) controller may utilize this driver.
>> >>
>> >> Signed-off-by: Yuri Tikhonov <[EMAI
On Tuesday, December 9, 2008 you wrote:
> On Mon, Dec 8, 2008 at 2:55 PM, Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
>> Using src_list argument of async_xor() as a storage for dma addresses
>> implies sizeof(dma_addr_t) <= sizeof(struct page *) restriction which is
handle_stripe6 function is changed to do things asynchronously.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 130
1 files changed, 90 insertions(+),
Some clean-up of the replaced or already unnecessary functions.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 246
1 files changed, 0 insertions(+), 2
This patch introduces the state machine for handling the RAID-6 parities
check and repair functionality.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 163 +++--
Change handle_stripe_fill6 to work asynchronously and introduce helper
fetch_block6 function for this.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 154 -
Rewrite handle_stripe_dirtying6 function to work asynchronously.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 113 ++--
1 files changed, 30 insertions(+),
To be able to re-use the schedule_reconstruction5() code in RAID-6
case, this should handle Q-parity strip appropriately. This patch
introduces this.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/md/raid5.c | 18 +
STRIPE_OP_POSTXOR
- recalculate parity for new data that has entered the cache
STRIPE_OP_CHECK
- verify that the parity is correct
The flow is the same as in the RAID-5 case.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
driver
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
crypto/async_tx/Kconfig |5 +
crypto/async_tx/Makefile|1 +
crypto/async_tx/async_r6recov.c | 282 +++
include/linu
synchronous
case.
To support this API dmaengine driver should set DMA_PQ and
DMA_PQ_ZERO_SUM capabilities and provide device_prep_dma_pq and
device_prep_dma_pqzero_sum methods in dma_device structure.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL
Using src_list argument of async_xor() as a storage for dma addresses
implies sizeof(dma_addr_t) <= sizeof(struct page *) restriction which is
not always true (e.g. ppc440spe).
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
---
2) RAID-6 implementation (patches 4-10)
3) ppc440spe ADMA driver (patch 11) (provided as a reference here)
--
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Emcraft Systems, www.emcraft.com
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finally to an incorrect result of calculations.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
---
crypto/async_tx/async_xor.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/crypto/async_tx/async_xor.c b/crypto/async_tx/async_xor.c
index 91dbf07..291f517 100644
--- a/
Add one more compatible string to the table for
of_platform binding, so that the platforms, which
have the SysACE chip on board (e.g. Katmai), could
describe it in their device trees correctly.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
---
drivers/block/xsysace.c |1 +
1 files c
Hello Grant,
On Thursday 27 November 2008 17:11, Grant Likely wrote:
> On Thu, Nov 27, 2008 at 5:21 AM, Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
> > Use resource_size_t for physical address of SystemACE
> > chip. This fixes the driver brokeness for 32 bit systems
> >
ble string for more
clean description of the hardware, and fixes a sector_t-
related compilation warning.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/block/xsysace.c | 24 +---
1 files changed
.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
drivers/block/xsysace.c | 24 +---
1 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/block/xsysace.c b/drivers/block/xsysace.c
index ecab9e6..9e
ASYNC_TX interfaces,
so we specified the destinations separately. Though I'm fine with your
prototype, since doubling the same address is no good, so, we'll
change this.
Any comments regarding the drivers/md/raid5.c part ?
Regards, Yuri
--
Yuri Tikhonov, Senior Software Engineer
dma_addr_t on 64-bit CPUs only:
#ifdef CONFIG_64BIT
#define CAST_U32_TO_PTR(x) ((void *)(u64)x)
#define CAST_PTR_TO_U32(x) ((u32)(u64)x)
#else
#define CAST_U32_TO_PTR(x) ((void *)x)
#define CAST_PTR_TO_U32(x) ((u32)x)
#endif
#define mpt_addr_size() \
((sizeof(dma_addr_t) == size
Hello Milton,
On Friday, November 14, 2008 you wrote:
> On Nov 13, 2008, at 10:32 PM, Yuri Tikhonov wrote:
>> On Tuesday, November 11, 2008 Milton Miller wrote:
>>>>>> #ifdef CONFIG_PTE_64BIT
>>>>>> typedef unsigned long long pte_basic_t;
>>
ully contained within 32 bits space */
- if (res->end > 0x) {
- printk(KERN_ERR "%s: dma-ranges outside of 32 bits space\n",
- hose->dn->full_name);
- return -ENXIO;
- }
out:
dma_offset_set =
Hello Grant,
On Friday, November 14, 2008 you wrote:
> On Thu, Nov 13, 2008 at 06:45:33AM -0500, Josh Boyer wrote:
>> On Thu, 13 Nov 2008 11:49:14 +0300
>> Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
>> > + [EMAIL PROTECTED] {
>> > +
ase: SysAce is connected to the External Bus Controller of
440SPe, which in turns is attached as a slave to OPB (on-chip
peripheral).
Regards, Yuri
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Hello Stephen,
On Thursday, November 13, 2008 you wrote:
> Hi Yuri,
> On Thu, 13 Nov 2008 11:43:17 +0300 Yuri Tikhonov <[EMAIL PROTECTED]> wrote:
>>
>> - dev_dbg(ace->dev, "physaddr=0x%lx irq=%i\n", ace->physaddr, ace->irq);
>> + dev_d
Hello Ben,
On Thursday, November 13, 2008 you wrote:
> On Thu, 2008-11-13 at 11:49 +0300, Yuri Tikhonov wrote:
>> Hello,
>>
>> This patch extends DMA ranges for PCI(X) to 4GB, so that it could
>> work on Katmais with 4GB RAM installed.
> And where do you put MM
_44x.S code is essentially based on the assumption of
2-level page addressing. Also, I may guess that eliminating of the
PGD level won't be as easy as just a re-implementation of the TLB-miss
handlers in head_44x.S. So, the current approach for 256K-pages
support was just a compromise between
Hello,
This patch adds using resource_size_t for physical address of SystemACE
chip. This makes the driver workable on 32 bit systems with 64-bit resources
(e.g. PPC440SPe).
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Ilya Yanok <[EMAIL PROTECTED]>
---
d
<[EMAIL PROTECTED]>
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
---
arch/powerpc/boot/dts/katmai.dts | 46 +++--
1 files changed, 38 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts
i
fine PGDIR_ORDER 1
>> #else
>> #define PGDIR_ORDER 0
>> #endif
>> #else
>> #define PGDIR_ORDER 0
>> #endif
>>
> Yuri, any comments?
... as for me, I like your approach more.
Regards, Yuri
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, doing 'rlwimi' we masked our V/SIZE bits and cleared EPN for
all 4/16/64/256K PAGE_SIZE cases.
Regards, Yuri
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6KB page size, I cannot understand why PTE_SHIFT is 11. Since
> each PTE entry is 8 byte, PTE_SHIFT should have been 15. But then
> there would be no bits in the Effective address for the 1st level
> PGDIR offset. On what basis PTE_SHIFT of 11 is chosen? This overflow
> problem happens o
connected to LPB of MPC5200 is to mark your struct map_info as .phys =
NO_XIP, and implement read/write/copy_from/copy_to byte-to-byte functions (in
your drivers/mtd/maps/ board file).
Regards, Yuri
--
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Emcraft Syst
ich makes Linux-2.6 swap routines operate correctly
on
> > > the ppc-8xx-based machines.
> >
> > is there any 8xx board left which isn't ported to ARCH=powerpc?
>
> More importantly, is this something that is also broken in arch/powerpc? It
> looks like it has
Yuri
On Saturday 02 February 2008 14:22, you wrote:
...
> > Here is the patch which makes Linux-2.6 swap routines operate correctly
on
> > the ppc-8xx-based machines.
>
> is there any 8xx board left which isn't ported to ARCH=powerpc?
>
> Thanks,
> Jochen
>
--
Hello,
Here is the patch which makes Linux-2.6 swap routines operate correctly on
the ppc-8xx-based machines.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
--
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index eb8d26f..321bda2 100644
--- a/arch/ppc/kernel/head
nefit
from using L2-cache for these, RAID, cases at all.
Regards, Yuri
On Wednesday 28 November 2007 22:50, Eugene Surovegin wrote:
> On Wed, Nov 07, 2007 at 01:40:10AM +0300, Yuri Tikhonov wrote:
> >
> > Hello all,
> >
> > Here is a patch-set for support L2-ca
Hi Ben,
On 08.11.2007, 2:19:33 you wrote:
> On Thu, 2007-11-08 at 02:12 +0300, Yuri Tikhonov wrote:
>> This is the updated patch for support synchronization of L2-Cache with
>> the external memory on the ppc44x-based platforms.
>>
>> Differencies against the prev
-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Pavel Kolesnikov <[EMAIL PROTECTED]>
--
diff --git a/arch/powerpc/lib/dma-noncoherent.c
b/arch/powerpc/lib/dma-noncoherent.c
index 1947380..b06f05c 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoheren
Should the above init be called for all configs, not just
> when L2_CACHE is enabled?
> Also, it looks like the init function is the same on every board. It would
> be better to make a common function instead of duplicating it everywhere.
Agree, but perhaps it's not the cas
call it
> if set.
Agree; this looks better indeed.
> On Wed, Nov 07, 2007 at 01:40:28AM +0300, Yuri Tikhonov wrote:
...
>> +
>> /*
>> * Write any modified data cache blocks out to memory.
>> * Does not invalidate the corresponding cache lines (especially for
>&g
This patch introduces the L2_CACHE configuration option available
for the ppc44x-based boards with L2-cache enabled.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Pavel Kolesnikov <[EMAIL PROTECTED]>
--
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/p
Support for L2-cache coherency synchronization routines in ppc44x
processors.
Signed-off-by: Yuri Tikhonov <[EMAIL PROTECTED]>
Signed-off-by: Pavel Kolesnikov <[EMAIL PROTECTED]>
--
diff --git a/arch/powerpc/lib/dma-noncoherent.c
b/arch/powerpc/lib/dma-noncoherent.c
index 1947
one of the boards listed below :)].
[PATCH 1/2] [PPC 4xx] invalidate_l2cache_range() implementation for ppc44x;
[PATCH 2/2] [PPC 44x] enable L2-cache for the following ppc44x-based boards:
ALPR,
Katmai, Ocotea, and Taishan.
Regards, Yuri
--
Yuri Tikhonov, Senior Software Engineer
Emcra
On Friday 19 October 2007 17:24, Kumar Gala wrote:
>
> On Oct 18, 2007, at 6:21 PM, Paul Mackerras wrote:
>
> > Yuri Tikhonov writes:
> >
> >> The following patch adds support for 256KB PAGE_SIZE on ppc44x-
> >> based boards.
> >> The applicati
asing the PAGE_SIZE value we
reduce
the number of these complex algorithms calls needed to process the whole test
(writing
the fixed number of MBytes to RAID array). So, there are no user space aspects.
--
Yuri Tikhonov, Senior Software Engineer
Emcraft Systems, www.emcraft.com
___
n that no binutils changes are
> required.
That's true, but the additional performance is an attractive thing too.
>
> Paul.
>
--
Yuri Tikhonov, Senior Software Engineer
Emcraft Systems, www.emcraft.com
___
Linuxppc-dev mailing list
Lin
; > supported for PPC64 architectures only. Here we have PPC32.
>
> Well that needs fixing anyway, but ok. Also, is the modified binutils
> only required for userspace to take advantage here? Seems so, but I'd
> just like to be sure.
You are right, for userspace only.
>
&g
the standard binutils.
Modifications
to them are necessary for user-space applications only. And the libraries as
well.
--
Yuri Tikhonov, Senior Software Engineer
Emcraft Systems, www.emcraft.com
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Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
On Thursday 18 October 2007 15:47, Benjamin Herrenschmidt wrote:
>
> > Signed-off-by: Pavel Kolesnikov <[EMAIL PROTECTED]>
> > Acked-by: Yuri Tikhonov <[EMAIL PROTECTED]>
>
> Small nit...
>
> You are posting the patch, thus you should be signing off, no
o this is
why we made this in arch/ppc.
> Also, I'd rather see something along the lines of hugetlbfs support instead.
Here I agree with Benjamin. Furthermore, IIRC the hugetlb file-system is
supported for PPC64 architectures only. Here we have PPC32.
> josh
--
Yuri Tikhonov
oards.
The applications to be run on the kernel with 256KB PAGE_SIZE have to be
built using the modified version of binutils, where the MAXPAGESIZE
definition is set to 0x4 (as opposite to standard 0x1).
Signed-off-by: Pavel Kolesnikov <[EMAIL PROTECTED]>
Acked-by: Yuri Tikho
).
Signed-off-by: Pavel Kolesnikov <[EMAIL PROTECTED]>
Acked-by: Yuri Tikhonov <[EMAIL PROTECTED]>
--
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index c590b18..0ee372d 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -1223,6 +1223,9 @@ config PPC_PAGE_16K
config
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