Christophe Leroy wrote:
Le 28/03/2022 à 19:20, Naveen N. Rao a écrit :
Michael Ellerman wrote:
Murilo Opsfelder Araújo writes:
On 3/23/22 08:51, Naveen N. Rao wrote:
+static inline bool can_single_step(u32 inst)
+{
+ switch (inst >> 26) {
Can't ppc_inst_primary_opcode() be used instea
Le 28/03/2022 à 19:20, Naveen N. Rao a écrit :
> Michael Ellerman wrote:
>> Murilo Opsfelder Araújo writes:
>>> On 3/23/22 08:51, Naveen N. Rao wrote:
+static inline bool can_single_step(u32 inst)
+{
+ switch (inst >> 26) {
>>>
>>> Can't ppc_inst_primary_opcode() be used instea
Michael Ellerman wrote:
Murilo Opsfelder Araújo writes:
On 3/23/22 08:51, Naveen N. Rao wrote:
+static inline bool can_single_step(u32 inst)
+{
+ switch (inst >> 26) {
Can't ppc_inst_primary_opcode() be used instead?
I didn't want to add a dependency on inst.h. But I guess I can very
Murilo Opsfelder Araújo writes:
> On 3/23/22 08:51, Naveen N. Rao wrote:
...
>> +case 31:
>> +switch ((inst >> 1) & 0x3ff) {
>> +case 4: /* tw */
>> +return false;
>> +case 68:/* td */
>> +return false;
Hi, Naveen.
Some comments below.
On 3/23/22 08:51, Naveen N. Rao wrote:
Per the ISA, a Trace interrupt is not generated for:
- [h|u]rfi[d]
- rfscv
- sc, scv, and Trap instructions that trap
- Power-Saving Mode instructions
- other instructions that cause interrupts (other than Trace interrupts)
Per the ISA, a Trace interrupt is not generated for:
- [h|u]rfi[d]
- rfscv
- sc, scv, and Trap instructions that trap
- Power-Saving Mode instructions
- other instructions that cause interrupts (other than Trace interrupts)
- the first instructions of any interrupt handler (applies to Branch and Si
