Re: [PATCH v2 3/9] powerpc/powernv: Move idle code usable by multiple hardware to common location

Hi Shreyas, On Tue, May 03, 2016 at 01:54:32PM +0530, Shreyas B. Prabhu wrote: > CPU-idle related code like context save/restore functions idle_power7.S > can reused for adding stop instruction support. Move this > code to a new commonly accessible location. [..snip..] > diff --git

Re: [PATCH v2 4/9] powerpc/powernv: Make power7_powersave_common more generic

Hi Shreyas, On Tue, May 03, 2016 at 01:54:33PM +0530, Shreyas B. Prabhu wrote: > power7_powersave_common does common steps needed before entering idle > state and eventually changes MSR to MSR_IDLE and does rfid to > power7_enter_nap_mode. > > Make it more generic by passing the rfid address as

Re: [PATCH v2 1/9] powerpc/powernv: Move CHECK_HMI_INTERRUPT to exception-64s header

o facilitate the invocation of CHECK_HMI_INTERRUPT in some later patch ? In this case you could add this to the commit message. Otherwise, Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> > --- > arch/powerpc/include/asm/exception-64s.h | 18 ++ > arch/powerpc/kerne

Re: [PATCH v2 2/9] powerpc/kvm: make hypervisor state restore a function

Hi Shreyas, On Wed, May 18, 2016 at 12:37:56PM +0530, Shreyas B Prabhu wrote: [..snip..] > >> diff --git a/arch/powerpc/kernel/exceptions-64s.S > >> b/arch/powerpc/kernel/exceptions-64s.S > >> index 7716ceb..7ebfbb0 100644 > >> --- a/arch/powerpc/kernel/exceptions-64s.S > >> +++

Re: [PATCH v2 5/9] powerpc/powernv: Move idle related macros to cpuidle.h

On Tue, May 03, 2016 at 01:54:34PM +0530, Shreyas B. Prabhu wrote: > Move idle related macros to a common location asm/cpuidle.h so that > they can be used for stop instruction support. > > Signed-off-by: Shreyas B. Prabhy <shre...@linux.vnet.ibm.com> Reviewed-by: Ga

Re: [PATCH v2 4/9] powerpc/powernv: Make power7_powersave_common more generic

On Wed, May 18, 2016 at 12:21:17PM +0530, Shreyas B Prabhu wrote: > With this patch, r5 which is the third parameter to > power_powersave_common contains the return address that needs to be > written to SRR0. So here I'm keeping r5 unaltered and using r7 for the MSR. Ok. Reviewed-by:

Re: [PATCH v3 2/9] powerpc/powernv: Rename idle_power7.S to idle_power_common.S

Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH v3 3/9] powerpc/powernv: Rename reusable idle functions to hardware agnostic names

t; > Suggested-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> > Signed-off-by: Shreyas B. Prabhu <shre...@linux.vnet.ibm.com> > --- > New in v3 > > arch/powerpc/kernel/exceptions-64s.S| 6 +++--- > arch/powerpc/kernel/idle_power_common.S | 16

Re: [PATCH v3 4/9] powerpc/powernv: Make power7_powersave_common more generic

_HWTHREAD_STATE to power7_powersave_common > from power7_enter_nap_mode and make it more generic by passing the rfid > address as a function parameter. > > Also make function name more generic. > > Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> > Signed-off-by: Shr

Re: [PATCH v3 5/9] powerpc/powernv: abstraction for saving SPRs before entering deep idle states

On Mon, May 23, 2016 at 08:48:38PM +0530, Shreyas B. Prabhu wrote: > Create a function for saving SPRs before entering deep idle states. > This function can be reused for POWER9 deep idle states. > > Signed-off-by: Shreyas B. Prabhu <shre...@linux.vnet.ibm.com> Reviewed-by: Ga

Re: [PATCH v3 8/9] cpuidle/powernv: Add support for POWER ISA v3 idle states

id.au> > Cc: Paul Mackerras <pau...@ozlabs.org> > Cc: linuxppc-dev@lists.ozlabs.org > Signed-off-by: Shreyas B. Prabhu <shre...@linux.vnet.ibm.com> Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> -- Thanks and Regards gautham.

Re: [PATCH v3 7/9] powerpc/powernv: Add platform support for stop instruction

Hi Shreyas, On Mon, May 23, 2016 at 08:48:40PM +0530, Shreyas B. Prabhu wrote: > @@ -412,7 +517,8 @@ subcore_state_restored: > first_thread_in_core: > > /* > - * First thread in the core waking up from fastsleep. It needs to > + * First thread in the core waking up from any

Re: [PATCH v2 7/9] powerpc/powernv: Add platform support for stop instruction

Hi Shreyas, On Tue, May 03, 2016 at 01:54:36PM +0530, Shreyas B. Prabhu wrote: > POWER ISA v3 defines a new idle processor core mechanism. In summary, > a) new instruction named stop is added. This instruction replaces > instructions like nap, sleep, rvwinkle. > b) new per thread SPR

Re: [PATCH v2 9/9] powerpc/powernv: Use deepest stop state when cpu is offlined

On Tue, May 03, 2016 at 01:54:38PM +0530, Shreyas B. Prabhu wrote: > If hardware supports stop state, use the deepest stop state when > > the cpu is offlined. > > Signed-off-by: Shreyas B. Prabhu <shre...@linux.vnet.ibm.com> Reviewed-by: Gautham R. Shenoy <e...@linux.

Re: [PATCH 2/2] workqueue:Fix affinity of an unbound worker of a node with 1 online CPU

Hi Tejun, On Thu, Jun 16, 2016 at 03:39:05PM -0400, Tejun Heo wrote: > On Thu, Jun 16, 2016 at 02:45:48PM +0200, Peter Zijlstra wrote: > > Subject: workqueue: Fix setting affinity of unbound worker threads > > From: Peter Zijlstra > > Date: Thu Jun 16 14:38:42 CEST 2016 > >

[PATCH v6 4/5] powernv: Pass PSSCR value and mask to power9_idle_stop

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> The power9_idle_stop method currently takes only the requested stop level as a parameter and picks up the rest of the PSSCR bits from a hand-coded macro. This is not a very flexible design, especially when the firmware ha

[PATCH v6 5/5] Documentation:powerpc: Add device-tree bindings for power-mgt

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Document the device-tree bindings defining the the properties under the @power-mgt node in the device tree that describe the idle states for Linux running on baremetal POWER servers. These bindings are documented separately

[PATCH v6 2/5] powernv:stop: Rename pnv_arch300_idle_init to pnv_power9_idle_init

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Balbir pointed out that the name of the function pnv_arch300_idle_init was inconsistent with the names of the variables and functions pertaining to POWER9 features in book3s_idle.S. This patch renames pnv_a

Re: [PATCH v5 5/5] Documentation:powerpc: Add device-tree bindings for power-mgt

Hello Rob, Thank you very much for your review. I had missed this mail and found it while looking at the lkml thread while preparing for the next iteration. On Fri, Jan 13, 2017 at 10:57:43AM -0600, Rob Herring wrote: > On Tue, Jan 10, 2017 at 02:37:04PM +0530, Gautham R. Shenoy wrote: >

[PATCH v6 1/5] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA v3.0, when the ESL and EC bits in th

[PATCH v6 0/5] powernv:stop: Use psscr_val,mask provided by firmware

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> This is the sixth iteration of the patchset to use the psscr_val and psscr_mask provided by the firmware for each of the stop states. The previous versions can be found here: [v5]: https://lkml.org/lkml/2017/1/10/147 [v4]: https

[PATCH v6 3/5] cpuidle:powernv: Add helper function to populate powernv idle states.

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> In the current code for powernv_add_idle_states, there is a lot of code duplication while initializing an idle state in powernv_states table. Add an inline helper function to populate the powernv_states[] table for a given id

Re: [PATCH v6 3/5] cpuidle:powernv: Add helper function to populate powernv idle states.

On Mon, Jan 30, 2017 at 10:17:50PM +1100, Michael Ellerman wrote: > "Rafael J. Wysocki" <raf...@kernel.org> writes: > > > On Mon, Jan 30, 2017 at 4:47 AM, Michael Ellerman <m...@ellerman.id.au> > > wrote: > >> "Gautham R. Shenoy" &l

[PATCH] powernv-cpuidle: Validate DT property arrays are of same size

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> The various properties associated with powernv idle states such as names, flags, residency-ns, latencies-ns, psscr, psscr-mask are exposed in the device-tree as property arrays such the pointwise entries in each of these a

[RFC/PATCH 1/2] cpuidle: Allow idle-states to be disabled at start

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently all the idle states registered by a cpu-idle driver are enabled by default. This patch adds a mechanism which allows the driver to hint if an idle-state should start in a disabled state. The cpu-idle core wi

[RFC/PATCH 0/2] powernv:cpuidle: Enable winkle idle state

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Hi, The patches in these series enable support for Winkle idle state in CPU-Idle. The first patch is a platform-independent CPU-Idle patch that allows CPU-Idle states to be disabled at start (Currently they are all en

[RFC/PATCH 2/2] powernv:cpuidle: Enable winkle idle state in CPU-Idle.

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> cpu-idle on powernv currently has support for only snooze, nap and fastsleep states. Winkle idle state was excluded due to its large exit-latency. This patch adds winkle as a cpu-idle state for experimental purposes. This s

Re: [PATCH 3/5] powerpc/64s: use alternative feature patching

Hi Nick, On Fri, Feb 17, 2017 at 12:08 AM, Nicholas Piggin <npig...@gmail.com> wrote: > This reduces the number of nops for POWER8 > > Signed-off-by: Nicholas Piggin <npig...@gmail.com> This change looks ok to me. Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com

Re: [PATCH 4/5] powerpc/64s: consolidate pnv_restore_hyp_resource into pnv_powersave_wakeup

Hi Nick, On Fri, Feb 17, 2017 at 12:09 AM, Nicholas Piggin <npig...@gmail.com> wrote: > There is only one caller, so this reduces spaghetti of subsequent > callees returning into the caller. > > Signed-off-by: Nicholas Piggin <npig...@gmail.com> This patch is good!

Re: [PATCH 2/5] powerpc/64: stop using bit in HSPRG0 to test winkle

Hi Nick, On Fri, Feb 17, 2017 at 12:08 AM, Nicholas Piggin wrote: > The POWER8 idle code has a neat trick of programming the power on engine > to restore a low bit into HSPRG0, so idle wakeup code can test and see > if it has been programmed this way and therefore lost all

Re: [PATCH 1/5] powerpc/64s: move remaining system reset idle code into idle_book3s.S

Hi Nick, This patch is fine by me. Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> On Fri, Feb 17, 2017 at 12:08 AM, Nicholas Piggin <npig...@gmail.com> wrote: > Should be no functional change. > > Signed-off-by: Nicholas Piggin <npig...@gmail.com> &

Re: [PATCH 5/5] powerpc/64s: fix POWER9 machine check handler from stop state

rn */ > + BEGIN_FTR_SECTION > + rlwinm. r11,r12,47-31,30,31 > + beq-4f > + BRANCH_TO_COMMON(r10, machine_check_idle_common) > 4: > + END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) > #endif > + > /* > * Check if we are coming from hypervisor userspace. If yes then we > * continue in host kernel in V mode to deliver the MC event. > -- > 2.11.0 > Otherwise, the patch looks correct to me. Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> -- Thanks and Regards gautham.

[PATCH] powernv:idle: Fix bug due to labeling ambiguity in power_enter_stop

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Commit 09206b600c76 ("powernv: Pass PSSCR value and mask to power9_idle_stop") added additional code in power_enter_stop() to distinguish between stop requests whose PSSCR had ESL=EC=1 from those which did not. When

Re: [PATCH] powernv:idle: Fix bug due to labeling ambiguity in power_enter_stop

Hi Anton, On Mon, Feb 27, 2017 at 10:37:07AM +1100, Anton Blanchard wrote: > Hi Gautham, > > > +handle_esl_ec_set: > > Unless we want to expose this to things like perf, we might want to > make it a local label (eg .Lxx) Sure. We don't want to expose this to perf at least as of now! Will resend

[v2 PATCH] powernv:idle: Fix bug due to labeling ambiguity in power_enter_stop

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Commit 09206b600c76 ("powernv: Pass PSSCR value and mask to power9_idle_stop") added additional code in power_enter_stop() to distinguish between stop requests whose PSSCR had ESL=EC=1 from those which did not. When

[PATCH 0/2] powernv: Implement lite variant of stop with ESL=EC=0

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Hi, The Power ISA v3.0 allows us to execute the "stop" instruction with ESL and EC of the PSSCR set to 0. This will ensure no loss of state, and the wakeup from the stop will happen at an instruction following the

[PATCH 1/2] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA_300, when the ESL and EC bits in th

[PATCH 2/2] powernv:idle:Implement lite variant of power_enter_stop

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> This patch adds a function named power_enter_stop_lite() that can execute a stop instruction when ESL and EC bits are set to zero in the PSSCR. The function handles the wake-up from idle at the instruction immediately after the

Re: [PATCH 2/2] powernv: Pass PSSCR value and mask to power9_idle_stop

Hi Balbir, Michael, On Tue, Oct 04, 2016 at 10:33:27PM +1100, Balbir Singh wrote: > > > On 04/10/16 21:32, Michael Ellerman wrote: > > "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> writes: > > > >> From: "Gautham R. Shenoy" <e..

Re: [PATCH 2/2] powernv:idle:Implement lite variant of power_enter_stop

Hi Balbir, On Tue, Sep 20, 2016 at 03:54:43PM +1000, Balbir Singh wrote: > > diff --git a/arch/powerpc/platforms/powernv/idle.c > > b/arch/powerpc/platforms/powernv/idle.c > > index 479c256..c3d3fed 100644 > > --- a/arch/powerpc/platforms/powernv/idle.c > > +++

Re: [PATCH 2/2] powernv:idle:Implement lite variant of power_enter_stop

Hi Michael, On Fri, Sep 23, 2016 at 09:03:45PM +1000, Michael Ellerman wrote: > "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> writes: > > > From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> > > > > This patch adds a function named power_e

[PATCH] powernv: Restore SPRs correctly upon wake up from hypervisor state loss

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> pnv_wakeup_tb_loss function currently expects the cr4 to be "eq" if the CPU is waking up from a complete hypervisor state loss. Hence, it currently restores the SPR contents only if cr4 is "eq". However, aft

[PATCH 0/2] powernv:stop: Use psscr_val,mask provided by firmware

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Hi, In the current implementation, the code for ISA v3.0 stop implementation has a couple of shortcomings. a) The code hand-codes the values for ESL,EC,TR,MTL bits of PSSCR and uses only the RL field from the

[PATCH 2/2] powernv: Pass PSSCR value and mask to power9_idle_stop

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> The power9_idle_stop method currently takes only the requested stop level as a parameter and picks up the rest of the PSSCR bits from a hand-coded macro. This is not a very flexible design, especially when the firmware ha

[PATCH 1/2] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA_300, when the ESL and EC bits in th

[PATCH v2 2/3] cpuidle:powernv: Add helper function to populate powernv idle states.

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> In the current code for powernv_add_idle_states, there is a lot of code duplication while initializing an idle state in powernv_states table. Add an inline helper function to populate the powernv_states[] table for a given id

[PATCH v2 3/3] powernv: Pass PSSCR value and mask to power9_idle_stop

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> The power9_idle_stop method currently takes only the requested stop level as a parameter and picks up the rest of the PSSCR bits from a hand-coded macro. This is not a very flexible design, especially when the firmware ha

[PATCH v2 1/3] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA_300, when the ESL and EC bits in th

[PATCH v2 0/3] powernv:stop: Use psscr_val,mask provided by firmware

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Hi, This is the second iteration of the patchset to use the psscr_val and psscr_mask provided by the firmware for each of the stop states. The previous version can be found here: https://lkml.org/lkml/2016/9/29/45

Re: [PATCH v2] ppc: cpufreq: disable preemption while checking CPU throttling state

07d25b7e30] [c000bfec] system_call+0x38/0xfc > > Signed-off-by: Denis Kirjanov <k...@linux-powerpc.org> > > v2: wrap powernv_cpufreq_throttle_check() > as suggested by Gautham R Shenoy Looks good otherwise. Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ib

Re: [PATCH v2] ppc: cpufreq: disable preemption while checking CPU throttling state

Hi Michael, On Tue, Nov 08, 2016 at 11:21:23AM +1100, Michael Ellerman wrote: > Denis Kirjanov writes: > > On 11/7/16, Michael Ellerman wrote: > >> Denis Kirjanov writes: > >>> [ 67.700897] BUG: using smp_processor_id()

Re: [PATCH v2 2/2] cpufreq: powernv: Use PMCR to verify global and local pstate

tate_idx) > queue_gpstate_timer(gpstates); > > - freq_data.gpstate_id = idx_to_pstate(gpstate_idx); > - gpstates->last_gpstate_idx = pstate_to_idx(freq_data.gpstate_id); > - gpstates->last_lpstate_idx = pstate_to_idx(freq_data.pstate_id); > - > spin_unlock(>gpstate_lock); > > /* Timer may get migrated to a different cpu on cpu hot unplug */ > -- > 2.5.5 Looks good otherwise. Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> >

[PATCH v3 3/3] powernv: Pass PSSCR value and mask to power9_idle_stop

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> The power9_idle_stop method currently takes only the requested stop level as a parameter and picks up the rest of the PSSCR bits from a hand-coded macro. This is not a very flexible design, especially when the firmware ha

[PATCH v3 2/3] cpuidle:powernv: Add helper function to populate powernv idle states.

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> In the current code for powernv_add_idle_states, there is a lot of code duplication while initializing an idle state in powernv_states table. Add an inline helper function to populate the powernv_states[] table for a given id

[PATCH v3 1/3] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA_300, when the ESL and EC bits in th

[PATCH v3 0/3] powernv:stop: Use psscr_val,mask provided by firmware

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> This is the third iteration of the patchset to use the psscr_val and psscr_mask provided by the firmware for each of the stop states. The previous version can be found here: [v2]: https://lkml.org/lkml/2016/10/27/143 [v1]:

Re: [PATCH 1/2] powerpc/64: Re-fix race condition between going idle and entering guest

Hi Paul, [Added Shreyas's current e-mail address ] On Fri, Oct 21, 2016 at 08:03:05PM +1100, Paul Mackerras wrote: > Commit 8117ac6a6c2f ("powerpc/powernv: Switch off MMU before entering > nap/sleep/rvwinkle mode", 2014-12-10) fixed a race condition where one > thread entering a KVM guest could

Re: [PATCH 2/2] powerpc/64: Fix race condition in setting lock bit in idle/wakeup code

Hi Paul, On Fri, Oct 21, 2016 at 08:04:17PM +1100, Paul Mackerras wrote: > This fixes a race condition where one thread that is entering or > leaving a power-saving state can inadvertently ignore the lock bit > that was set by another thread, and potentially also clear it. > The

[RFC/PATCH] powernv: Handle wakeup from stop due to SRESET

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> The existing code doesn't handle the case when CPU which was in a hardware-idle state (nap,sleep,winkle on POWER8 and various stop states on POWER9) gets woken up due to a System Reset interrupt. This patch checks if the CPU

[PATCH v2] powernv: Handle wakeup from idle due to SRESET

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> The existing code doesn't handle the case when CPU which was in a hardware-idle state (nap,sleep,winkle on POWER8 and various stop states on POWER9) gets woken up due to a System Reset interrupt. This patch checks if the CPU

Re: [PATCH v3 3/3] powernv: Pass PSSCR value and mask to power9_idle_stop

Hi Michael, On Wed, Nov 23, 2016 at 08:51:10PM +1100, Michael Ellerman wrote: > "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> writes: > > > From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> > > > > The power9_idle_stop method currentl

Re: [PATCH v3 2/3] cpuidle:powernv: Add helper function to populate powernv idle states.

Hi Michael, On Wed, Nov 23, 2016 at 08:49:08PM +1100, Michael Ellerman wrote: > "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> writes: > > > diff --git a/drivers/cpuidle/cpuidle-powernv.c > > b/drivers/cpuidle/cpuidle-powernv.c > > index 7fe442c..9240e08

[PATCH] powernv: Clear SPRN_PSSCR when a POWER9 CPU comes online

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Ensure that PSSCR is set to a safe value corresponding to no state-loss each time a POWER9 CPU comes online. Signed-off-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> --- arch/powerpc/kernel/cpu_setup_power.S | 2

Re: [PATCH] ppc: cpufreq: Use get_cpu()/put_cpu() instead of smp_processor_id() to avoid the oops

Hi Denis, On Thu, Nov 03, 2016 at 07:20:41AM -0400, Denis Kirjanov wrote: > [ 67.700897] BUG: using smp_processor_id() in preemptible [] code: > cat/7343 > [ 67.700988] caller is .powernv_cpufreq_throttle_check+0x2c/0x710 > [ 67.700998] CPU: 13 PID: 7343 Comm: cat Not tainted

Re: [PATCH] powerpc/64s: relocation, register save fixes for system reset interrupt

Thu, 3 Nov 2016 01:56:46 -0400 > > > "Shreyas B. Prabhu" <shreya...@gmail.com> wrote: > > > > > >> On Thu, Nov 3, 2016 at 1:21 AM, Nicholas Piggin <npig...@gmail.com> > > >> wrote: > > >> > On Wed, 2 Nov 2016 14:15

Re: [PATCH v2 2/3] cpuidle:powernv: Add helper function to populate powernv idle states.

Hi Oliver, Thanks for reviewing the patch! On Tue, Nov 01, 2016 at 07:32:58PM +1100, Oliver O'Halloran wrote: > On Thu, Oct 27, 2016 at 7:35 PM, Gautham R. Shenoy > <e...@linux.vnet.ibm.com> wrote: > > From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.c

Re: [PATCH] powerpc/64s: relocation, register save fixes for system reset interrupt

Hi Nick, On Wed, Nov 02, 2016 at 07:36:24PM +1100, Nicholas Piggin wrote: > > Okay, I'll work with that. What's the best way to make a P8 do > winkle sleeps? >From the userspace, offlining the CPUs of the core will put them to winkle. > > Thanks, > Nick > -- Thanks and Regards gautham.

Re: [PATCH 2/2] powernv: Pass PSSCR value and mask to power9_idle_stop

Hi Stewart, On Wed, Oct 12, 2016 at 04:35:35PM +1100, Stewart Smith wrote: > > What if we just treat the 0xF state from firmware as special and set it > to DEFAULT_PSSCR_MASK in that case? That deals with old skiboot, new > kernel, and sets a pretty small special case that's easy to track into >

Re: [PATCH] powerpc/64s: relocation, register save fixes for system reset interrupt

s the various > idle handling functions. > > After this patch, POWER8 CPU simulator now boots powernv kernel that is > running at non-zero. This patch looks good to me. I have tested this on POWER8 and verified that we are correctly waking up from nap, sleep and winkle. Acked-by: Ga

[PATCH v4 3/4] powernv: Pass PSSCR value and mask to power9_idle_stop

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> The power9_idle_stop method currently takes only the requested stop level as a parameter and picks up the rest of the PSSCR bits from a hand-coded macro. This is not a very flexible design, especially when the firmware ha

[PATCH v4 0/4] powernv:stop: Use psscr_val,mask provided by firmware

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> This is the fourth iteration of the patchset to use the psscr_val and psscr_mask provided by the firmware for each of the stop states. The previous version can be found here: [v3]: https://lkml.org/lkml/2016/11/10/37 [v2]:

[PATCH v4 2/4] cpuidle:powernv: Add helper function to populate powernv idle states.

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> In the current code for powernv_add_idle_states, there is a lot of code duplication while initializing an idle state in powernv_states table. Add an inline helper function to populate the powernv_states[] table for a given id

[PATCH v4 4/4] Documentation:powerpc: Add device-tree bindings for power-mgt

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Document the device-tree bindings defining the the properties under the @power-mgt node in the device tree that describe the idle states for Linux running on baremetal POWER servers. Signed-off-by: Gautham R. Shenoy <e...

[PATCH v4 1/4] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA_300, when the ESL and EC bits in th

Re: [PATCH v4 2/4] cpuidle:powernv: Add helper function to populate powernv idle states.

Hi Balbir, On Tue, Dec 13, 2016 at 10:51:04PM +1100, Balbir Singh wrote: > > > On 10/12/16 00:32, Gautham R. Shenoy wrote: > > From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> > > > > In the current code for powernv_add_idle_states, there is a lot

Re: [PATCH v4 3/4] powernv: Pass PSSCR value and mask to power9_idle_stop

Hi Balbir, Thanks for reviewing the patch. Please find my comments inline. On Wed, Dec 14, 2016 at 11:16:26AM +1100, Balbir Singh wrote: [..snip..] > > > > /* > > - * r3 - requested stop state > > + * r3 - PSSCR value corresponding to the requested stop state. > > */ > > power_enter_stop:

Re: [PATCH v4 1/4] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

Hi Balbir, On Tue, Dec 13, 2016 at 09:13:26PM +1100, Balbir Singh wrote: > > > On 10/12/16 00:32, Gautham R. Shenoy wrote: > > From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> > > diff --git a/arch/powerpc/include/asm/cpuidle.h > > b/arch/powe

Re: [PATCH v5 2/5] powernv:stop: Uniformly rename power9 to arch300

On Thu, Jan 12, 2017 at 03:17:33PM +0530, Balbir Singh wrote: > On Tue, Jan 10, 2017 at 02:37:01PM +0530, Gautham R. Shenoy wrote: > > From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> > > > > Balbir pointed out that in idle_book3s.S and powernv/idle.c

[PATCH v5 1/5] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently all the low-power idle states are expected to wake up at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ that puts the CPU to an idle state and never returns. On ISA v3.0, when the ESL and EC bits in th

[PATCH v5 0/5] powernv:stop: Use psscr_val,mask provided by firmware

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> This is the fifth iteration of the patchset to use the psscr_val and psscr_mask provided by the firmware for each of the stop states. The previous versions can be found here: [v4]: https://lkml.org/lkml/2016/12/9/288 [v3]: https

[PATCH v5 2/5] powernv:stop: Uniformly rename power9 to arch300

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Balbir pointed out that in idle_book3s.S and powernv/idle.c some functions and variables had power9 in their names while some others had arch300. This patch uniformly renames all instances of "power9" in the variables/

[PATCH v5 4/5] powernv: Pass PSSCR value and mask to power9_idle_stop

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> The arch300_idle_stop method currently takes only the requested stop level as a parameter and picks up the rest of the PSSCR bits from a hand-coded macro. This is not a very flexible design, especially when the firmware ha

[PATCH v5 3/5] cpuidle:powernv: Add helper function to populate powernv idle states.

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> In the current code for powernv_add_idle_states, there is a lot of code duplication while initializing an idle state in powernv_states table. Add an inline helper function to populate the powernv_states[] table for a given id

[PATCH v5 5/5] Documentation:powerpc: Add device-tree bindings for power-mgt

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Document the device-tree bindings defining the the properties under the @power-mgt node in the device tree that describe the idle states for Linux running on baremetal POWER servers. Signed-off-by: Gautham R. Shenoy <e...

Re: [PATCH] cpufreq: powernv: Add boost files to export ultra-turbo frequencies

rc = cpufreq_register_driver(_cpufreq_driver); > - if (!rc) > - return 0; > + if (rc) { > + pr_info("Failed to register the cpufreq driver (%d)\n", rc); > + goto clean_notifiers; cleanup_notifiers ? > + } > > - pr_info("Failed to register the cpufreq driver (%d)\n", rc); > + if (powernv_pstate_info.wof_enabled) > + cpufreq_enable_boost_support(); > + > + return 0; > +clean_notifiers: > unregister_all_notifiers(); > clean_chip_info(); > out: > -- > 1.8.3.1 > Looks good otherwise. Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com>

[v3 PATCH 3/4] powernv:idle: Don't override default/deepest directly in kernel

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently during idle-init on power9, if we don't find suitable stop states in the device tree that can be used as the default_stop/deepest_stop, we set stop0 (ESL=1,EC=1) as the default stop state psscr to be used by power9_

[v3 PATCH 2/4] powernv:smp: Add busy-wait loop as fall back for CPU-Hotplug

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Currently, the powernv cpu-offline function assumes that platform idle states such as stop on POWER9, winkle/sleep/nap on POWER8 are always available. On POWER8, it picks nap as the default state if other deep idle states l

[v3 PATCH 1/4] powernv: Move CPU-Offline idle state invocation from smp.c to idle.c

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Move the piece of code in powernv/smp.c::pnv_smp_cpu_kill_self() which transitions the CPU to the deepest available platform idle state to a new function named pnv_cpu_offline() in powernv/idle.c. The rationale behind th

[v3 PATCH 0/4] powernv:idle: Fixes for CPU-Hotplug on POWER DD1.0

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> Hi, This is the third version of the patchset containing the fixes to make CPU-Hotplug working on correctly on POWER9 DD1 systems. The earlier versions can be found here: [v2] : https://lkml.org/lkml/2017/3/20/555 [v1] : https

[v3 PATCH 4/4] powernv: Recover correct PACA on wakeup from a stop on P9 DD1

From: "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> POWER9 DD1.0 hardware has an issue due to which the SPRs of a thread waking up from stop 0,1,2 with ESL=1 can endup being misplaced in the core. Thus the HSPRG0 of a thread waking up from can contain the paca pointer of its sibl

Re: [PATCH v2 1/2] powerpc/powernv/cpuidle: Pass correct drv->cpumask for registration

0b564 ret_from_kernel_thread+0x5c/0x78 > > This patch fixes the bug by passing correct cpumask from > powernv-cpuidle driver. > > Signed-off-by: Vaidyanathan Srinivasan <sva...@linux.vnet.ibm.com> Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> > --- >

Re: [v3 PATCH 2/4] powernv:smp: Add busy-wait loop as fall back for CPU-Hotplug

On Mon, Mar 27, 2017 at 10:43:44PM +1100, Michael Ellerman wrote: > "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> writes: > > > diff --git a/arch/powerpc/platforms/powernv/idle.c > > b/arch/powerpc/platforms/powernv/idle.c > > index 419edff..f335e0f

Re: [PATCH v5 06/13] powerpc/perf: IMC pmu cpumask and cpu hotplug support

nters. > > On CPU hotplug, dying CPU is checked to see whether it is one of the > designated cpus, if yes, next online cpu from the same chip (for nest > units) is designated as new cpu to read counters. For this purpose, we > introduce a new state : CPUHP_AP_PERF_POWERPC_NEST_ONLI

Re: [PATCH v5 08/13] powerpc/perf: PMU functions for Core IMC and hotplugging

Hi Maddy, Hemant, Anju, On Thu, Mar 16, 2017 at 01:05:02PM +0530, Madhavan Srinivasan wrote: [..snip..] > + > +static void core_imc_change_cpu_context(int old_cpu, int new_cpu) > +{ > + if (!core_imc_pmu) > + return; > + perf_pmu_migrate_context(_imc_pmu->pmu, old_cpu,

Re: [PATCH 12/13] powerpc/perf: Thread imc cpuhotplug support

t comes > back online the previous ldbar value is written back to the LDBAR for that > cpu. > > To register the hotplug functions for thread_imc, a new state > CPUHP_AP_PERF_POWERPC_THREADIMC_ONLINE is added to the list of existing > states. > > Cc: Gautham R. Shenoy <e...@

Re: [PATCH 2/3] powernv:idle: Don't override default/deepest directly in kernel

Hi Nick, Thanks for reviewing the patch. On Wed, Mar 15, 2017 at 12:05:43AM +1000, Nicholas Piggin wrote: > On Mon, 13 Mar 2017 11:31:27 +0530 > "Gautham R. Shenoy" <e...@linux.vnet.ibm.com> wrote: > > > From: "Gautham R. Shenoy" <e...@linux.vnet.

Re: [PATCH 8/8] powerpc/64s: idle POWER8 avoid full state loss recovery when possible

Hi Nick, On Tue, Mar 14, 2017 at 07:23:49PM +1000, Nicholas Piggin wrote: > If not all threads were in winkle, full state loss recovery is not > necessary and can be avoided. A previous patch removed this optimisation > due to some complexity with the implementation. Re-implement it by > counting

Re: [PATCH 7/8] powerpc/64s: idle do not hold reservation longer than required

T(CPU_FTR_HVMODE) > > - lbz r7,PACA_THREAD_MASK(r13) > ld r14,PACA_CORE_IDLE_STATE_PTR(r13) > -lwarx_loop2: > - lwarx r15,0,r14 > - andis. r9,r15,PNV_CORE_IDLE_LOCK_BIT@h > + lbz r7,PACA_THREAD_MASK(r13) Is reversing the order of loads

Re: [PATCH 5/8] powerpc/64s: use PACA_THREAD_IDLE_STATE only in POWER8

Hi Nick, On Tue, Mar 14, 2017 at 07:23:46PM +1000, Nicholas Piggin wrote: > POWER9 does not use this field, so it should be moved into the POWER8 > code. Update the documentation in the paca struct too. > > Signed-off-by: Nicholas Piggin > --- >

Re: [PATCH 6/8] powerpc/64s: idle expand usable core idle state bits

omic operations while we're here. Looks good. Reviewed-by: Gautham R. Shenoy <e...@linux.vnet.ibm.com> > > Signed-off-by: Nicholas Piggin <npig...@gmail.com> > --- > arch/powerpc/include/asm/cpuidle.h | 4 ++-- > arch/powerpc/kernel/idle_book3s.S | 33 ++

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