MPC860 onchip WatchDog

In message you wrote: > > I just did this last week. My test load is cooking in the test oven now. > You need to tickle the WD at several places within the kernel. For me, it Depends on what you want to do. Normally it's sufficient to make sure one top-level application process is running, s

MPC860 onchip WatchDog

In message <3C86ACB3.C7445E95 at prodys.net> you wrote: > > Hi, I trying to use the MPC860 onchip WatchDog.I compile ppcboot-1.1.4 > with include/config_MBX.h ( I have a MBX860 board) I compile the > linux-2.4.4-2002-02-14 kernel by denx. I activate the WatchDog support Remember that you have to

Undefined refence error

Hai All, My First mail to this group.Not a master , only a newbie ,so please bear with me. I have successfully compiled the binutils, gcc for powerpc. Now I went for compiling glibc, which is giving some problems, so I left it and proceeded with compiling the kernel. Now it is giving following err

mmap wrapping around to 0 revisited

>It's not a bug that causes a system failure, just a feature that doesn't >work correctly. The only people I knew that were affected by this (which >included me and why I would fix it) were the ones that had a user application >flash programmer, and had to access the upper address space on PowerP

linux-2.4.18 & copy-back cache mode

In message <3C8643B7.60506 at embeddededge.com> you wrote: > > it was tracked down to a UPM/SDRAM timing problem. People keep talking > about running > 50 MHz bus on these newer parts, is there something > different about the memory controller that allows this and may cause > compatibility proble

MPC860 onchip WatchDog

I just did this last week. My test load is cooking in the test oven now. You need to tickle the WD at several places within the kernel. For me, it worked by putting the tickle code in kernel/sched.c & arch/ppc/boot/simple/misc-embedded.c. Granted, there is likely a better place to put chip spec

linux-2.4.18 & copy-back cache mode

> > >> After some more investigation I found that disabling Copy-Back mode >> (thus enabling Write-Through mode) fixed the problem. > > What version of silicon? Sounds like the "CPU6 errata" that affects > anything less than a Rev. C part. It's a Rev. D.3 Laurent Pinchart ** Sent via the linu

[PATCH] ocp enet

andrew may wrote: > On Tue, Mar 05, 2002 at 10:51:38AM +, Armin wrote: > >>andrew may wrote: >> >> >>>Well I just noticed that building as a module is pretty far from >>>working at the moment. Are there any plans to fix this? >>> >>Havn't thought about it but sound like it needs to addressed.

PPC440GP Support

Hi, we are designing a custom PPC440GP Board right now, and would like to know the status of the Linux port. When (roughly estimated) and how will it be possible to get a first version supporting the IBM Eboni evaluation board? Best regards, Stefan Roese ** Sent via the linuxppc-embedded mail

linux-2.4.18 & copy-back cache mode

Wolfgang Denk wrote: > There are no differences AFAIK. It's just a faster CPU that allows 66 > or even 76 MHz with 1:1 CPU/bus clock mode. Interesting. Faster than 50 MHz cores used to require the 2:1 bus clock division. I don't remember timing parameters that would exceed 50 MHz. Yes, the pa

[PATCH] ocp enet

On Tue, Mar 05, 2002 at 10:51:38AM +, Armin wrote: > > andrew may wrote: > > > > > Well I just noticed that building as a module is pretty far from > > working at the moment. Are there any plans to fix this? > > Havn't thought about it but sound like it needs to addressed. > > > I am not > > s

linux-2.4.18 & copy-back cache mode

Laurent Pinchart wrote: > It's a Rev. D.3 HI regularly use one of those for testing (maybe it's an 855T), and it seems OK for me. The first one I had didn't work well, but it was tracked down to a UPM/SDRAM timing problem. People keep talking about running > 50 MHz bus on these newer

linux-2.4.18 & copy-back cache mode

Hi everybody I tried to boot a FADS860T board with the 2.4.18 linux kernel, and experienced problems with cache set in Copy-Back mode. The kernel configuration help states that you can say 'Y' to Copy-Back mode if 'you don't know what that is about', so that's what I did. I then got a 'kernel a

linux-2.4.18 & copy-back cache mode

Laurent Pinchart wrote: > After some more investigation I found that disabling Copy-Back mode > (thus enabling Write-Through mode) fixed the problem. What version of silicon? Sounds like the "CPU6 errata" that affects anything less than a Rev. C part. -- Dan ** Sent via the linuxpp

problems with shared memory

I've got Linux 2.4.16 running on a custom MPC8260 board. when I do the program below in a tight loop i.e. while true do ./foo 8675 1024 done Things pop after about 20 iterations. It'll choose a different spot in the kernel to pop depending on what options I've compiled into the kernel. I beli