Daniel Ng wrote:
Scott Wood freescale.com> writes:
cuboot-824x is for 8240, 8245, and similar chips. You want cuboot-pq2.
Hi Scott et al,
I seem to get further with the cuboot-824x file- with the cuboot-pq2 file
Nonetheless, cuboot-pq2 is the correct one.
the boot sequence doesn
Joe Shmo wrote:
I'm using a board that is a derivative of the 8313ERDB
board. The freescale BSP for that board included a
patched uboot 1.1.6 that works with the 2.6.21 kernel.
[snip]
I've changed the DTS file describing our hardware and
recompiled it, but no luck. I'm wondering if the
differ
Daniel Ng wrote:
Thanks for your helpful responses Scott and Ming Qian. Now, from reading the
docco can you please verify my understanding is correct?-
First, I need a basic DTS file which will give me a basic Device Tree. The
cuboot*.c file takes care of adding other parameters to the Device
Daniel Ng wrote:
We are migrating our PowerPC 8272-based board from 2.6.14 to 2.6.27.
One of the big changes is the need for a Device Tree for bootup.
So far, my bootup looks like the below (using u-boot).
I am just using arch/powerpc/boot/cuboot-824x.c
cuboot-824x is for 8240, 8245, and si
liran raz wrote:
hi,
When using the function:
int request_irq (unsigned int irq,
irq_handler_t handler,
unsigned long irqflags,
const char * devname,
void * dev_id);
To connect an ISR to one of the processor's
peripherals irq (SCC in my case).
Which
Joe Shmo wrote:
What I don't know is what reg = <4> means. Is that
the phy address or the interrupt?
It's the PHY address.
My phy is the National semi dp83848. It does not use
an IRQ. Should I replace this with zero? Should I
take that line out of the DTS file?
You should remove the in
[EMAIL PROTECTED] wrote:
Maybe (with you clarification) this is starting to make sense. It doesn't
matter if the "src" is host memory or PCI space. What the "src" and it's
DMA_TO_DEVICE mapping is saying to the kernel is "this data needs to be
moved into the DMA engine", while the "dest" and
[EMAIL PROTECTED] wrote:
Hummm, let me try again, I may be tripping up on my ignorance of the
kernel. According to Linux Device Drivers 3, the DMA_TO/FROM_DEVICE
macros impact when the dma_map/unmap_single functions copy data and do
cache flushes to ensure cache coherency. DMA_TO_DEVICE tells
[EMAIL PROTECTED] wrote:
Yes, I understand the directions and what they apply to, that's obvious
from the macros themselves. What I don't understand is if it's safe, from
a kernel/cache standpoint, to pass to the function a src pointer coming
_from_ the device and a dest pointer that's going _
[EMAIL PROTECTED] wrote:
The hardware doesn't care (I'm using an MPC8347E), as far as the DMA
engine is concerned these are just addresses. All of this goes to cache
coherency. The map/unmap functions are supposed to ensure that data is
copied and caches flushed at the right times to ensure c
jay_chen wrote:
Thanks for your help.
Could you give some hints about how to "map your memory as
coherence-required"?
The M bit needs to be set in the BATs and PTEs. Current kernels do
this; I don't know about really old ones such as 2.6.14.
-Scott
_
Joaquin Luna wrote:
U-boot did not accept "ff80.flash" as the MTD ID and could not load
the kernel image with that in the command line.
Why would u-boot care what you pass to the Linux command line?
-Scott
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Joaquin Luna wrote:
I do not list any partitions in my dts file, though I tried and not seen
any change in the behavior. I have enabled the option in the kernel to
parse the partition information from the kernel command line, is there
something else I need to do to set up the mtdblockX devices
saadia dhouib wrote:
Device Tree Probing 'ethernet'
xilinx_emac 40c0.ethernet: no IRQ found.
This might be a problem.
root:~> ifconfig 172.25.49.123 netmask 255.255.255.0
ifconfig: SIOCSIFNETMASK: No such device
root:~> ### Application running ...
My question is: why I can't assign an
Jyotshna Cherukuri wrote:
Bytes transferred = 12288 (3000 hex)
=> bootm 40 - 80
## Booting image at 0040 ...
Image Name: Linux-2.6.25
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size:1624845 Bytes = 1.5 MB
Load Address:
Entry Point:
jay_chen wrote:
I am using 2.6.14.5 and MPC8349.
I got some DMA problems with PCI devices.
So, I tried to understand the DMA stuff of linux.
That's very old; have you tried the latest kernel?
I have one question about cache coherency.
In dma-mapping.h, I found some functions are defined as NU
wael showair wrote:
Dear all,
First here is the setup i've:
1. The board is SPTWIMAX-CC1E board
2. The processor is MPC8555 i found it in the powerpc family NOT ppc family.
Also the board contains DSP core.
3. Linux Kernel 2.6.19-rc5 running on the MPC8555 processor side.
That's rather old...
[EMAIL PROTECTED] wrote:
In the Cafe driver, Linux Device Drivers 3rd Edition, and DMA-mapping.txt
everyone talks about how to allocate buffers using
dma/pci_alloc_coherent(), but no one talks about how to actually use it.
I'm pretty sure (even in my ignorance) that just allocating a DMA cohere
Laxmikant Rashinkar wrote:
I have linux-2.6.27.1 running on a MPC8347 based board.
When my freescale I2C driver is insmoded, it calls
platform_driver_register() successfully, but the probe routine doesn't
get called.
Is "your" freescale I2C driver different from "the" freescale I2C driver
Joaquin Luna wrote:
I am having the same problem with badness at fs/sysfs/dir.c on the
MPC8313ERDB. More importantly my custom board based on this development
board will not boot past "loading device tree."
That's probably unrelated.
Are there any other
mismerges in this file?
Not that I
Mike Dyer wrote:
I believe the DMA is being added twice, because it occurs twice within the
mpc8313erdb.dts device tree. Once by itself, and once within a sleep-nexus.
Is that right / normal ?
No, that looks like a mismerge. There should only be the node under
sleep-nexus.
-Scott
___
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Felix Radensky wrote:
I run linux-2.6.26 on custom 460EX based board.
This platform has PCA9548 I2C mux on I2C bus 0.
I was wondering how can I describe the mux itself
and devices behind it (e.g RTC and temperature sensors)
in the device tree.
Describe
Gray, Steve - UK wrote:
I have tried a few things, including setting the range of muram to
ranges = <0x0 0x3000 0x1000>;
Am I correct to assume this will push the muram above the microcode??
No, that will confuse the kernel into thinking that muram starts at IMMR
offset 0x3000. You need to
On Fri, Oct 17, 2008 at 03:49:12PM +0530, Sreejith wrote:
> This is a peculiar Oops we are encountering during the running of our board
> (sh4) architecture
So why are you posting to powerpc lists?
> PC : 844240f8 SP : 88d1ff44 SR : 400080f0 TEA : c0169d64Tainted: P
With proprietary modul
On Tue, Oct 14, 2008 at 01:39:19PM +1100, Benjamin Herrenschmidt wrote:
> So again, let's start by having somebody pick up something that you
> believe is worth altivec-ifying, eat the preempt_disable/enable for now,
> and if we see that indeed, it's worth the pain, then we can look into
> adding a
Benjamin Herrenschmidt wrote:
It doesn't need to be done in non-preemptible sections, if you have a
separate per-thread save area for kernel fp/altivec use (and appropriate
flags so an FP unavailable handler knows which regs to restore), and you
can avoid using it in a preempting context.
Yuck.
On Sat, Oct 11, 2008 at 09:05:49PM -0500, Matt Sealey wrote:
> Benjamin Herrenschmidt wrote:
> >The reason where we require a -real-good- reason to do it is
> >simply because of the drawbacks. The cost of enabling altivec
> >in the kernel can be high (especially if the user is using it)
> >and it's
On Sun, Oct 12, 2008 at 09:32:07AM +1100, Benjamin Herrenschmidt wrote:
> On Wed, 2008-10-08 at 12:40 -0500, Scott Wood wrote:
> >
> > The performance difference most likely comes from the fact that copy
> > to/from user can assume that the memory is cacheable, while memcpy
Alemao wrote:
Here is an output from someone using it:
-
070500 U-Boot 1.1.2 (May 30 2007 - 20:20:09)
Motorola PowerPC
Board: GDA Technologies CSC-PP MPC8560 [PowerQUICC III]
CPU: 660 MHz
CCB: 330 MHz
DDR: 165 MHz
Creating 7 MTD partitions on "CSC flash":
0x00f8-0x0100 : "uboot"
0
Alemao wrote:
Hi all,
Im trying to use a physmap driver for NOR and NAND flash devices.
You can't use physmap with NAND.
ranges = <0 0 ff00 100 // nor flash, 16 MB
1 0 6000 400>; // nand flash, 64 MB
Is your NAND window really that large? I'm n
Duy-Ky Nguyen wrote:
release_region(ppc_base,PPC_SIZE);
release_region(lbc_base,PPC_SIZE);
This should be PPC_BASE/LBC_BASE (the physical address), not
ppc_base/lbc_base (the virtual address).
-Scott
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Dominik Bozek wrote:
I have done a test of memcpy() and __copy_tofrom_user() on the mpc8313.
And the major conclusion is that __copy_tofrom_user is more efficient
than memcpy. Sometimes about 40%.
If I good understand, the memcpy() just copy the data, while
__copy_tofrom_user() take care if the
Mike Ditto wrote:
I'm starting a scratch port of Linux 2.6 to an MPC8272 board that currently
runs 2.4 (MontaVista).
Documentation/powerpc/booting-without-of.txt says:
The name of an soc
node should start with "soc", and the remainder of the name should
represent the part number for
liran raz wrote:
hi,
I have a driver that uses the scc1 intertupts.
After enabling the scc1 interrupts I see this message
coming from the kernel for some time:
NOHZ: local_softirq_pending 08
1. What is the meaning of this message? does
2. Does it indicate that something is wrong & need a fix?
3.
Remi Lefevre wrote:
Errors encountered are "Underrun" errors (from bd).
Try elevating the arbiter priority for the FCC.
CPM clock-frequency is not defined in the DTS, neither filled by U-Boot,
but it doesn't seem to be needed, does it ?
Not for ethernet.
I'm a little confused, and find st
Remi Lefevre wrote:
[5.573391] fs_enet: eth0 FS_ENET ERROR(s) 0x12
This is a transmit error; more detail can be found in the buffer descriptor.
Check your pin and clock configuration.
-Scott
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CLK10, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_TX);
Acked-by: Scott Wood <[EMAIL PROTECTED]>
Post to [EMAIL PROTECTED] and [EMAIL PROTECTED] with a
Signed-off-by.
-Scott
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embedded wrote:
We've found a way to get ping to fail all of the time by increasing
the size of the ping messages. When we use the max in Windows of
65500, every ping to the first FCC1 Ethernet is dropped. However,
when we ping with a size of 65500 to the second FCC2 Ethernet
everything is fine
David Beamonte wrote:
I have debugged the kernel and what I can see is that, once the
processor tries to send a buffer of the USB controller, interrupts get
disabled. And so, there is no ethernet, serial port, or whatever way of
communication to the processor. With my debugger I can see that th
On Mon, Sep 22, 2008 at 05:37:24PM +0530, VenkataKrishna wrote:
> In our target board have two banks of flash device. Which is connected two
> Chip select 0(CS0) and Chip select 1 (CS1). In Hardware our target board has
> specialty jumper setting change CS0 VsCS1. Booting device always connected
On Fri, Sep 19, 2008 at 05:42:12PM +0530, VenkataKrishna wrote:
> I am working ELDK Kit 4.0 versions in Linux. My target Board is MPC8260
> processor. I generated linux uImage with linux-2.6-denx and is it need hard
> reset configuration words in linux. I don't find HRCW (Hard reset
> configuration
On Thu, Sep 18, 2008 at 08:50:33AM -0500, Exchange Admin wrote:
> quirk_usb_handoff_ohci: resource start = 0x8000, len = 0x1000
> quirk_usb_handoff_ohci: base = 0xe1056000, offset = 0x0004
> Machine check in kernel mode.
> Caused by (from SRR1=149030): Transfer error ack signal
> Oo
On Thu, Sep 18, 2008 at 09:49:34PM +0800, Michael.Kang wrote:
> And jump to __secondary_start -> call_setup_cpu, source code in
> call_setup_cpu as the following:
> 112 _GLOBAL(call_setup_cpu)
> 113 addis r4,r3,[EMAIL PROTECTED]
> 114 addir4,r4,[EMAIL PROTECTED]
> 115
Chris Skepper wrote:
Hi All,
I have an MPC8247 based board. I can get the SMC1 console working, but
the other SCCx serial ports and the FCC1 ethernet doesn't work.
It appears that a part of the problem is that the probe methods are not
called. The "match" table stuff all looks fine and the
Jeff Brower wrote:
What are the up-to-date APIs we should be using for DMA memory allocation and
virtual-to-physical address translation? We have another driver for another
device
that's working fine on this board and it uses pci_alloc_consistent(). What
about
bus_space_vaddr()? I'm hoping t
Russell McGuire wrote:
Putting together a driver, IMA for ATM in a MPC83xx. Anyway the manual
states that one of the data structures for the QE needs to be allocated on a
1MB boundary in external memory.
Normally these come in 128/64/32byte boundaries and are easy to self align,
with some bit lo
David Beamonte wrote:
This issue seems to be related to one problem that we have always had.
We can't configure buffers of SMCs, SCCs, etc, to be in SDRAM, because
the processor hangs. We always have to configure buffers in DPRAM. In
other drivers this has not been a problem, because the buffer
Laxmikant Rashinkar wrote:
I have a custom board running MPC8347 on Linux 2.6.27 with Uboot 1.1.4.
I also have a NAND device (Micron MT29F2G08AACWP) connected to the LBC
and controlled via UPM.
fsl_elbc_nand.ko, fsl_upm.ko are loaded.
fsl_elbc_nand is for FCM; you only need the latter.
I'm w
Chris Skepper wrote:
Thanks so much for your help so far. I was able to find out this
address from the bootloader and get some output on the early debug
console which was very pleasing. It now gets as far as console_init()
called from init/main.c, which completes but then any printk seems to
Muller, Ralf (NSN - FI/Espoo) wrote:
I'm using a 8247 custom board and kernl 2.6.21.7
I strongly recommend using something newer. There was a lot of 82xx
work going on around that time.
on the arch/powerpc
branch. Here the irq are virtualized in the irq map functions now I'm
facing sever
bhanu jampala wrote:
I am working on MCC HDLC controller on MCC8260. I have two important questions:
1. What is the range of DPRAM from which the cpm_dpalloc allocates memory?
How does the cpm_dpalloc work?
Assuming you're using arch/powerpc on a recent kernel version, it
allocates from t
On Wed, Aug 27, 2008 at 02:30:47PM +0100, Chris Skepper wrote:
> I just left CONFIG_PPC_EARLY_DEBUG_CPM_ADDR at the default value for CPM2?
> Is that likely to be correct for SMC1? (I tried looking in the MPC8272
> reference manual, but couldn't find it.)
The value depends on how the port was s
On Wed, Aug 27, 2008 at 02:30:47PM +0100, Chris Skepper wrote:
> Is it likely the port isn't set up properly? udbg_early_init and
> udbg_init_cpm get called before it probes the machine so there's been no
> chance to do cpm2_set_pin or anything.
For the early console to work, the pins must have
Chris Skepper wrote:
On Tue, 26 Aug 2008, Scott Wood wrote:
On Tue, Aug 26, 2008 at 01:00:05PM +0100, Chris Skepper wrote:
I'm triggering an LED which is connected to port A. Are you saying that
wouldn't work once the caching is enabled?
It's quite possible. What other r
On Tue, Aug 26, 2008 at 01:00:05PM +0100, Chris Skepper wrote:
> >How are you determining that it never gets to that point? If it's via
> >serial I/O or similar, be aware that I/O isn't going to work when caches
> >are enabled but the MMU is not.
>
> I'm triggering an LED which is connected to
Russell McGuire wrote:
So shouldn't we be using like dma_alloc_coherent, and then tracking the dma
address separately as a variable, and use it when necessary instead of
calling virt_to_phys()?
Yes. On 8xxx (but not 8xx, and not with 36-bit memory), there'll be no
practical difference, but th
roger blofeld wrote:
Hi
Since this bug is ATA specific, shouldn't this code be conditioned by
CONFIG_IDE ?
And then what happens if IDE is built as a module?
-Scott
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Laxmikant Rashinkar wrote:
When I attempt to boot my image it just hangs w/o any output. I dearly
wish I could get some console output.
Make sure you have /chosen/linux,stdout-path in your device tree. For
output from the kernel itself, make sure the serial clock-frequency is
correct.
1) t
Chris Skepper wrote:
Using code to flash an LED I have traced execution from the entry point
in head_32.S, through to call_setup_cpu in misc.S, __setup_cpu_603 and
into setup_common_caches in cpu_setup_6xx.S. It appears to reset when
enabling the cache on the CPU:
setup_common_caches:
mf
David Jander wrote:
4. Be sure that the device(s) necessary to produce output on your console are
correctly placed in the DT. Also make sure that u-boot knows about it
(#define OF_STDOUT_PATH... in your u-boot board config file)
OF_STDOUT_PATH is deprecated; you should enable
CONFIG_OF_SERIAL
On Tue, Aug 19, 2008 at 03:13:54PM +0400, Matvejchikov Ilya wrote:
> Hi all,
>
> The problem was in incorrect (not full) brg-node definition. Instead of
> [EMAIL PROTECTED] {
> compatible = "fsl,cpm-brg", "fsl,cpm2-brg";
> reg = <119f0 10 115f0 10>;
> };
> there must be:
> [EMAIL PROTECTE
On Fri, Aug 15, 2008 at 10:23:29AM -0400, liran raz wrote:
> [EMAIL PROTECTED] {
> compatible = "fsl,mpc8272-localbus",
>"fsl,pq2-localbus";
> #address-cells = <2>;
> #size-cells = <1>;
> reg = ;
>
> ranges = <0 0 fc00 0400>;
> };
>
> [EMAIL PROTECTED] {
- Reyneke wrote:
Anyone have any ideas, obvious suspects, or pointers where to go and look?
Check the kernel's idea of what the timebase frequency is on both kernels.
-Scott
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On Wed, Jul 30, 2008 at 01:37:43PM +0400, Matvejchikov Ilya wrote:
> smc1: [EMAIL PROTECTED] {
> device_type = "serial";
> compatible = "fsl,cpm2-smc-uart";
> reg = <11a80 20 0 40>;
>
On Tue, Jul 29, 2008 at 10:36:30PM +0400, Matvejchikov Ilya wrote:
> Have you tired to run 2.6.25 kernel? With 2.6.25.4 my console works
> fine! I suspect there is something like a regression
Did you use CONFIG_PPC_CPM_NEW_BINDING in 2.6.25? It became mandatory in
2.6.26. Also, try commentin
On Tue, Jul 29, 2008 at 11:33:47AM -0400, Ben Gardiner wrote:
> And my serial console output is stopping around the same point as
> Matvejchikov. I have baud 9600, so I'm guessing that it's cutoff because
> of this (please excuse me if this is wrong). NB: the console=ttyS0
> bootarg is there to
On Tue, Jul 29, 2008 at 08:47:00AM +, Fabien Oriede wrote:
> < 6 > cpm_uart : WARNING : no UART devices found on platorm bus! –
> < 6 > cpm_uart : the driver will guess configuration, but this mode is no
> longer supported. –
Enable CONFIG_PPC_CPM_NEW_BINDING (or better, upgrade to the late
Matvejchikov Ilya wrote:
[EMAIL PROTECTED] {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
Add "simple-bus" to this comp
Mike Timmons wrote:
Related question: I'm using a newer U-boot and managing the load of the
kernel and the device tree from separate partitions of my boot media.
Having the two partitions and managing the kernel and the tree
separately is a bit cumbersome, or maybe I'm just lazy. Regardless, can
On Mon, Jul 21, 2008 at 03:39:55PM -0500, Stephen Horton wrote:
> I have made great strides with help from this mailing list and its
> archives. I now have a compiled cuImage ready to boot from my older
> working u-boot 1.1.2. I now seem to be stuck at the kernel entry point.
> I'm not sure if I'm
On Tue, Jul 15, 2008 at 08:43:59PM -0700, Duy-Ky Nguyen wrote:
> Hi Dave,
>
> I've just tried it and it failed.
Could you elaborate on exactly what you tried? Did you pass the GPIO device
tree node?
> Before I had tried using the function
> int virq = of_irq_to_resource(GPIO_IRQ, 0, NULL);
> an
sumedh tirodkar wrote:
Can anyone give pointers as to how memory management(detailed) is done
in linux on powerpc.
arch/powerpc/mm
(Hey, you wanted a detailed answer to a very broad question...)
-Scott
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zhanglei459 wrote:
I guess which refer to host-pci bridge ATMU,is right?
Yes.
But how to descripe
added-on pci chip,whose BAR0 and BAR1 are IO spaces, BAR2 and BAR3 are MEM
spaces.
You don't need to -- this can be probed at run-time.
-Scott
__
Qin, Laigui (GE EntSol, Security) wrote:
I am facing a MMU related problem when porting Linux to my custom board
with Coldfire M5445x processor. The observation is that* the nand Bus
chip select/WE/RE become 100 times longer than normal when MMU enabled*.
I just can not understand this...
Col
Nidhi Dua wrote:
question 3: After we have set 'ethact' to TSEC1, the kernel is loaded,
and we have logged -in, when we try to ping the Host from target it says
'100% packet lost'. also we are unable to ping target from the host. Why
is it happening so?
U-boot does not support responding to p
Rune Torgersen wrote:
[EMAIL PROTECTED] wrote:
Mike Winter wrote:
We are developing with an 8248-based platform, and we have a vendor
telling us that the PCI hardware is unreliable on this CPU family, in
particular the DMA functionality. A quick search of this list
doesn't turn up any horror s
Mike Winter wrote:
We are developing with an 8248-based platform, and we have a vendor
telling us that the PCI hardware is unreliable on this CPU family, in
particular the DMA functionality. A quick search of this list doesn't
turn up any horror stories, although the processor does have some P
Florian Boelstler wrote:
Available system memory is only 384 MB (CAM0+CAM1+CAM2), which explains
why Linux "removed" the ramdisk, when it has been copied right below
508M by U-Boot. Because at that time I was using initrd_high @ 1FC0,
which is outside of mapped RAM.
Is there an option to
David Goodenough wrote:
This processor is described as an e300c2 core. I found that e300c2
is listed in the arch/powerpc/kernel/cputypes.c file. Does this mean
that it is supported, or is that just a place holder?
Yes, it is supported.
If it is supported (as a core) what about the periphera
Michael Galea wrote:
Hi All,
I'm building a dts for a custom 8360 based board. I'm looking at
the mpc8360_mds and mpc8360_rdk dts files, trying to figure out how the
UCCs (and all peripherals in general) got the values of their
"interrupts" properties chosen.
As someone else pointed out
On Thu, Jun 12, 2008 at 12:33:12PM +0200, David Jander wrote:
> On Wednesday 11 June 2008 20:19:17 Scott Wood wrote:
> > Please post patches to linuxppc-dev rather than linuxppc-embedded --
> > you'll get a larger reviewing audience.
>
> Ok, but I thought linuxppc-de
On Thu, Jun 12, 2008 at 08:54:27AM +0200, David Jander wrote:
> On Wednesday 11 June 2008 19:58:32 Scott Wood wrote:
> > > + //[EMAIL PROTECTED] {
> > > + // compatible = "mpc512x-axe";
> > > + // reg = <2000 100&g
Please post patches to linuxppc-dev rather than linuxppc-embedded --
you'll get a larger reviewing audience.
David Jander wrote:
+config FS_ENET_MPC5121_FEC
+ bool "Freescale MPC512x FEC driver"
+ depends on PPC_MPC512x
+ select FS_ENET
+ select FS_ENET_HAS_FEC
+ s
David Jander wrote:
arch/powerpc/platforms/512x/mpc5121_ads.c | 104 --
arch/powerpc/platforms/512x/mpc5121_generic.c | 105 ++
Pass -B -M -C to git-format-patch to detect renames, copies, etc.
+ [EMAIL PROTECTED] {
+ device_type = "rom";
+
On Wed, Jun 11, 2008 at 08:33:57AM -0700, vb wrote:
> my favorite was interrupt-map in PCI section: A typical value would
> look like this:
>
> interrupt-map = <
>
> /* IDSEL 0x10 */
> 08000 0 0 1 &mpic 0 1
>
Matvejchikov Ilya wrote:
Hi all!
There is a problem with 2.6.25.4 kernel on the pq2fads based board.
Works for me using cuImage.
## Booting kernel from Legacy Image at 0020 ...
Image Name: Linux-2.6.25.4
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size:
[EMAIL PROTECTED] wrote:
If we do our compiles on a G5 is it really a 'native' compile or is
it a cross-compile and we're back in the same boat as we were with
the x86? Should we use a G4 instead?
You can run 32-bit userspace on a G5 -- it's probably even the default
in most distributions.
Sanal Kumar V K wrote:
Now if I make the following entry in the linker script,
/* define L2 scratch here */
. = 0x9FC16800;
.l2_scratch : { *(.l2_scratch) }
it says "collect2: ld returned 1 exit status".
I'm guessing there was an earlier error message printed by ld?
You probably
On Thu, May 08, 2008 at 05:06:46PM +0530, Sanal Kumar V K wrote:
> A small part of the code needs to run from the on-chip "L2 scratch" for
> getting optimum performance. I would really appreciate if some could
> give me some pointers regarding the following questions:
>
> 1. Is #pragma section sup
Mike Timmons wrote:
If I'm not supposed to read the interrupt using config_read, should I
also not be writing to the host register on the coral P to clear the
interrupt?
Should I instead be using some PCI helper functions?
No, clearing interrupts is device-specific.
Have you verified that th
Mike Timmons wrote:
pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &irqnum).
Don't do this; use pci_dev->irq instead.
If that value doesn't work, check your interrupt-map in the pci node of
the device tree.
-Scott
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Linuxppc-embedded mailing
On Thu, Apr 24, 2008 at 09:52:25AM +0800, ??? wrote:
>Since our projects need more capability to store filesystems,I changed
> nand flash to 1G byte.
> I think it is the same to operate nand flash both in u-boot and linux
> kernel ,because the code about FCM nand flash control is almost t
On Wed, Apr 30, 2008 at 09:43:33AM +0100, Franca, Jose (NSN - PT/Portugal -
MiniMD) wrote:
> It't quite dificult to say if the problem exists without our
> changes, since the all software is dependent on this changes so
> to work with the hardware. I can't answer to that right no
On Tue, Apr 29, 2008 at 07:39:07PM +0100, Franca, Jose (NSN - PT/Portugal -
MiniMD) wrote:
> We are developing a MPC8247 based telecom board (512MB), using
> linux 2.4 with some proprietary changes on IP stack and we are facing
> some problems when we have heavy traffic on our Ethernet inter
On Wed, Apr 23, 2008 at 03:47:00PM +0800, ??? wrote:
> Dear all:
> Did anyone use mpc8379erdb board? I changed nand flash from samsung 32M
> to hynix 1G byte.And the 1G byte nand's erase block size is 256KB.
> Now the problem is: when I use " nand write.jffs2" command to write jffs2
> fi
On Tue, Apr 22, 2008 at 01:10:54PM +0800, 张世乐 wrote:
> Thank you, Doctor Scott. I'm very grateful to you for you kindly help.
>
> I'll try the way you suggested soon.
>
> And, my code for light the led run as follows:
>
> void set_led_a_red(void)
> {
> /*PDIRC: 0xfc010d40*/
> /*PPARC
On Mon, Apr 21, 2008 at 11:06:28AM +0800, 张世乐 wrote:
> Uncompressing Kernel Image ... OK
> Booting using the fdt at 0x60
>
> [nothing output and hanging here]
>
> I use the led on the board to trace the kernel fund it stop in the function
>
> setup_common_caches in arch/powerpc/kernel/cpu_s
Deepak Gaur wrote:
Hi all,
While booting MVL linux
Have you talked to MV support? For community support, it's best to use
the latest upstream sources (and arch/powerpc, not arch/ppc).
BTW, it's generally bad form to post the same question repeatedly. If
you have new information regarding
郭劲 wrote:
Hi,all,
I run the iperf tool to test the ethernet throughput for my MPC8360E board,
after
about 20 minutes, the exception is happened. Could you tell me why?
Unable to handle kernel paging request for instruction fetch
Faulting instruction address: 0x4e800020
Oops: Kernel access o
Steve Heflin wrote:
After that, I was able to see that it was the "setup_hose" function
called from /arch/ppc/platforms/4xx/sequoia.c that caused my board to
hang. This Sequoia spinoff board has the PCI Host Bridge disabled which
I didn't realize until that point.
Looking back at the powerpc
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