usx95 wrote:
> Do we want to have some built-in handling for overloaded operators as well?
> It could be a follow-up PR though.
Added some more tests for overloaded operators. I think they used to work
before through CallExpr handling.
> I suspect that this PR might not address the case when
https://github.com/vikramRH updated
https://github.com/llvm/llvm-project/pull/168833
>From 6df1350b6a4952d16e9f2917f160d51013d1feb0 Mon Sep 17 00:00:00 2001
From: vikhegde
Date: Thu, 20 Nov 2025 11:18:25 +0530
Subject: [PATCH 1/2] [AMDGPU] Make SIShrinkInstructions pass return valid
changed st
https://github.com/vikramRH updated
https://github.com/llvm/llvm-project/pull/168832
>From b560cd70a2eb9f86f160c468f27b238cd00fe53e Mon Sep 17 00:00:00 2001
From: vikhegde
Date: Tue, 18 Nov 2025 11:13:37 +0530
Subject: [PATCH] [NPM] Schedule PhysicalRegisterUsageAnalysis before
RegUsageInfoCol
https://github.com/vikramRH updated
https://github.com/llvm/llvm-project/pull/168832
>From b560cd70a2eb9f86f160c468f27b238cd00fe53e Mon Sep 17 00:00:00 2001
From: vikhegde
Date: Tue, 18 Nov 2025 11:13:37 +0530
Subject: [PATCH] [NPM] Schedule PhysicalRegisterUsageAnalysis before
RegUsageInfoCol
https://github.com/vikramRH updated
https://github.com/llvm/llvm-project/pull/168833
>From 6df1350b6a4952d16e9f2917f160d51013d1feb0 Mon Sep 17 00:00:00 2001
From: vikhegde
Date: Thu, 20 Nov 2025 11:18:25 +0530
Subject: [PATCH 1/2] [AMDGPU] Make SIShrinkInstructions pass return valid
changed st
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Alexander Richardson (arichardson)
Changes
After the latest change to tablegen, we now handle `RegClassByHwMode`
correctly in the alias pattern output of -gen-asm-writer, so we can
enable it for AMDGPU. Previously, `#define PRINT_A
arichardson wrote:
Depends on https://github.com/llvm/llvm-project/pull/171264
https://github.com/llvm/llvm-project/pull/171265
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https://github.com/arichardson converted_to_draft
https://github.com/llvm/llvm-project/pull/171265
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https://github.com/arichardson created
https://github.com/llvm/llvm-project/pull/171265
After the latest change to tablegen, we now handle `RegClassByHwMode`
correctly in the alias pattern output of -gen-asm-writer, so we can
enable it for AMDGPU. Previously, `#define PRINT_ALIAS_INSTR` caused
c
https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/171254
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https://github.com/llvm/llvm-project/pull/171254
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llvmbot wrote:
@llvm/pr-subscribers-backend-aarch64
Author: Mircea Trofin (mtrofin)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/171256.diff
1 Files Affected:
- (modified)
llvm/test/CodeGen/AArch64/arm64-homogeneous-prolog-epilog-tail-call.mir (-1)
``di
https://github.com/mtrofin ready_for_review
https://github.com/llvm/llvm-project/pull/171256
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mtrofin wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.com/github/pr/llvm/llvm-project/171256?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/mtrofin created
https://github.com/llvm/llvm-project/pull/171256
None
>From 0944643fbff0c1051110e7fe81760755afb744d0 Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Mon, 8 Dec 2025 20:49:21 -0800
Subject: [PATCH] Remove cleanup of incorrect output in test dir
---
.../AA
llvmbot wrote:
@llvm/pr-subscribers-tablegen
Author: Alexander Richardson (arichardson)
Changes
Previously we would assert when a ValueTypeByHwMode was missing a case
for the current mode, now we report an error instead. Interestingly this
error only ocurrs when the DAG patterns use RegCla
https://github.com/arichardson created
https://github.com/llvm/llvm-project/pull/171254
Previously we would assert when a ValueTypeByHwMode was missing a case
for the current mode, now we report an error instead. Interestingly this
error only ocurrs when the DAG patterns use RegClassByHwMode, bu
jrtc27 wrote:
It's currently based on https://github.com/llvm/llvm-project/pull/171180, as
that's the order I happened to develop them in. Some of this could be
reordered, subject to resolving conflicts properly.
https://github.com/llvm/llvm-project/pull/171181
wenju-he wrote:
> Does that actually need to be backported? It seems to be a new feature and
> Clang 22 will release in a couple of months. Thanks!
@cor3ntin thanks for the suggestion.
Our (Intel) GPU compiler team would appreciate that this PR can at least land
on the latest already released
https://github.com/fmayer ready_for_review
https://github.com/llvm/llvm-project/pull/171188
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https://github.com/fmayer edited
https://github.com/llvm/llvm-project/pull/171188
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https://github.com/fmayer updated
https://github.com/llvm/llvm-project/pull/171188
>From 3a7705624359678edaed5c7b9686cae034cb4bfd Mon Sep 17 00:00:00 2001
From: Florian Mayer
Date: Mon, 8 Dec 2025 13:10:30 -0800
Subject: [PATCH 1/2] change
Created using spr 1.3.7
---
.../clang-tidy/abseil/Unc
https://github.com/fmayer approved this pull request.
https://github.com/llvm/llvm-project/pull/170944
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brad0 wrote:
@efriedma-quic Ping.
https://github.com/llvm/llvm-project/pull/170580
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@@ -0,0 +1,122 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200
-amdgpu-enable-machine-level-inliner < %s | FileCheck %s
+
+declare !callback !0 i32 @llvm.amdgcn.call.whole.w
https://github.com/nhaehnle updated
https://github.com/llvm/llvm-project/pull/168820
From 2ee921f4d07bd5b457d5e79a848ab6183c3a8c52 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?=
Date: Wed, 19 Nov 2025 18:00:32 -0800
Subject: [PATCH] VectorCombine: Improve the insert/extract fo
https://github.com/nhaehnle updated
https://github.com/llvm/llvm-project/pull/168820
From 2ee921f4d07bd5b457d5e79a848ab6183c3a8c52 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?=
Date: Wed, 19 Nov 2025 18:00:32 -0800
Subject: [PATCH] VectorCombine: Improve the insert/extract fo
https://github.com/nhaehnle updated
https://github.com/llvm/llvm-project/pull/168820
From 2ee921f4d07bd5b457d5e79a848ab6183c3a8c52 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?=
Date: Wed, 19 Nov 2025 18:00:32 -0800
Subject: [PATCH] VectorCombine: Improve the insert/extract fo
https://github.com/nhaehnle updated
https://github.com/llvm/llvm-project/pull/168819
From 316715e02c8ebdc5014f5666e62738d0367c853d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?=
Date: Wed, 19 Nov 2025 17:59:11 -0800
Subject: [PATCH] VectorCombine: Fold chains of shuffles fed b
https://github.com/nhaehnle updated
https://github.com/llvm/llvm-project/pull/168819
From 316715e02c8ebdc5014f5666e62738d0367c853d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?=
Date: Wed, 19 Nov 2025 17:59:11 -0800
Subject: [PATCH] VectorCombine: Fold chains of shuffles fed b
https://github.com/nhaehnle updated
https://github.com/llvm/llvm-project/pull/168819
From 316715e02c8ebdc5014f5666e62738d0367c853d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?=
Date: Wed, 19 Nov 2025 17:59:11 -0800
Subject: [PATCH] VectorCombine: Fold chains of shuffles fed b
@@ -704,8 +704,10 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase
&isec,
uint64_t offsetInSec, Symbol &sym, int64_t addend,
RelExpr expr, RelType type) {
Partition &part = isec.getPartition(ctx);
+ bool is
https://github.com/jrtc27 edited
https://github.com/llvm/llvm-project/pull/171181
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https://github.com/jrtc27 edited
https://github.com/llvm/llvm-project/pull/171182
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https://github.com/jrtc27 edited
https://github.com/llvm/llvm-project/pull/171179
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https://github.com/jrtc27 edited
https://github.com/llvm/llvm-project/pull/171180
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https://github.com/jrtc27 edited
https://github.com/llvm/llvm-project/pull/171192
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andykaylor wrote:
> What do you mean by CIRGenModule changes? I just added missing feature test,
> as `setWindowsItaniumDLLImport` is unconditionally invoked on the path for
> personality function generation, but it is still not supported.
Yeah, sorry for the confusion. I didn't notice that wa
ojhunt wrote:
> `std::trivially_relocate` and friends have been removed from C++26. and the
> new equivalent of `std::trivially_relocate` in C++29 is very likely to be
> based on `memcpy` or `memmov` . I am not sure how PFP can work with the
> future `std::trivially_relocate` at all to be hone
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Jessica Clarke (jrtc27)
Changes
Other than the ordering requirements that remain between sections, this
abstracts the details of how these sections are implemented.
Note that isNeeded already checks relocsVec for both section types, so
final
llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: Jessica Clarke (jrtc27)
Changes
Other than the ordering requirements that remain between sections, this
abstracts the details of how these sections are implemented.
Note that isNeeded already checks relocsVec for both section types, so
f
https://github.com/jrtc27 created
https://github.com/llvm/llvm-project/pull/171203
Other than the ordering requirements that remain between sections, this
abstracts the details of how these sections are implemented.
Note that isNeeded already checks relocsVec for both section types, so
finalize
https://github.com/jvoung approved this pull request.
https://github.com/llvm/llvm-project/pull/170942
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@@ -585,7 +585,7 @@ struct RelativeReloc {
return inputSec->getVA(inputSec->relocs()[relocIdx].offset);
}
- const InputSectionBase *inputSec;
+ InputSectionBase *inputSec;
jrtc27 wrote:
Could const_cast instead in finalizeAddressDependentContent, whic
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Jessica Clarke (jrtc27)
Changes
Rather than trying to infer deep down in AArch64::relocate whether we
need to actually write anything or not, we should instead mark the
relocations that we no longer want so we don't actually apply them. This
llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: Jessica Clarke (jrtc27)
Changes
Rather than trying to infer deep down in AArch64::relocate whether we
need to actually write anything or not, we should instead mark the
relocations that we no longer want so we don't actually apply them. T
https://github.com/cmc-rep edited
https://github.com/llvm/llvm-project/pull/169476
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https://github.com/jrtc27 created
https://github.com/llvm/llvm-project/pull/171192
Rather than trying to infer deep down in AArch64::relocate whether we
need to actually write anything or not, we should instead mark the
relocations that we no longer want so we don't actually apply them. This
is
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/171166
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https://github.com/jvoung approved this pull request.
Nice catch!
https://github.com/llvm/llvm-project/pull/170954
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https://github.com/jvoung approved this pull request.
https://github.com/llvm/llvm-project/pull/170943
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@@ -0,0 +1,425 @@
+//===-- AMDGPUMachineLevelInliner.cpp - AMDGPU Machine Level Inliner ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apach
@@ -0,0 +1,59 @@
+//===-- AMDGPUMachineLevelInliner.h - AMDGPU Machine Level Inliner -*- C++
+//-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier
https://github.com/jhuber6 approved this pull request.
https://github.com/llvm/llvm-project/pull/171186
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llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Matt Arsenault (arsenm)
Changes
We have special case handling for the logb builtins, so use them.
---
Full diff: https://github.com/llvm/llvm-project/pull/171186.diff
2 Files Affected:
- (modified) clang/lib/Headers/__clang_hip_math.h (
llvmbot wrote:
@llvm/pr-subscribers-backend-x86
Author: Matt Arsenault (arsenm)
Changes
We have special case handling for the logb builtins, so use them.
---
Full diff: https://github.com/llvm/llvm-project/pull/171186.diff
2 Files Affected:
- (modified) clang/lib/Headers/__clang_hip_ma
https://github.com/arsenm ready_for_review
https://github.com/llvm/llvm-project/pull/171186
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arsenm wrote:
> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is
> open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.com/github/pr/llvm/llvm-project/171186?utm_source=stack-comment-downstack-mergeability-warning";
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/171186
We have special case handling for the logb builtins, so use them.
>From 46c34ddcc57617d4c42839aedd53a96a18853581 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 8 Dec 2025 16:04:44 +0100
Subject: [PATCH
llvmbot wrote:
@llvm/pr-subscribers-backend-webassembly
Author: None (llvmbot)
Changes
Backport e5b2a06546eb20662156b8a59b77aca086301486
Requested by: @dschuff
---
Full diff: https://github.com/llvm/llvm-project/pull/171184.diff
3 Files Affected:
- (modified) llvm/lib/Target/WebAssemb
llvmbot wrote:
@dschuff What do you think about merging this PR to the release branch?
https://github.com/llvm/llvm-project/pull/171184
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@@ -741,7 +741,7 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase
&isec,
//
https://github.com/ARM-software/abi-aa/blob/main/memtagabielf64/memtagabielf64.rst#841extended-semantics-of-r_aarch64_relative
if (sym.isTagged() && !isAArch64Auth &&
(addend < 0 |
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/171184
Backport e5b2a06546eb20662156b8a59b77aca086301486
Requested by: @dschuff
>From 3c97f983e2a9b3fe1c8c9472bc40e05301f30179 Mon Sep 17 00:00:00 2001
From: Heejin Ahn
Date: Thu, 25 Sep 2025 14:49:25 -0700
Subject:
https://github.com/llvmbot milestoned
https://github.com/llvm/llvm-project/pull/171184
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@@ -741,7 +741,7 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase
&isec,
//
https://github.com/ARM-software/abi-aa/blob/main/memtagabielf64/memtagabielf64.rst#841extended-semantics-of-r_aarch64_relative
if (sym.isTagged() && !isAArch64Auth &&
(addend < 0 |
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/170752
>From ea48cf14b27d5ec6d0cbe02aaa6f10f5fa9299d0 Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Thu, 4 Dec 2025 13:48:43 -0800
Subject: [PATCH] [LTT] Add `unknown` branch weights when lowering type tests
with
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/170752
>From ea48cf14b27d5ec6d0cbe02aaa6f10f5fa9299d0 Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Thu, 4 Dec 2025 13:48:43 -0800
Subject: [PATCH] [LTT] Add `unknown` branch weights when lowering type tests
with
@@ -704,8 +704,10 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase
&isec,
uint64_t offsetInSec, Symbol &sym, int64_t addend,
RelExpr expr, RelType type) {
Partition &part = isec.getPartition(ctx);
+ bool is
@@ -185,6 +185,18 @@ const EHPersonality &EHPersonality::get(CIRGenFunction
&cgf) {
return get(cgf.cgm, dyn_cast_or_null(fg));
}
+static llvm::StringRef getPersonalityFn(CIRGenModule &cgm,
+const EHPersonality &personality) {
+ // Cr
https://github.com/andykaylor approved this pull request.
This looks good except that the CIRGenModule and CIRGenException changes are
not tested.
https://github.com/llvm/llvm-project/pull/171001
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https://github.com/andykaylor edited
https://github.com/llvm/llvm-project/pull/171001
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llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: Jessica Clarke (jrtc27)
Changes
The current implementation in addRelativeReloc makes it look like we're
writing the symbol's VA + addend to the section, because that's what the
given relocation will evaluate to, but we're supposed to be w
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Jessica Clarke (jrtc27)
Changes
The current implementation in addRelativeReloc makes it look like we're
writing the symbol's VA + addend to the section, because that's what the
given relocation will evaluate to, but we're supposed to be writi
llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: Jessica Clarke (jrtc27)
Changes
This call to addRelativeReloc is the same as the one at the end of the
function, so skip the relrDyn code for this case and add the special
out-of-bounds handling code to the end of the function. This makes
llvmbot wrote:
@llvm/pr-subscribers-lld
@llvm/pr-subscribers-lld-elf
Author: Jessica Clarke (jrtc27)
Changes
This allows R_AARCH64_AUTH_ABS64 to follow R_AARCH64_ABS64's flow rather
than being implemented in the side in the place that is normally for
symbolic relocations.
Note that this h
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Jessica Clarke (jrtc27)
Changes
This makes addRelativeReloc a bit more readable and uniform, as well as
the relrAuthDyn call in RelocScan::process.
---
Full diff: https://github.com/llvm/llvm-project/pull/171178.diff
2 Files Affected:
-
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Jessica Clarke (jrtc27)
Changes
The only difference between these calls is whether rel or type is passed
as the first argument, but AArch64::getDynRel returns type unchanged for
R_AARCH64_AUTH_ABS64, so they are the same.
---
Full diff: htt
llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: Jessica Clarke (jrtc27)
Changes
The only difference between these calls is whether rel or type is passed
as the first argument, but AArch64::getDynRel returns type unchanged for
R_AARCH64_AUTH_ABS64, so they are the same.
---
Full diff:
llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: Jessica Clarke (jrtc27)
Changes
This makes addRelativeReloc a bit more readable and uniform, as well as
the relrAuthDyn call in RelocScan::process.
---
Full diff: https://github.com/llvm/llvm-project/pull/171178.diff
2 Files Affected:
llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: Jessica Clarke (jrtc27)
Changes
This is just a copy of InputSectionBase::addReloc, so we can just
forward to that rathe than poking into the internals. Whilst here, move
the implementation to the header so it can be inlined.
---
Full di
llvmbot wrote:
@llvm/pr-subscribers-lld
Author: Jessica Clarke (jrtc27)
Changes
This is just a copy of InputSectionBase::addReloc, so we can just
forward to that rathe than poking into the internals. Whilst here, move
the implementation to the header so it can be inlined.
---
Full diff:
https://github.com/jrtc27 created
https://github.com/llvm/llvm-project/pull/171182
The current implementation in addRelativeReloc makes it look like we're
writing the symbol's VA + addend to the section, because that's what the
given relocation will evaluate to, but we're supposed to be writing
https://github.com/jrtc27 created
https://github.com/llvm/llvm-project/pull/171181
This call to addRelativeReloc is the same as the one at the end of the
function, so skip the relrDyn code for this case and add the special
out-of-bounds handling code to the end of the function. This makes it
obv
https://github.com/jrtc27 created
https://github.com/llvm/llvm-project/pull/171180
This allows R_AARCH64_AUTH_ABS64 to follow R_AARCH64_ABS64's flow rather
than being implemented in the side in the place that is normally for
symbolic relocations.
Note that this has one implementation change: th
https://github.com/jrtc27 created
https://github.com/llvm/llvm-project/pull/171179
The only difference between these calls is whether rel or type is passed
as the first argument, but AArch64::getDynRel returns type unchanged for
R_AARCH64_AUTH_ABS64, so they are the same.
https://github.com/jrtc27 created
https://github.com/llvm/llvm-project/pull/171178
This makes addRelativeReloc a bit more readable and uniform, as well as
the relrAuthDyn call in RelocScan::process.
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https://github.com/jrtc27 created
https://github.com/llvm/llvm-project/pull/171177
This is just a copy of InputSectionBase::addReloc, so we can just
forward to that rathe than poking into the internals. Whilst here, move
the implementation to the header so it can be inlined.
_
https://github.com/cmc-rep edited
https://github.com/llvm/llvm-project/pull/169476
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https://github.com/cmc-rep edited
https://github.com/llvm/llvm-project/pull/169476
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@@ -0,0 +1,262 @@
+//===-- AMDGPUMachineLevelInliner.cpp - AMDGPU Machine Level Inliner ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apach
@@ -0,0 +1,262 @@
+//===-- AMDGPUMachineLevelInliner.cpp - AMDGPU Machine Level Inliner ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apach
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Mirko Brkušanin (mbrkusanin)
Changes
Use new scoped enums with type set to uint8_t.
---
Patch is 22.40 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/171166.diff
12 Files Affected:
https://github.com/vonosmas closed
https://github.com/llvm/llvm-project/pull/170959
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vonosmas wrote:
> I very much think this is the wrong direction. Using span / string_view style
> types rather than raw pointer / size pairs is something I really think we
> should aspire to stick to and move more outlier code towards.
> `cpp::string_view` is a polyfill for `std::string_view`,
https://github.com/mbrkusanin created
https://github.com/llvm/llvm-project/pull/171166
Use new scoped enums with type set to uint8_t.
From 46da7be139d82c2271688faaa5cb8364be91f930 Mon Sep 17 00:00:00 2001
From: Mirko Brkusanin
Date: Mon, 8 Dec 2025 18:05:45 +0100
Subject: [PATCH] [AMDGPU] Use
https://github.com/mbrkusanin updated
https://github.com/llvm/llvm-project/pull/170904
From 882c6ec5c217e4a29963ba735a7068b28d92bf96 Mon Sep 17 00:00:00 2001
From: Mirko Brkusanin
Date: Fri, 5 Dec 2025 19:21:27 +0100
Subject: [PATCH 1/2] [AMDGPU] Use different name scope for MIMGBaseOpcode
Def
@@ -71,6 +71,88 @@ bool implicitObjectParamIsLifetimeBound(const FunctionDecl
*FD) {
return isNormalAssignmentOperator(FD);
}
+// Decl::isInStdNamespace will return false for iterators in some STL
ymand wrote:
nit: maybe preface with "This function is need
@@ -71,6 +71,88 @@ bool implicitObjectParamIsLifetimeBound(const FunctionDecl
*FD) {
return isNormalAssignmentOperator(FD);
}
+// Decl::isInStdNamespace will return false for iterators in some STL
+// implementations due to them being defined in a namespace outside of the s
https://github.com/ymand approved this pull request.
https://github.com/llvm/llvm-project/pull/170005
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