[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-23 Thread David Peixotto via llvm-branch-commits
@@ -0,0 +1,53 @@ +; RUN: opt -S -dxil-op-lower %s | FileCheck %s + +target triple = "dxil-pc-shadermodel6.0-compute" + +declare i32 @some_val(); + +define void @test_buffers() { + ; RWBuffer Buf : register(u5, space3) + %typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0,

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-23 Thread David Peixotto via llvm-branch-commits
https://github.com/dmpots edited https://github.com/llvm/llvm-project/pull/104251 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-23 Thread David Peixotto via llvm-branch-commits
https://github.com/dmpots approved this pull request. Overall, LGTM! https://github.com/llvm/llvm-project/pull/104251 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-co

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-23 Thread David Peixotto via llvm-branch-commits
@@ -0,0 +1,58 @@ +; RUN: opt -S -dxil-op-lower %s | FileCheck %s + +target triple = "dxil-pc-shadermodel6.6-compute" + +declare i32 @some_val(); + +define void @test_bindings() { + ; RWBuffer Buf : register(u5, space3) + %typed0 = call target("dx.TypedBuffer", <4 x float>, 1, 0,

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-23 Thread David Peixotto via llvm-branch-commits
@@ -119,6 +123,142 @@ class OpLowerer { }); } + /// Create a cast between a `target("dx")` type and `dx.types.Handle`, which + /// is intended to be removed by the end of lowering. This is used to allow + /// lowering of ops which need to change their return or argume

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-21 Thread David Peixotto via llvm-branch-commits
@@ -119,6 +123,119 @@ class OpLowerer { }); } + Value *createTmpHandleCast(Value *V, Type *Ty) { +Function *CastFn = Intrinsic::getDeclaration(&M, Intrinsic::dx_cast_handle, + {Ty, V->getType()}); +CallInst *Cast =

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-21 Thread David Peixotto via llvm-branch-commits
@@ -119,6 +123,119 @@ class OpLowerer { }); } + Value *createTmpHandleCast(Value *V, Type *Ty) { +Function *CastFn = Intrinsic::getDeclaration(&M, Intrinsic::dx_cast_handle, + {Ty, V->getType()}); +CallInst *Cast =

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-21 Thread David Peixotto via llvm-branch-commits
@@ -0,0 +1,61 @@ +; RUN: opt -S -dxil-op-lower %s | FileCheck %s dmpots wrote: I don't see tests for either 1. Unbounded resource arrays 2. Non-constant index into resource arrays I think it would be good to have tests for these. https://github.com/llvm/llvm-p

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-21 Thread David Peixotto via llvm-branch-commits
@@ -119,6 +123,119 @@ class OpLowerer { }); } + Value *createTmpHandleCast(Value *V, Type *Ty) { +Function *CastFn = Intrinsic::getDeclaration(&M, Intrinsic::dx_cast_handle, + {Ty, V->getType()}); +CallInst *Cast =

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-21 Thread David Peixotto via llvm-branch-commits
@@ -683,6 +685,14 @@ def Dot4 : DXILOp<56, dot4> { let attributes = [Attributes]; } +def CreateHandle : DXILOp<57, createHandle> { + let Doc = "creates the handle to a resource"; + // ResourceClass, RangeID, Index, NonUniform + let arguments = [Int8Ty, Int32Ty, Int32Ty,

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.handle.fromBinding` to DXIL ops (PR #104251)

2024-08-21 Thread David Peixotto via llvm-branch-commits
@@ -119,6 +123,119 @@ class OpLowerer { }); } + Value *createTmpHandleCast(Value *V, Type *Ty) { +Function *CastFn = Intrinsic::getDeclaration(&M, Intrinsic::dx_cast_handle, + {Ty, V->getType()}); +CallInst *Cast =

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)

2024-08-20 Thread David Peixotto via llvm-branch-commits
@@ -0,0 +1,102 @@ +; RUN: opt -S -dxil-op-lower %s | FileCheck %s + +target triple = "dxil-pc-shadermodel6.6-compute" + +declare void @scalar_user(float) +declare void @vector_user(<4 x float>) + +define void @loadfloats() { + ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)

2024-08-20 Thread David Peixotto via llvm-branch-commits
@@ -236,6 +236,59 @@ class OpLowerer { lowerToBindAndAnnotateHandle(F); } + void lowerTypedBufferLoad(Function &F) { +IRBuilder<> &IRB = OpBuilder.getIRB(); +Type *Int32Ty = IRB.getInt32Ty(); + +replaceFunction(F, [&](CallInst *CI) -> Error { + IRB.Se

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)

2024-08-20 Thread David Peixotto via llvm-branch-commits
@@ -0,0 +1,102 @@ +; RUN: opt -S -dxil-op-lower %s | FileCheck %s + +target triple = "dxil-pc-shadermodel6.6-compute" + +declare void @scalar_user(float) +declare void @vector_user(<4 x float>) + +define void @loadfloats() { + ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)

2024-08-20 Thread David Peixotto via llvm-branch-commits
@@ -0,0 +1,102 @@ +; RUN: opt -S -dxil-op-lower %s | FileCheck %s + +target triple = "dxil-pc-shadermodel6.6-compute" + +declare void @scalar_user(float) +declare void @vector_user(<4 x float>) + +define void @loadfloats() { + ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)

2024-08-20 Thread David Peixotto via llvm-branch-commits
@@ -0,0 +1,102 @@ +; RUN: opt -S -dxil-op-lower %s | FileCheck %s + +target triple = "dxil-pc-shadermodel6.6-compute" + +declare void @scalar_user(float) +declare void @vector_user(<4 x float>) + +define void @loadfloats() { + ; CHECK: [[BIND:%.*]] = call %dx.types.Handle @dx.op.

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)

2024-08-20 Thread David Peixotto via llvm-branch-commits
@@ -683,6 +686,17 @@ def CreateHandle : DXILOp<57, createHandle> { let stages = [Stages]; } +def BufferLoad : DXILOp<68, bufferLoad> { + let Doc = "reads from a TypedBuffer"; + // Handle, Coord0, Coord1 + let arguments = [HandleTy, Int32Ty, Int32Ty]; + let result = Overl

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)

2024-08-20 Thread David Peixotto via llvm-branch-commits
https://github.com/dmpots edited https://github.com/llvm/llvm-project/pull/104252 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [DirectX] Lower `@llvm.dx.typedBufferLoad` to DXIL ops (PR #104252)

2024-08-20 Thread David Peixotto via llvm-branch-commits
https://github.com/dmpots approved this pull request. Overall, LGTM https://github.com/llvm/llvm-project/pull/104252 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-com

[llvm-branch-commits] [clang] [llvm] [HLSL] Define RasterizerOrderedBuffer resource (PR #74897)

2023-12-08 Thread David Peixotto via llvm-branch-commits
@@ -0,0 +1,20 @@ +// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s dmpots wrote: I think this is fine for testing this change, but ROVs are not allowed to be used in CS (only PS). This sha

[llvm-branch-commits] [clang] [llvm] [HLSL] Define RasterizerOrderedBuffer resource (PR #74897)

2023-12-08 Thread David Peixotto via llvm-branch-commits
https://github.com/dmpots edited https://github.com/llvm/llvm-project/pull/74897 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [llvm] [HLSL] Define RasterizerOrderedBuffer resource (PR #74897)

2023-12-08 Thread David Peixotto via llvm-branch-commits
https://github.com/dmpots approved this pull request. With a description and comment in the test it otherwise LGTM. https://github.com/llvm/llvm-project/pull/74897 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.ll

[llvm-branch-commits] [clang] [llvm] [HLSL] Define RasterizerOrderedBuffer resource (PR #74897)

2023-12-08 Thread David Peixotto via llvm-branch-commits
dmpots wrote: This PR seems to be missing a description. https://github.com/llvm/llvm-project/pull/74897 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] [HLSL] Add helpers to simplify HLSL resource type declarations. NFC (PR #73967)

2023-11-30 Thread David Peixotto via llvm-branch-commits
https://github.com/dmpots approved this pull request. https://github.com/llvm/llvm-project/pull/73967 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits