Mesa (master): freedreno/a5xx/gmem: move ZS restore tiling hack

Module: Mesa Branch: master Commit: 010ebed72aa82f930067bd49e4cc12469cc4eb6a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=010ebed72aa82f930067bd49e4cc12469cc4eb6a Author: Rob Clark Date: Fri Nov 17 11:12:45 2017 -0500 freedreno/a5xx/gmem: move ZS restore tiling hack Code motion t

Mesa (master): freedreno/a5xx/gmem: fix z32/s8 restore/resolve

Module: Mesa Branch: master Commit: a39d4032029f220ba5349d398a90f60ba358dca0 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a39d4032029f220ba5349d398a90f60ba358dca0 Author: Rob Clark Date: Fri Nov 17 11:14:55 2017 -0500 freedreno/a5xx/gmem: fix z32/s8 restore/resolve BLIT_ZS mode i

Mesa (master): freedreno: update generated headers

Module: Mesa Branch: master Commit: 22605dce4b0719642f52ccf9fed895b25595463e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=22605dce4b0719642f52ccf9fed895b25595463e Author: Rob Clark Date: Thu Nov 16 15:31:29 2017 -0500 freedreno: update generated headers --- src/gallium/drivers/

Mesa (master): freedreno/a5xx: stencil texturing support

Module: Mesa Branch: master Commit: c267750bb14f67126bd2a0caa9ec7bb3156d061e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c267750bb14f67126bd2a0caa9ec7bb3156d061e Author: Rob Clark Date: Fri Nov 17 11:18:39 2017 -0500 freedreno/a5xx: stencil texturing support Signed-off-by: Rob C

Mesa (master): 27 new commits

URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b50eda849805c51f83d57402e7d5e90fad7fe085 Author: Gert Wollny Date: Thu Nov 16 16:10:01 2017 +0100 gallium/aux/util/u_surface.c: Silence warnings and remove unneeded MAYBE_UNUSED * Explicitely convert values to int in compa

Mesa (master): winsys/amdgpu: add vcn enc cs support

Module: Mesa Branch: master Commit: c445cdf649da7fb9c6f463e4c24d2dc25bc5d2bf URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c445cdf649da7fb9c6f463e4c24d2dc25bc5d2bf Author: Boyuan Zhang Date: Wed Nov 8 11:05:36 2017 -0500 winsys/amdgpu: add vcn enc cs support New cs support is nee

Mesa (master): vl: add poc type

Module: Mesa Branch: master Commit: 76e0dcd5a98801e0bbf84f0c53509d4b2f4bbe9e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=76e0dcd5a98801e0bbf84f0c53509d4b2f4bbe9e Author: Boyuan Zhang Date: Tue Nov 7 15:46:43 2017 -0500 vl: add poc type Different from vce encoding, vcn encoding

Mesa (master): radeon/vcn: add encode begin frame

Module: Mesa Branch: master Commit: f40fe728a1fb077cf288661af7892056c7fd0169 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f40fe728a1fb077cf288661af7892056c7fd0169 Author: Boyuan Zhang Date: Tue Nov 7 16:19:22 2017 -0500 radeon/vcn: add encode begin frame Add implementation for b

Mesa (master): radeon/vcn: add encode destroy

Module: Mesa Branch: master Commit: bc9644460df595788b1784a84dbe4fa33b17668d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc9644460df595788b1784a84dbe4fa33b17668d Author: Boyuan Zhang Date: Tue Nov 7 16:20:53 2017 -0500 radeon/vcn: add encode destroy Add implementation for destr

Mesa (master): radeon/vcn: add create encoder

Module: Mesa Branch: master Commit: fe50797d93aea003b4ade2470b788b8eff0c3cea URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe50797d93aea003b4ade2470b788b8eff0c3cea Author: Boyuan Zhang Date: Wed Nov 8 11:24:09 2017 -0500 radeon/vcn: add create encoder Add implementation for creat

Mesa (master): radeon/vcn: add encode bitstream

Module: Mesa Branch: master Commit: 47443bc9f054a31b1ba92890a25655953116e080 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=47443bc9f054a31b1ba92890a25655953116e080 Author: Boyuan Zhang Date: Tue Nov 7 16:20:05 2017 -0500 radeon/vcn: add encode bitstream Add implementation for enc

Mesa (master): st/va: implement poc type

Module: Mesa Branch: master Commit: 58aa4dffb4347aeb24bf7312c63579a0cb5e7327 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=58aa4dffb4347aeb24bf7312c63579a0cb5e7327 Author: Boyuan Zhang Date: Tue Nov 7 15:53:35 2017 -0500 st/va: implement poc type pic_order_cnt_type is a required

Mesa (master): radeon/vcn: add common encode part

Module: Mesa Branch: master Commit: 7f7ae47385da726c0f56787d8675be21efe49c98 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f7ae47385da726c0f56787d8675be21efe49c98 Author: Boyuan Zhang Date: Wed Nov 8 11:17:15 2017 -0500 radeon/vcn: add common encode part Add a skeleton pipe vide

Mesa (master): radeon/vcn: add encode header algorithms

Module: Mesa Branch: master Commit: d940fdf765b18974b54e21f66d31c45455ad79bc URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d940fdf765b18974b54e21f66d31c45455ad79bc Author: Boyuan Zhang Date: Tue Nov 7 16:17:25 2017 -0500 radeon/vcn: add encode header algorithms Since bitstream he

Mesa (master): radeon/vcn: add encode header implementations

Module: Mesa Branch: master Commit: c2448f20a32d1f9b24a093dd48d33c54cfc51e6a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2448f20a32d1f9b24a093dd48d33c54cfc51e6a Author: Boyuan Zhang Date: Fri Nov 10 18:33:32 2017 -0500 radeon/vcn: add encode header implementations Implement enc

Mesa (master): radeon/video: enable encode support for raven

Module: Mesa Branch: master Commit: 3b7fd35d013f429bc84c02b555995145e6615e3d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b7fd35d013f429bc84c02b555995145e6615e3d Author: Boyuan Zhang Date: Tue Nov 7 16:25:09 2017 -0500 radeon/video: enable encode support for raven Enable h.264

Mesa (master): radeon/vcn: add encode end frame

Module: Mesa Branch: master Commit: 3f83c24366a83083fa2db4d957a168fdc6df7c92 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f83c24366a83083fa2db4d957a168fdc6df7c92 Author: Boyuan Zhang Date: Tue Nov 7 16:20:25 2017 -0500 radeon/vcn: add encode end frame Add implementation for end

Mesa (master): radeon/common: add vcn enc ip info query

Module: Mesa Branch: master Commit: 436a3f8d6d52921d91a2dab53fcfca192037125e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=436a3f8d6d52921d91a2dab53fcfca192037125e Author: Boyuan Zhang Date: Tue Nov 7 15:41:40 2017 -0500 radeon/common: add vcn enc ip info query New ip info query

Mesa (master): radeon/vcn: add ib implementations

Module: Mesa Branch: master Commit: be996f2213148912b1bcce886dbd00e7bc35f248 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=be996f2213148912b1bcce886dbd00e7bc35f248 Author: Boyuan Zhang Date: Tue Nov 7 16:09:52 2017 -0500 radeon/vcn: add ib implementations Implement required ibs a

Mesa (master): radeon/winsys: add vcn enc ring type

Module: Mesa Branch: master Commit: f2021d92eb77ad6fa421e836aa4699526a7c13da URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2021d92eb77ad6fa421e836aa4699526a7c13da Author: Boyuan Zhang Date: Tue Nov 7 15:39:41 2017 -0500 radeon/winsys: add vcn enc ring type New ring type is neede

Mesa (master): radeon/vcn: add encode get feedback

Module: Mesa Branch: master Commit: 3c53fbbc87e716f16212b7c64b963bd8a329cea2 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c53fbbc87e716f16212b7c64b963bd8a329cea2 Author: Boyuan Zhang Date: Tue Nov 7 16:21:21 2017 -0500 radeon/vcn: add encode get feedback Add implementation for

Mesa (master): radeon/vcn: add vcn encode interface

Module: Mesa Branch: master Commit: d3d89142757bafd2842d5b3ec82c81bc709bf7aa URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3d89142757bafd2842d5b3ec82c81bc709bf7aa Author: Boyuan Zhang Date: Wed Nov 8 11:01:07 2017 -0500 radeon/vcn: add vcn encode interface Add a new header file

Mesa (master): radeonsi: enable vcn encode

Module: Mesa Branch: master Commit: 549a41ed9d6e5e97668186b950d3a9659d03c8dd URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=549a41ed9d6e5e97668186b950d3a9659d03c8dd Author: Boyuan Zhang Date: Tue Nov 7 16:24:10 2017 -0500 radeonsi: enable vcn encode Enable vcn encode by creating r

Mesa (master): anv/cmd_buffer: Advance the address when initializing clear colors

Module: Mesa Branch: master Commit: a6cc361e5fd2450249847d5ee8093d26ed7ff545 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6cc361e5fd2450249847d5ee8093d26ed7ff545 Author: Jason Ekstrand Date: Sat Nov 11 22:03:45 2017 -0800 anv/cmd_buffer: Advance the address when initializing clea

Mesa (master): anv/cmd_buffer: Take bo_offset into account in fast clear state addresses

Module: Mesa Branch: master Commit: a07f7b26198ce0f5c8799481a673754968ac5daf URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a07f7b26198ce0f5c8799481a673754968ac5daf Author: Jason Ekstrand Date: Sat Nov 11 11:52:41 2017 -0800 anv/cmd_buffer: Take bo_offset into account in fast clear

Mesa (master): i965: Remove DWord length from MI_FLUSH_DW definition

Module: Mesa Branch: master Commit: 822fd2341db49cbbe813114d2d0fc1b66de4807c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=822fd2341db49cbbe813114d2d0fc1b66de4807c Author: Anuj Phogat Date: Tue Nov 14 14:48:21 2017 -0800 i965: Remove DWord length from MI_FLUSH_DW definition Fixes:

Mesa (master): i965: Rename intel_asm_annotation -> brw_disasm_info

Module: Mesa Branch: master Commit: 821ec473a862762b3e9d4004d062293fa27e102b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=821ec473a862762b3e9d4004d062293fa27e102b Author: Matt Turner Date: Thu Nov 16 11:43:51 2017 -0800 i965: Rename intel_asm_annotation -> brw_disasm_info It was

Mesa (master): i965: Rewrite disassembly annotation code

Module: Mesa Branch: master Commit: 4f82b17287194ca7d10816f6cfe4712a3e0a03fc URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4f82b17287194ca7d10816f6cfe4712a3e0a03fc Author: Matt Turner Date: Wed Nov 15 17:08:42 2017 -0800 i965: Rewrite disassembly annotation code The old code used

Mesa (master): i965: Simplify annotation_insert_error()

Module: Mesa Branch: master Commit: f80e97346b0da9fab3d60b46bdcf0a0d702f97c9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f80e97346b0da9fab3d60b46bdcf0a0d702f97c9 Author: Matt Turner Date: Thu Nov 16 13:42:41 2017 -0800 i965: Simplify annotation_insert_error() Reviewed-by: Samuel

Mesa (master): i965: Move common code out of #ifdef

Module: Mesa Branch: master Commit: f4276ef7ef4b92bdcb2f43b34ff95a3189fc0ce1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f4276ef7ef4b92bdcb2f43b34ff95a3189fc0ce1 Author: Matt Turner Date: Thu Nov 16 13:35:01 2017 -0800 i965: Move common code out of #ifdef I'm going to change the

Mesa (master): docs: update features for freedreno

Module: Mesa Branch: master Commit: 1831e3fb1dc2e8bdc624742fc928e892fc665d26 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1831e3fb1dc2e8bdc624742fc928e892fc665d26 Author: Rob Clark Date: Fri Nov 17 15:18:14 2017 -0500 docs: update features for freedreno Just comparing glxinfo and

Mesa (master): egl: Convert int to attrib in eglGetPlatformDisplay

Module: Mesa Branch: master Commit: ddcd4b05a35fdad400637c3decfa9fe183b3e8c7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ddcd4b05a35fdad400637c3decfa9fe183b3e8c7 Author: Adam Jackson Date: Thu Nov 16 13:27:27 2017 -0500 egl: Convert int to attrib in eglGetPlatformDisplay ... bec

Mesa (master): i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.

Module: Mesa Branch: master Commit: a01ba366e01b7d1cdfa6b0e6647536b10c0667ef URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a01ba366e01b7d1cdfa6b0e6647536b10c0667ef Author: Kenneth Graunke Date: Thu Nov 16 22:31:27 2017 -0800 i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.

Mesa (master): tgsi: bump tgsi_opcode_info::output_mode size to 4 bits

Module: Mesa Branch: master Commit: fdee3e1d824ed2d100c04983d5c5fe349ca1fe73 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fdee3e1d824ed2d100c04983d5c5fe349ca1fe73 Author: Brian Paul Date: Fri Nov 17 09:51:10 2017 -0700 tgsi: bump tgsi_opcode_info::output_mode size to 4 bits To av

Mesa (master): tgsi: s/uint/enum pipe_shader_type/

Module: Mesa Branch: master Commit: af322ed88762f0436603c8857d993df94e07b66b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=af322ed88762f0436603c8857d993df94e07b66b Author: Brian Paul Date: Fri Nov 17 15:03:21 2017 -0700 tgsi: s/uint/enum pipe_shader_type/ Roland Scheidegger ---

Mesa (master): r300: add PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER* switch cases

Module: Mesa Branch: master Commit: 2b5b6bebac8e64de7fe2aec70255d5ea75fe98f4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2b5b6bebac8e64de7fe2aec70255d5ea75fe98f4 Author: Brian Paul Date: Fri Nov 17 09:38:39 2017 -0700 r300: add PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER* switch cases

Mesa (master): broadcom/vc5: Fix clear color for swap_color_rb render targets.

Module: Mesa Branch: master Commit: c40ac132e4ba44f1d086112ebd27d3ec06aea8e9 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c40ac132e4ba44f1d086112ebd27d3ec06aea8e9 Author: Eric Anholt Date: Tue Nov 7 15:42:04 2017 -0800 broadcom/vc5: Fix clear color for swap_color_rb render target

Mesa (master): broadcom/vc5: Set up the padded height at surface creation time.

Module: Mesa Branch: master Commit: 8d5994098f62c509094127aad99c6abff9cb53b1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d5994098f62c509094127aad99c6abff9cb53b1 Author: Eric Anholt Date: Tue Nov 14 15:52:53 2017 -0800 broadcom/vc5: Set up the padded height at surface creation ti

Mesa (master): broadcom/vc5: Fix driver for new PIPE_SHADER_CAP_MAX_HW_ATOMIC_*.

Module: Mesa Branch: master Commit: c259bf686c1677f55899e31866eeb6db1ab622ed URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c259bf686c1677f55899e31866eeb6db1ab622ed Author: Eric Anholt Date: Tue Nov 14 16:01:32 2017 -0800 broadcom/vc5: Fix driver for new PIPE_SHADER_CAP_MAX_HW_ATOMI

Mesa (master): broadcom/vc5: Fix pasteo in front stencil ref value setup.

Module: Mesa Branch: master Commit: 52f3e9e43c0244751f0cf84dbe4d20ffc60de0b0 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=52f3e9e43c0244751f0cf84dbe4d20ffc60de0b0 Author: Eric Anholt Date: Tue Nov 7 15:37:46 2017 -0800 broadcom/vc5: Fix pasteo in front stencil ref value setup. F

Mesa (master): broadcom/vc5: Ensure that there is always a TLB write.

Module: Mesa Branch: master Commit: 87391e23cf2110051c3c74281402a690b67ccc7f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=87391e23cf2110051c3c74281402a690b67ccc7f Author: Eric Anholt Date: Wed Nov 15 15:05:37 2017 -0800 broadcom/vc5: Ensure that there is always a TLB write. This

Mesa (master): broadcom/vc5: Fix colormasking when we need to swap r/ b colors.

Module: Mesa Branch: master Commit: b63dd626b7961e6cabcd0d49e0d424a69d454511 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b63dd626b7961e6cabcd0d49e0d424a69d454511 Author: Eric Anholt Date: Tue Nov 7 15:35:33 2017 -0800 broadcom/vc5: Fix colormasking when we need to swap r/b color

Mesa (master): broadcom/vc5: Enable the Z min/max clipping planes.

Module: Mesa Branch: master Commit: 2daf941a58bacc3ade050218b2b31002f30ea29a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2daf941a58bacc3ade050218b2b31002f30ea29a Author: Eric Anholt Date: Tue Nov 7 15:21:06 2017 -0800 broadcom/vc5: Enable the Z min/max clipping planes. --- sr

Mesa (master): i965: Correct disasm_info usage in eu_validate test

Module: Mesa Branch: master Commit: 1866f7aee596d203c34439c7b603db22788b0190 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1866f7aee596d203c34439c7b603db22788b0190 Author: Andres Gomez Date: Sat Nov 18 02:48:45 2017 +0200 i965: Correct disasm_info usage in eu_validate test Fixes:

Mesa (master): i965: Mark BOs as external when we export their handle

Module: Mesa Branch: master Commit: 0a6a137eb27129e17298cfe9dd620205588ee4f6 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a6a137eb27129e17298cfe9dd620205588ee4f6 Author: Jason Ekstrand Date: Fri Nov 17 16:52:09 2017 -0800 i965: Mark BOs as external when we export their handle Al

Mesa (master): i965/bufmgr: Add a helper to mark a BO as external

Module: Mesa Branch: master Commit: 344252a27f8d875572bbe65641a825af8e73845d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=344252a27f8d875572bbe65641a825af8e73845d Author: Jason Ekstrand Date: Fri Nov 17 16:49:03 2017 -0800 i965/bufmgr: Add a helper to mark a BO as external Review

Mesa (master): i965: Stop including brw_cfg.h in brw_disasm_info.h

Module: Mesa Branch: master Commit: 1eab327ba7184fde6597f4ae061fb408ff41e93b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1eab327ba7184fde6597f4ae061fb408ff41e93b Author: Jason Ekstrand Date: Fri Nov 17 17:27:55 2017 -0800 i965: Stop including brw_cfg.h in brw_disasm_info.h The b