Hi Juliet,
On 2 June 2015 at 17:35, Juliet Fru wrote:
> Hello,
>
> I am looking to participate in the X.org Evoc program this holiday and I
> wish to know if anyone is willing to mentor my Project. Looks like one of
> my potential mentors will not be predisposed to assist me this holidays.
>
Du
Reviewed-by: Jordan Justen
On 2015-06-03 00:00:51, Iago Toral Quiroga wrote:
> From: Samuel Iglesias Gonsalvez
>
> Signed-off-by: Samuel Iglesias Gonsalvez
> ---
> src/glsl/glcpp/glcpp-parse.y| 3 ++
> src/glsl/glsl_parser_extras.cpp | 63
> +
> s
On 2015-06-03 00:00:52, Iago Toral Quiroga wrote:
> From: Kristian Høgsberg
>
> This will be used to identify buffer variables inside shader storage
> buffer objects, which are very similar to uniforms except for a few
> differences, most important of which is that they are writable.
>
> Since b
On 06/02/2015 10:54 AM, Kenneth Graunke wrote:
> On Monday, June 01, 2015 03:14:26 PM Abdiel Janulgue wrote:
>> This patch implements the binding table enable command which is also
>> used to allocate a binding table pool where where hardware-generated
>> binding table entries are flushed into. E
I just botched this when writing the original code.
From the ARB_vertex_program specification:
"The RSQ instruction approximates the reciprocal of the square root of
the absolute value of the scalar operand and replicates it to all four
components of the result vector."
Fixes a Glean vertProg1
On Thursday, June 04, 2015 11:38:52 AM Abdiel Janulgue wrote:
>
> On 06/02/2015 10:54 AM, Kenneth Graunke wrote:
> > On Monday, June 01, 2015 03:14:26 PM Abdiel Janulgue wrote:
[snip]
> I'm the one who is being funny here. After looking harder and then doing
> some archaeological digs in my previo
Kenneth Graunke writes:
> I just botched this when writing the original code.
>
> From the ARB_vertex_program specification:
> "The RSQ instruction approximates the reciprocal of the square root of
> the absolute value of the scalar operand and replicates it to all four
> components of the resu
On 31/05/15 08:10, Tapani wrote:
I've read this a couple of times now and cannot spot any users of
storage that would be making a wrong assumption, you've fixed these and
I trust Jenkins was OK for i915?
Everything is ok if you remove 'I think' and 'Hopefully' from commit
message :)
Martin's
On 04/06/15 12:53, Jose Fonseca wrote:
On 31/05/15 08:10, Tapani wrote:
I've read this a couple of times now and cannot spot any users of
storage that would be making a wrong assumption, you've fixed these and
I trust Jenkins was OK for i915?
Everything is ok if you remove 'I think' and 'Hopef
On 04/06/15 10:56, Martin Peres wrote:
On 04/06/15 12:53, Jose Fonseca wrote:
On 31/05/15 08:10, Tapani wrote:
I've read this a couple of times now and cannot spot any users of
storage that would be making a wrong assumption, you've fixed these and
I trust Jenkins was OK for i915?
Everything
On 04/06/15 13:07, Jose Fonseca wrote:
On 04/06/15 10:56, Martin Peres wrote:
On 04/06/15 12:53, Jose Fonseca wrote:
On 31/05/15 08:10, Tapani wrote:
I've read this a couple of times now and cannot spot any users of
storage that would be making a wrong assumption, you've fixed these
and
I t
https://bugs.freedesktop.org/show_bug.cgi?id=25898
marius predut changed:
What|Removed |Added
Status|RESOLVED|VERIFIED
--
You are receiving this mail
On 04/06/15 11:23, Martin Peres wrote:
On 04/06/15 13:07, Jose Fonseca wrote:
On 04/06/15 10:56, Martin Peres wrote:
On 04/06/15 12:53, Jose Fonseca wrote:
On 31/05/15 08:10, Tapani wrote:
I've read this a couple of times now and cannot spot any users of
storage that would be making a wrong
On 04/06/15 11:53, Jose Fonseca wrote:
On 04/06/15 11:23, Martin Peres wrote:
On 04/06/15 13:07, Jose Fonseca wrote:
On 04/06/15 10:56, Martin Peres wrote:
On 04/06/15 12:53, Jose Fonseca wrote:
On 31/05/15 08:10, Tapani wrote:
I've read this a couple of times now and cannot spot any users
On 04/06/15 14:02, Jose Fonseca wrote:
On 04/06/15 11:53, Jose Fonseca wrote:
On 04/06/15 11:23, Martin Peres wrote:
On 04/06/15 13:07, Jose Fonseca wrote:
On 04/06/15 10:56, Martin Peres wrote:
On 04/06/15 12:53, Jose Fonseca wrote:
On 31/05/15 08:10, Tapani wrote:
I've read this a couple
The comment was accurate but the condition was reversed...
Signed-off-by: Martin Peres
---
src/mesa/program/ir_to_mesa.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 50b86ad..514bb93 100644
--- a/src
This patch also fixes an issue I reported to Martin this morning on IRC.
It fixes bin/arb_texture_multisample-texelfetch 5 -auto with Nouveau
(and probably with some other drivers).
Thanks.
On 06/04/2015 01:19 PM, Martin Peres wrote:
The comment was accurate but the condition was reversed...
On 04/06/15 14:23, Samuel Pitoiset wrote:
This patch also fixes an issue I reported to Martin this morning on IRC.
It fixes bin/arb_texture_multisample-texelfetch 5 -auto with Nouveau
(and probably with some other drivers).
Thanks.
Sorry! For some reason, I was not on IRC...
_
Hi Roland,
On 3 June 2015 at 00:35, wrote:
> From: Roland Scheidegger
>
> Pretty trivial, fixes the issue that we're expected to be able to blit
> stencil surfaces (as the blit just relies on util blitter code which needs
> stencil export to do it).
> 2 piglits skip->pass, 11 fail->pass
>
> v2:
On 04/06/15 12:19, Martin Peres wrote:
The comment was accurate but the condition was reversed...
Signed-off-by: Martin Peres
---
src/mesa/program/ir_to_mesa.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.
https://bugs.freedesktop.org/show_bug.cgi?id=89819
--- Comment #2 from Roland Scheidegger ---
wrong bogus default uniform value doesn't sound like something which could be
done anything about in the driver.
That said, I tested this with llvmpipe and it seemed to work (I did see a crash
though whe
From: Roland Scheidegger
This probably got broken when the samplers were converted to be indexed
by shader type.
Seen when looking at bug 89819 though I'm not sure if that really was what
the bug was about...
Cc: "10.5 10.6"
---
src/gallium/auxiliary/draw/draw_llvm.c | 4 ++--
1 file changed,
V2: fix minor formating issue
Cc: Kenneth Graunke
---
There is no piglit test for this although I do have
an array of arrays test to cover it once that support is added
src/glsl/ast_to_hir.cpp | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/src/gls
Reviewed-by: Tapani Pälli
On 06/04/2015 02:19 PM, Martin Peres wrote:
The comment was accurate but the condition was reversed...
Signed-off-by: Martin Peres
---
src/mesa/program/ir_to_mesa.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/program/ir_to_mesa.c
Matt Turner writes:
> I don't know why I was confused by this patch -- after arriving at the
> same conclusion independently I see that all of the analysis I needed
> was right there.
Yes sorry, I probably didn't explain it very well. Your explanation is a
lot clearer.
> To sum up, vec4_visitor
https://bugs.freedesktop.org/show_bug.cgi?id=90821
Martina Kollarova changed:
What|Removed |Added
Component|Drivers/DRI/i965|EGL
Assignee|i...@freedesk
On 06/04/2015 06:37 AM, srol...@vmware.com wrote:
From: Roland Scheidegger
This probably got broken when the samplers were converted to be indexed
by shader type.
Seen when looking at bug 89819 though I'm not sure if that really was what
the bug was about...
Cc: "10.5 10.6"
---
src/gallium/
From: Rob Clark
Some drivers (well, at least freedreno, maybe others?) need to know
when compiling the shader whether the texture is float/int/unsigned.
This information is in GLSL IR, and in NIR, but lacking in TGSI.
This was previously worked around in the driver by using a shader
variant. Bu
From: Rob Clark
Signed-off-by: Rob Clark
---
src/gallium/auxiliary/tgsi/tgsi_ureg.c | 7 +--
src/gallium/auxiliary/tgsi/tgsi_ureg.h | 22 +++---
src/gallium/include/pipe/p_shader_tokens.h | 7 ++-
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 19
From: Rob Clark
Signed-off-by: Rob Clark
---
src/gallium/auxiliary/nir/tgsi_to_nir.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index 515171c..d370b57 100644
--- a/src/gallium/auxiliary/n
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 26 +-
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
2 files changed, 10 insertions(+), 18 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 41015e6..e654af9 100644
--- a/
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 24 +++-
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 5aa54cf..41015e6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/me
---
src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp | 25 +++
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
b/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
index 635c91b..8660ec0 100644
--- a/src/mesa/dr
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index c1dd0a6..759e77f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/br
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 284 ---
src/mesa/drivers/dri/i965/brw_fs.h | 73 ---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 79
3 files changed, 436 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/m
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 1efaf3b..5d6d6d6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.
---
.../dri/i965/test_fs_saturate_propagation.cpp | 57 +-
1 file changed, 34 insertions(+), 23 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
b/src/mesa/drivers/dri/i965/test_fs_saturate_propagation.cpp
index 8b1fab0..f4ec432 100644
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 9 ++---
src/mesa/drivers/dri/i965/brw_fs.h | 3 +-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 57 ++--
3 files changed, 35 insertions(+), 34 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 159 +--
1 file changed, 78 insertions(+), 81 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index deeb6c4..e436d14 100644
--- a/src/mesa/drivers/dri/
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 51 ++--
1 file changed, 26 insertions(+), 25 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index d2ec2a7..266ff07 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
---
src/mesa/drivers/dri/i965/brw_fs.h | 3 +-
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 77
2 files changed, 41 insertions(+), 39 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 44a0d31..338c816 100
---
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++-
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 23 ---
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 3f775d3..8803d5a 100644
---
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 4 +-
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 192 +++
3 files changed, 99 insertions(+), 99 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mes
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 55 ++--
1 file changed, 27 insertions(+), 28 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index e436d14..4fa635b 100644
--- a/src/mesa/drivers/dri/
---
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++-
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 11 ---
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 338c816..ef0256d 100644
--- a/src/mesa/dri
This is now unused. Saves a whole bit of memory per instruction.
---
src/mesa/drivers/dri/i965/brw_ir_fs.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h
b/src/mesa/drivers/dri/i965/brw_ir_fs.h
index eee4d7e..96dc20d 100644
--- a/src/mesa/drivers/dri/i96
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 7e33d72..3f84830 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 39
src/mesa/drivers/dri/i965/brw_fs.h | 9
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 4 ++--
3 files changed, 21 insertions(+), 31 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/s
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 92c2056..d73f890 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
++
The purpose of this change is threefold: First, it improves the
modularity of the compiler back-end by separating the functionality
required to construct an i965 IR program from the rest of the visitor
god-object, what in turn will reduce the coupling between other
components and the visitor allowi
---
src/mesa/drivers/dri/i965/brw_fs.h | 3 ++-
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 16 ++--
2 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 571d411..3f775d3 100644
--- a/src/me
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 24 +++-
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 98429fa..92c2056 100644
--- a/src/mesa/drivers/dri/i965
---
.../drivers/dri/i965/test_fs_cmod_propagation.cpp | 75 +-
1 file changed, 45 insertions(+), 30 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp
b/src/mesa/drivers/dri/i965/test_fs_cmod_propagation.cpp
index 0e48e82..17c519c 100644
--- a/s
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 28 ++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 66 ++--
2 files changed, 46 insertions(+), 48 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index bd
---
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 27 ---
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 822a6a3..70f0217 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_c
---
.../drivers/dri/i965/brw_fs_combine_constants.cpp | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp
b/src/mesa/drivers/dri/i965/brw_fs_combine_constants.cpp
index aa62031..0af5a91 100644
--- a/sr
Most of these fields affect the behaviour of the instruction so it
could actually break the program if we CSE a pair of otherwise
matching instructions with different values of these fields.
---
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 20
1 file changed, 12 insertions(+), 8
---
src/mesa/drivers/dri/i965/brw_fs_peephole_predicated_break.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_peephole_predicated_break.cpp
b/src/mesa/drivers/dri/i965/brw_fs_peephole_predicated_break.cpp
index cf3da7b..d92d4bbd 1006
---
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 3ddd17c..822a6a3 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/driver
See "i965/fs: Introduce FS IR builder." for the rationale.
v2: Drop scalarizing VEC4 builder.
v3: Take a backend_shader as constructor argument. Improve handling
of debug annotations and execution control flags.
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 9ee6dd8..deeb6c4 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_
This simplifies opt_peephole_sel() slightly by emitting the SEL
instructions immediately after they are created, what makes the
sel_inst and mov_imm_inst arrays unnecessary and will make it possible
to get rid of the explicit inserts when the pass is migrated to the IR
builder.
---
src/mesa/driver
This series migrates the FS compiler back-end to the i965 IR builder I
proposed a while ago as part of my ARB_shader_image_load_store series,
and fixes a couple of bugs I found during the process. It doesn't yet
attempt to convert the VEC4 back-end, but the VEC4 version of the
builder is also incl
Yes, it's incorrect to use the 0-th channel enable group
unconditionally without considering the execution and regioning
controls of the instruction that uses the spilled value, but it
matches the previous behaviour exactly, the builder just makes the
preexisting problem more obvious because emitti
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 266ff07..e55998c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/b
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 34 +++---
1 file changed, 11 insertions(+), 23 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 759e77f..5aa54cf 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
++
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 54 +---
src/mesa/drivers/dri/i965/brw_fs.h | 5 ++--
2 files changed, 23 insertions(+), 36 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 4e8d6ae..bd94dc4 1
Most of these fields affect the behaviour of the instruction so it
could actually break the program if we CSE a pair of otherwise
matching instructions with different values of these fields.
---
src/mesa/drivers/dri/i965/brw_vec4_cse.cpp | 8
1 file changed, 8 insertions(+)
diff --git a/
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 11 +++
src/mesa/drivers/dri/i965/brw_fs.h | 2 ++
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 +++-
3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/d
https://bugs.freedesktop.org/show_bug.cgi?id=90821
--- Comment #3 from Matt Turner ---
Indeed, I can reproduce on master using your test program (thanks a lot for
that!)
Program received signal SIGSEGV, Segmentation fault.
0x74e1ad42 in dri2InvalidateDrawable (drawable=0x0) at
../../../.
Reviewed-by: Marek Olšák
What does the type really do? Does it only disable filtering for
int/uint? Because without filtering, there is no difference between a
float and int texture fetch.
Marek
On Thu, Jun 4, 2015 at 5:50 PM, Rob Clark wrote:
> From: Rob Clark
>
> Some drivers (well, at leas
On a3xx at least, the format you get in the shader is separate from
sampler/texture settings. You can get int as floats back, or regular ints,
depending on instruction dest type. So we need to specify float or int
value in the shader, otherwise we get the wrong format back.
On Jun 4, 2015 19:19, "M
a4xx is same, we need to set dest type (s16/s32/u16/u32/f16/f32) in
the shader instruction
BR,
-R
On Thu, Jun 4, 2015 at 12:48 PM, Ilia Mirkin wrote:
> On a3xx at least, the format you get in the shader is separate from
> sampler/texture settings. You can get int as floats back, or regular ints,
On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez wrote:
> The purpose of this change is threefold: First, it improves the
> modularity of the compiler back-end by separating the functionality
> required to construct an i965 IR program from the rest of the visitor
> god-object, what in turn will red
On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez wrote:
> Most of these fields affect the behaviour of the instruction so it
> could actually break the program if we CSE a pair of otherwise
> matching instructions with different values of these fields.
> ---
> src/mesa/drivers/dri/i965/brw_vec4_cs
I guess we'll be carrying forward our strained backronym of FS as fast
scalar? :)
-Jordan
On 2015-06-04 09:04:50, Francisco Jerez wrote:
> The purpose of this change is threefold: First, it improves the
> modularity of the compiler back-end by separating the functionality
> required to construct
On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
> index 3ddd17c..822a6a3 100644
On Thu, Jun 4, 2015 at 9:04 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 11 +++
> src/mesa/drivers/dri/i965/brw_fs.h | 2 ++
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 +++-
> 3 files changed, 16 insertions(+), 1 deletion(-)
>
> di
I think we had a discussion about this on mesa3d-dev a while ago. I
don't recall the conclusions but I wish I did.
We have tgsi_return_type. Why isn't this enough? Or better, why isn't
being used for this?
Jose
On 04/06/15 16:50, Rob Clark wrote:
From: Rob Clark
Signed-off-by: Rob Clar
On Thu, Jun 4, 2015 at 9:05 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 26 +-
> src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
> 2 files changed, 10 insertions(+), 18 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
> b/src/
On Thu, Jun 4, 2015 at 9:05 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 159
> +--
> 1 file changed, 78 insertions(+), 81 deletions(-)
There are a number of tabs in this patch that should be removed.
_
Here is the diff compared to v1, with the r-b tags I got. I've only compile
tested this, but I'll send it through jenkins before push.
Thanks for the comments.
Cc: "Pohjolainen, Topi"
Reviewed-by: Chad Versace
Reviewed-by: Anuj Phogat
Reviewed-by: Jordan Justen
---
src/mesa/drivers/dri/i965/
On Thu, Jun 4, 2015 at 2:14 PM, Jose Fonseca wrote:
> I think we had a discussion about this on mesa3d-dev a while ago. I don't
> recall the conclusions but I wish I did.
>
> We have tgsi_return_type. Why isn't this enough? Or better, why isn't
> being used for this?
mostly arbitrary reasons..
On 04/06/15 19:50, Rob Clark wrote:
On Thu, Jun 4, 2015 at 2:14 PM, Jose Fonseca wrote:
I think we had a discussion about this on mesa3d-dev a while ago. I don't
recall the conclusions but I wish I did.
We have tgsi_return_type. Why isn't this enough? Or better, why isn't
being used for thi
On Fri, May 29, 2015 at 12:07:36PM -0700, Chad Versace wrote:
> On Fri 29 May 2015, Pohjolainen, Topi wrote:
> > On Fri, May 29, 2015 at 09:32:53AM +0300, Pohjolainen, Topi wrote:
> > > On Thu, May 28, 2015 at 10:21:29AM -0700, Ben Widawsky wrote:
> > > > I think pretty much everyone agrees that ha
On Thu, Jun 4, 2015 at 11:33 AM, Ben Widawsky
wrote:
> Here is the diff compared to v1, with the r-b tags I got. I've only compile
> tested this, but I'll send it through jenkins before push.
>
> Thanks for the comments.
Please delete this before you push. :)
_
On 04/06/15 19:14, Jose Fonseca wrote:
I think we had a discussion about this on mesa3d-dev a while ago. I
don't recall the conclusions but I wish I did.
Found it:
http://lists.freedesktop.org/archives/mesa-dev/2014-November/thread.html#71577
http://lists.freedesktop.org/archives/mesa-dev/2
On Thu, Jun 4, 2015 at 3:11 PM, Jose Fonseca wrote:
> On 04/06/15 19:50, Rob Clark wrote:
>>
>> On Thu, Jun 4, 2015 at 2:14 PM, Jose Fonseca wrote:
>>>
>>> I think we had a discussion about this on mesa3d-dev a while ago. I
>>> don't
>>> recall the conclusions but I wish I did.
>>>
>>> We have t
On 28.05.2015 13:04, Grigori Goronzy wrote:
> We need this to implement OpenCL's
> CL_KERNEL_PREFERRED_WORK_GROUP_SIZE_MULTIPLE.
> ---
Ping?
> src/gallium/docs/source/screen.rst | 2 ++
> src/gallium/drivers/ilo/ilo_screen.c | 8
> src/gallium/drivers/nouveau/nvc
On 28.05.2015 10:10, Grigori Goronzy wrote:
> Wrap MapBuffer and MapImage as hard_event actions, like other
> operations. This enables correct profiling. Also make sure to wait
> for events to finish when blocking is requested by the caller.
> ---
Ping?
> src/gallium/state_trackers/clover/api/tr
On Thu, Jun 4, 2015 at 3:22 PM, Rob Clark wrote:
> On Thu, Jun 4, 2015 at 3:11 PM, Jose Fonseca wrote:
>> On 04/06/15 19:50, Rob Clark wrote:
>>>
>>> On Thu, Jun 4, 2015 at 2:14 PM, Jose Fonseca wrote:
I think we had a discussion about this on mesa3d-dev a while ago. I
don't
On 04/06/15 20:36, Rob Clark wrote:
On Thu, Jun 4, 2015 at 3:22 PM, Rob Clark wrote:
On Thu, Jun 4, 2015 at 3:11 PM, Jose Fonseca wrote:
On 04/06/15 19:50, Rob Clark wrote:
On Thu, Jun 4, 2015 at 2:14 PM, Jose Fonseca wrote:
I think we had a discussion about this on mesa3d-dev a while ag
Am 04.06.2015 um 21:36 schrieb Rob Clark:
> On Thu, Jun 4, 2015 at 3:22 PM, Rob Clark wrote:
>> On Thu, Jun 4, 2015 at 3:11 PM, Jose Fonseca wrote:
>>> On 04/06/15 19:50, Rob Clark wrote:
On Thu, Jun 4, 2015 at 2:14 PM, Jose Fonseca wrote:
>
> I think we had a discussion about
On Thu, Jun 4, 2015 at 3:55 PM, Jose Fonseca wrote:
> On 04/06/15 20:36, Rob Clark wrote:
>>
>> On Thu, Jun 4, 2015 at 3:22 PM, Rob Clark wrote:
>>>
>>> On Thu, Jun 4, 2015 at 3:11 PM, Jose Fonseca wrote:
On 04/06/15 19:50, Rob Clark wrote:
>
>
> On Thu, Jun 4, 2015 at 2:14
On Fri, May 29, 2015 at 12:27:17PM -0700, Chad Versace wrote:
> On Thu 28 May 2015, Ben Widawsky wrote:
> > There are several constraints when determining if one can fast clear a
> > surface.
> > Some of these are alignment, pixel density, tiling formats, and others that
> > vary
> > by generatio
Hi,
Over the past few weeks or so, I've been sitting down and writing some
documentation on how NIR, and especially the core NIR datastructures,
works. At this point I think it's reasonably complete, although I've
probably forgotten something that I should mention, and one thing
that's missing for
On Fri, May 29, 2015 at 05:21:14PM -0700, Chad Versace wrote:
> On Fri 29 May 2015, Chad Versace wrote:
> > On Thu 28 May 2015, Ben Widawsky wrote:
> > > This restriction was attempted in this commit:
> > > commit 47053464630888f819ef8cc44278f1a1220159b9
> > > Author: Anuj Phogat
> > > Date: Fri
On Fri, May 29, 2015 at 05:06:09PM -0700, Chad Versace wrote:
> On Thu 28 May 2015, Ben Widawsky wrote:
> > Just like the previous patch, but for the GEN9 constraints.
> >
> > Signed-off-by: Ben Widawsky
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 5 +
> > 1 file changed, 5 i
On Thu, Jun 4, 2015 at 9:05 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 54
> +---
> src/mesa/drivers/dri/i965/brw_fs.h | 5 ++--
> 2 files changed, 23 insertions(+), 36 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_f
On Thu, Jun 4, 2015 at 9:05 AM, Francisco Jerez wrote:
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 28 ++--
> src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 66
> ++--
> 2 files changed, 46 insertions(+), 48 deletions(-)
>
> diff --git a/src/mesa/driver
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