[Mesa-dev] [PATCH 1/6] i965: Fix BRW_VARYING_SLOT_PAD handling in the scalar VS backend.

2015-09-11 Thread Kenneth Graunke
We can't just break for padding slots. Instead, treat them like unwritten output variables, so we handle flushing and incrementing urb_offset correctly. Paul introduced the concept of padding slots back in 2011, but we've never actually used them for anything. So it's unsurprising that the scala

[Mesa-dev] [PATCH 5/6] i965/gs: Remove the dependency on the VS VUE map.

2015-09-11 Thread Kenneth Graunke
Because we only support geometry shaders in core profile, we can safely ignore any driver-extending of VS outputs. Those are: - Legacy userclipping (doesn't exist in core profile) - Edgeflag copying (Gen4-5 only, no GS support) - Point coord replacement (Gen4-5 only, no GS support) - front/back co

[Mesa-dev] [PATCH 2/6] i965: Initialize unused VUE map slots to BRW_VARYING_SLOT_PAD.

2015-09-11 Thread Kenneth Graunke
Nothing actually relies on unused slots being initialized to BRW_VARYING_SLOT_COUNT. Soon, we're going to have VUE maps with holes in them, at which point pre-filling with BRW_VARYING_SLOT_PAD make a lot more sense. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vue_map.c | 2

Re: [Mesa-dev] [PATCH v3] i915: fixing driver crashes if too few vertices are submitted

2015-09-11 Thread Eirik Byrkjeflot Anonsen
Ilia Mirkin writes: > On Fri, Sep 11, 2015 at 10:45 PM, Ian Romanick wrote: >> On 09/11/2015 10:55 AM, Ilia Mirkin wrote: >>> On Fri, Sep 11, 2015 at 12:36 PM, Marius Predut >>> wrote: Comparison with a signed expression and unsigned value is converted to unsigned value, reason for m

Re: [Mesa-dev] [PATCH v3] i915: fixing driver crashes if too few vertices are submitted

2015-09-11 Thread Ilia Mirkin
On Fri, Sep 11, 2015 at 10:45 PM, Ian Romanick wrote: > On 09/11/2015 10:55 AM, Ilia Mirkin wrote: >> On Fri, Sep 11, 2015 at 12:36 PM, Marius Predut >> wrote: >>> Comparison with a signed expression and unsigned value >>> is converted to unsigned value, reason for minus value is interpreted >>>

Re: [Mesa-dev] [PATCH v3] i915: fixing driver crashes if too few vertices are submitted

2015-09-11 Thread Ian Romanick
On 09/11/2015 10:55 AM, Ilia Mirkin wrote: > On Fri, Sep 11, 2015 at 12:36 PM, Marius Predut > wrote: >> Comparison with a signed expression and unsigned value >> is converted to unsigned value, reason for minus value is interpreted >> as a big unsigned value. For this case the "for" loop >> is g

[Mesa-dev] [PATCH] gbm: Add a flag to enable creation of rotated scanout buffers

2015-09-11 Thread Vivek Kasireddy
For certain platforms that support rotated scanout buffers, currently, there is no way to create them with the GBM DRI interface. This flag will tell the DRI driver to set Y-tiling while creating the rotated scanout buffer. Cc: Matthew D Roper Signed-off-by: Vivek Kasireddy --- include/GL/inter

Re: [Mesa-dev] [PATCH v2] i915: fixing driver crashes if too few vertices are submitted

2015-09-11 Thread Ian Romanick
On 09/11/2015 03:41 AM, Predut, Marius wrote: > > >> -Original Message- >> From: Ian Romanick [mailto:i...@freedesktop.org] >> Sent: Wednesday, September 09, 2015 8:54 PM >> To: Predut, Marius; mesa-dev@lists.freedesktop.org >> Subject: Re: [Mesa-dev] [PATCH v2] i915: fixing driver crashe

Re: [Mesa-dev] [PATCH v3 2/4] nvc0: add support for st/va

2015-09-11 Thread Ilia Mirkin
On Fri, Sep 11, 2015 at 7:54 PM, Ilia Mirkin wrote: > On Mon, Sep 7, 2015 at 8:15 AM, Julien Isorce wrote: >> - split nvc0_decoder_bsp in begin/next/end >> - preserve content buffer when calling nvc0_decoder_bsp_next >> - implement pipe_video_codec::begin_frame/end_frame >> >> https://bugs.freede

Re: [Mesa-dev] [PATCH v3 2/4] nvc0: add support for st/va

2015-09-11 Thread Ilia Mirkin
On Mon, Sep 7, 2015 at 8:15 AM, Julien Isorce wrote: > - split nvc0_decoder_bsp in begin/next/end > - preserve content buffer when calling nvc0_decoder_bsp_next > - implement pipe_video_codec::begin_frame/end_frame > > https://bugs.freedesktop.org/show_bug.cgi?id=89969 > > Signed-off-by: Julien Is

Re: [Mesa-dev] [RFC 2/3] nir: Add a pass to rewrite uses of vecN sources to the vecN destination

2015-09-11 Thread Jason Ekstrand
Given that coalescing seems to be hard, I'm bumping this series from RFC to PATCH. It's kinda nuts, but seems fairly effective. --Jason On Tue, Sep 8, 2015 at 5:35 PM, Jason Ekstrand wrote: > --- > src/glsl/Makefile.sources| 1 + > src/glsl/nir/nir.h

Re: [Mesa-dev] [PATCH v2 3/3] glsl/cs: Initialize gl_GlobalInvocationID in main()

2015-09-11 Thread Jordan Justen
On 2015-09-10 05:48:50, Alejandro Piñeiro wrote: > Not a full review, but a comment. See inline. > > On 23/08/15 09:09, Jordan Justen wrote: > > We initialize gl_GlobalInvocationID based on the extension spec > > formula: > > > > gl_GlobalInvocationID = > > gl_WorkGroupID * gl_WorkGrou

Re: [Mesa-dev] [PATCH 1/7] softpipe: Move the faces array from view to filter_args

2015-09-11 Thread Brian Paul
On 09/11/2015 04:49 PM, Krzesimir Nowak wrote: On Fri, Sep 11, 2015 at 11:57 PM, Emil Velikov mailto:emil.l.veli...@gmail.com>> wrote: On 11 September 2015 at 19:07, Krzesimir Nowak mailto:krzesi...@kinvolk.io>> wrote: > With that, sp_sampler_view instances are not abused anymore as a lo

Re: [Mesa-dev] [PATCH 1/7] softpipe: Move the faces array from view to filter_args

2015-09-11 Thread Krzesimir Nowak
On Fri, Sep 11, 2015 at 11:57 PM, Emil Velikov wrote: > On 11 September 2015 at 19:07, Krzesimir Nowak > wrote: > > With that, sp_sampler_view instances are not abused anymore as a local > > storage, so we can later make them constant. > > --- > > src/gallium/drivers/softpipe/sp_tex_sample.c |

Re: [Mesa-dev] i965: Turn UBOs as push constants

2015-09-11 Thread Ben Widawsky
On Fri, Sep 11, 2015 at 11:33:14AM +0300, Abdiel Janulgue wrote: > Some updated figures first: > > Ue4 Reflections Subway demo > x fs gather constants disabled > + fs gather constants enabled > > HSW: > N Min MaxMedian AvgStddev > x 10 5.

[Mesa-dev] [PATCH v2 2/5] gallium: add PIPE_CAP_TGSI_TXQS to let st know if TXQS is supported

2015-09-11 Thread Ilia Mirkin
Signed-off-by: Ilia Mirkin --- src/gallium/docs/source/screen.rst | 1 + src/gallium/drivers/freedreno/freedreno_screen.c | 1 + src/gallium/drivers/i915/i915_screen.c | 1 + src/gallium/drivers/ilo/ilo_screen.c | 1 + src/gallium/drivers/llvmpipe/lp_screen.c

[Mesa-dev] [PATCH v2 5/5] st/mesa: emit TXQS, support ARB_shader_texture_image_samples

2015-09-11 Thread Ilia Mirkin
The image component of the ext is a no-op since there is no image support in gallium (yet). Signed-off-by: Ilia Mirkin Reviewed-by: Edward O'Callaghan Reviewed-by: Brian Paul --- docs/GL3.txt | 2 +- docs/relnotes/11.1.0.html | 2 +- src/mesa/stat

[Mesa-dev] [PATCH v2 0/5] gallium: add support for retrieving number of texture samples

2015-09-11 Thread Ilia Mirkin
OK, I've added a PIPE_CAP to control it now. I've left the relevant R-b's from v1 in place despite a few changes, I think they're minor enough. Ilia Mirkin (5): tgsi: add a TXQS opcode to retrieve the number of texture samples gallium: add PIPE_CAP_TGSI_TXQS to let st know if TXQS is supported

[Mesa-dev] [PATCH v2 4/5] r600g: add support for TXQS tgsi opcode

2015-09-11 Thread Ilia Mirkin
Signed-off-by: Ilia Mirkin Reviewed-by: Glenn Kennard --- src/gallium/drivers/r600/r600_pipe.c | 2 +- src/gallium/drivers/r600/r600_shader.c | 16 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600

[Mesa-dev] [PATCH v2 1/5] tgsi: add a TXQS opcode to retrieve the number of texture samples

2015-09-11 Thread Ilia Mirkin
Signed-off-by: Ilia Mirkin Reviewed-by: Roland Scheidegger Reviewed-by: Edward O'Callaghan --- src/gallium/auxiliary/tgsi/tgsi_info.c | 3 ++- src/gallium/docs/source/tgsi.rst | 12 +++- src/gallium/include/pipe/p_shader_tokens.h | 1 + 3 files changed, 14 insertions(+),

[Mesa-dev] [PATCH v2 3/5] nv50/ir: add support for TXQS tgsi opcode

2015-09-11 Thread Ilia Mirkin
Signed-off-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 4 ++-- .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 22 +- .../nouveau/codegen/nv50_ir_lowering_nv50.cpp | 20 src/gallium/drivers/nouveau/nv50/nv50_screen.c

Re: [Mesa-dev] [PATCH V3 1/6] glsl: order indices for samplers inside a struct array

2015-09-11 Thread Timothy Arceri
On Thu, 2015-09-10 at 21:36 -0700, Jason Ekstrand wrote: > On Thu, Sep 10, 2015 at 7:43 PM, Timothy Arceri < > t_arc...@yahoo.com.au> wrote: > > On Tue, 2015-09-08 at 14:14 -0700, Jason Ekstrand wrote: > > > On Mon, Sep 7, 2015 at 3:09 PM, Timothy Arceri < > > > t_arc...@yahoo.com.au > > > > wrote:

Re: [Mesa-dev] [PATCH 2/6] mesa/glformats: restrict ETC1_RGB8 support to GLES1/2

2015-09-11 Thread Anuj Phogat
On Fri, Aug 28, 2015 at 7:50 AM, Nanley Chery wrote: > From: Nanley Chery > > According to the extensions table and our glext headers, > OES_compressed_ETC1_RGB8_texture is only supported in > GLES1 and GLES2. > > Signed-off-by: Nanley Chery > --- > src/mesa/main/teximage.c | 3 ++- > 1 file c

Re: [Mesa-dev] [PATCH 1/7] softpipe: Move the faces array from view to filter_args

2015-09-11 Thread Emil Velikov
On 11 September 2015 at 19:07, Krzesimir Nowak wrote: > With that, sp_sampler_view instances are not abused anymore as a local > storage, so we can later make them constant. > --- > src/gallium/drivers/softpipe/sp_tex_sample.c | 36 > +--- > src/gallium/drivers/softpipe/s

Re: [Mesa-dev] [PATCH 7/7] softpipe: Constify variables

2015-09-11 Thread Roland Scheidegger
Honestly, I don't see much point of constifying simple one-time-assigned local variables (won't make a difference to the compiler anyway, and even for reading imho doesn't add much). I don't object changing it though, and the rest of the series definitely looks good to me, I'm glad you got rid of t

Re: [Mesa-dev] [PATCH 0/7] Const fixes/cleanups in softpipe's tex samplers

2015-09-11 Thread Brian Paul
On 09/11/2015 12:07 PM, Krzesimir Nowak wrote: This stops abusing sp_sampler_view as a local storage and thus allowing to put some more const modifiers in front of some types. I might have gotten carried away too bit with the last commit. :) So if you don't like it, then please ignore it. Teste

Re: [Mesa-dev] [PATCH 1/2] mesa/texcompress: add function to determine compressed format type

2015-09-11 Thread Anuj Phogat
On Fri, Aug 28, 2015 at 9:09 AM, Nanley Chery wrote: > From: Nanley Chery > > Determines if a compressed format is non-palettized and specific. > > Signed-off-by: Nanley Chery > --- > src/mesa/main/texcompress.c | 10 ++ > src/mesa/main/texcompress.h | 3 +++ > 2 files changed, 13 ins

Re: [Mesa-dev] [PATCH] i965/skl: Use larger URB size where available.

2015-09-11 Thread Ben Widawsky
On Fri, Sep 11, 2015 at 12:12:15PM -0700, Jordan Justen wrote: > On 2015-09-10 16:59:12, Ben Widawsky wrote: > > All SKL SKUs except the lowest one which has half the L3 size actually have > > 384K > > These commit message lines seem to wrap a bit long. This first line is > 80 characters. > > >

Re: [Mesa-dev] [PATCH] i965/skl: Use larger URB size where available.

2015-09-11 Thread Jordan Justen
On 2015-09-10 16:59:12, Ben Widawsky wrote: > All SKL SKUs except the lowest one which has half the L3 size actually have > 384K These commit message lines seem to wrap a bit long. This first line is 80 characters. > of URB per slice. > > For once, I can explain how this mistake was made and ho

Re: [Mesa-dev] i965: L3 cache partitioning.

2015-09-11 Thread Ben Widawsky
On Fri, Sep 11, 2015 at 11:37:21AM -0700, Ben Widawsky wrote: > On Fri, Sep 11, 2015 at 10:24:29AM -0700, Ben Widawsky wrote: > > On Sun, Sep 06, 2015 at 06:12:38PM +0200, Francisco Jerez wrote: > > > This series implements dynamic partitioning of the L3 cache space > > > among its clients, the pur

Re: [Mesa-dev] i965: L3 cache partitioning.

2015-09-11 Thread Ben Widawsky
On Fri, Sep 11, 2015 at 10:24:29AM -0700, Ben Widawsky wrote: > On Sun, Sep 06, 2015 at 06:12:38PM +0200, Francisco Jerez wrote: > > This series implements dynamic partitioning of the L3 cache space > > among its clients, the purpose is multiple: > > > > - Steal a chunk of L3 space when necessary

Re: [Mesa-dev] [PATCH 1/4] tgsi: add a TXQS opcode to retrieve the number of texture samples

2015-09-11 Thread Ilia Mirkin
On Fri, Sep 11, 2015 at 10:42 AM, Brian Paul wrote: > On 09/10/2015 09:15 PM, Ilia Mirkin wrote: >> >> Signed-off-by: Ilia Mirkin >> --- >> src/gallium/auxiliary/tgsi/tgsi_info.c | 3 ++- >> src/gallium/docs/source/tgsi.rst | 12 +++- >> src/gallium/include/pipe/p_shade

Re: [Mesa-dev] [PATCH 0/4] gallium: add support for retrieving number of texture samples

2015-09-11 Thread Ilia Mirkin
On Fri, Sep 11, 2015 at 10:47 AM, Brian Paul wrote: > On 09/11/2015 07:26 AM, Roland Scheidegger wrote: >> >> Am 11.09.2015 um 05:15 schrieb Ilia Mirkin: >>> >>> My hope was (as you can see in the last patch) to enable this for all >>> drivers that support MS textures. I've got nv50/nvc0/r600g cov

[Mesa-dev] [PATCH 7/7] softpipe: Constify variables

2015-09-11 Thread Krzesimir Nowak
This commit makes a lot of variables constant - this is basically done by moving the computation to variable definition. Some of them are moved into lower scopes (like in img_filter_2d_ewa). --- src/gallium/drivers/softpipe/sp_tex_sample.c | 441 --- 1 file changed, 199 ins

[Mesa-dev] [PATCH 5/7] softpipe: Constify sampler and view parameters in mip filters

2015-09-11 Thread Krzesimir Nowak
Those functions actually could always take them as constants. --- src/gallium/drivers/softpipe/sp_tex_sample.c | 32 ++-- src/gallium/drivers/softpipe/sp_tex_sample.h | 4 ++-- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/src/gallium/drivers/softpipe/sp

[Mesa-dev] [PATCH 6/7] softpipe: Constify sp_tgsi_sampler

2015-09-11 Thread Krzesimir Nowak
Add a small inline function doing the casting - this is to make sure we don't do a cast from some completely unrelated type. This commit does not make tgsi_sampler parameters const in vfuncs themselves for now - probably llvmpipe would need looking at before making such a change. --- src/gallium/d

[Mesa-dev] [PATCH 3/7] tgsi, softpipe: Constify tgsi_sampler in query_lod vfunc

2015-09-11 Thread Krzesimir Nowak
A followup from previous commit - since all functions called by query_lod take pointers to const sp_sampler_view and const sp_sampler, which are taken from tgsi_sampler subclass, we can the tgsi_sampler as const itself now. --- src/gallium/auxiliary/tgsi/tgsi_exec.h | 2 +- src/gallium/drive

[Mesa-dev] [PATCH 1/7] softpipe: Move the faces array from view to filter_args

2015-09-11 Thread Krzesimir Nowak
With that, sp_sampler_view instances are not abused anymore as a local storage, so we can later make them constant. --- src/gallium/drivers/softpipe/sp_tex_sample.c | 36 +--- src/gallium/drivers/softpipe/sp_tex_sample.h | 4 +--- 2 files changed, 23 insertions(+), 17 dele

[Mesa-dev] [PATCH 2/7] softpipe: Constify some sampler and view parameters

2015-09-11 Thread Krzesimir Nowak
This is to prepare for making tgsi_sampler parameter in query_lod a const too. These functions do not modify anything in either sampler or view anymore. --- src/gallium/drivers/softpipe/sp_tex_sample.c | 51 ++-- src/gallium/drivers/softpipe/sp_tex_sample.h | 4 +-- 2 file

[Mesa-dev] [PATCH 0/7] Const fixes/cleanups in softpipe's tex samplers

2015-09-11 Thread Krzesimir Nowak
This stops abusing sp_sampler_view as a local storage and thus allowing to put some more const modifiers in front of some types. I might have gotten carried away too bit with the last commit. :) So if you don't like it, then please ignore it. Tested it with piglit shader tests and got no regressi

[Mesa-dev] [PATCH 4/7] softpipe: Constify sampler and view parameters in img filters

2015-09-11 Thread Krzesimir Nowak
Those functions actually could always take them as constants. --- src/gallium/drivers/softpipe/sp_tex_sample.c | 68 ++-- src/gallium/drivers/softpipe/sp_tex_sample.h | 4 +- 2 files changed, 36 insertions(+), 36 deletions(-) diff --git a/src/gallium/drivers/softpipe/sp_t

Re: [Mesa-dev] [PATCH v3] i915: fixing driver crashes if too few vertices are submitted

2015-09-11 Thread Ilia Mirkin
On Fri, Sep 11, 2015 at 12:36 PM, Marius Predut wrote: > Comparison with a signed expression and unsigned value > is converted to unsigned value, reason for minus value is interpreted > as a big unsigned value. For this case the "for" loop > is going into unexpected behavior. > > v1: Brian Paul: c

Re: [Mesa-dev] i965: L3 cache partitioning.

2015-09-11 Thread Ben Widawsky
On Sun, Sep 06, 2015 at 06:12:38PM +0200, Francisco Jerez wrote: > This series implements dynamic partitioning of the L3 cache space > among its clients, the purpose is multiple: > > - Steal a chunk of L3 space when necessary and reserve it for SLM as >required to support compute shaders with

Re: [Mesa-dev] [PATCH V2 1/8] i965: Add a helper function intel_get_tile_dims()

2015-09-11 Thread Anuj Phogat
On Thu, Sep 10, 2015 at 12:20 PM, Chad Versace wrote: > On Wed 19 Aug 2015, Anuj Phogat wrote: > > V2: > > - Do the tile width/height computations in the new helper > > function and use it later in intel_miptree_get_tile_masks(). > > - Change the name to intel_get_tile_dims(). > > > > Cc: Ben W

Re: [Mesa-dev] nv3x xfce4 compositing issue, making good progress, need help / input

2015-09-11 Thread Ilia Mirkin
On Fri, Sep 11, 2015 at 10:46 AM, Hans de Goede wrote: > Hi, > > I've been working on trying to fix this one: > > https://bugs.freedesktop.org/show_bug.cgi?id=90871 > > And today I've more or less root caused this, it seems > that some code is making glTexImage2D calls with npot > width / height,

Re: [Mesa-dev] [PATCH] nir: Fix output variable names

2015-09-11 Thread Michael Schellenberger Costa
Hi, didnt Jason just send a similar patch to the list? [Mesa-dev] [PATCH] nir/lower_outputs_to_temporaries: Reparent the output name Regards Michael Am 11/09/2015 um 09:24 schrieb Eduardo Lima Mitev: > Commit 1dbe4af9c9e318525fc082b542b93fb7f1e5efba > "nir: Add a pass to lower outputs to tempor

Re: [Mesa-dev] [PATCH v2] i965/vec4: check writemask when bailing out at register coalesce

2015-09-11 Thread Jason Ekstrand
Cc'ing stable On Fri, Sep 11, 2015 at 8:13 AM, Alejandro Piñeiro wrote: > opt_register_coalesce stopped to check previous instructions to > coalesce with if somebody else was writing on the same > destination. This can be optimized to check if somebody else was > writing to the same channels of t

Re: [Mesa-dev] [PATCH v2 10.1/11] nir: Add a fdot instruction that replicates the result to a vec4

2015-09-11 Thread Jason Ekstrand
On Fri, Sep 11, 2015 at 9:00 AM, Connor Abbott wrote: > On Fri, Sep 11, 2015 at 11:52 AM, Jason Ekstrand wrote: >> Fortunately, nir_constant_expr already auto-splats if "dst" never shows up >> in the constant expression field so we don't need to do anything there. >> >> Cc: Connor Abbott >> ---

Re: [Mesa-dev] [PATCH v2 10.1/11] nir: Add a fdot instruction that replicates the result to a vec4

2015-09-11 Thread Connor Abbott
On Fri, Sep 11, 2015 at 11:52 AM, Jason Ekstrand wrote: > Fortunately, nir_constant_expr already auto-splats if "dst" never shows up > in the constant expression field so we don't need to do anything there. > > Cc: Connor Abbott > --- > src/glsl/nir/nir.h| 6 ++ > src/glsl/ni

Re: [Mesa-dev] [PATCH] nir/lower_outputs_to_temporaries: Reparent the output name

2015-09-11 Thread Jason Ekstrand
On Fri, Sep 11, 2015 at 5:45 AM, Eduardo Lima Mitev wrote: > Reviewed-by: Eduardo Lima Mitev One side-note: Could you please reply-all when reviewing patches. That way you keep the Cc list alive. While I still get it, my e-mail client flags things that are specifically Cc'd to me so I notice th

[Mesa-dev] [PATCH v2 06/11] nir/lower_vec_to_movs: Pass the shader around directly

2015-09-11 Thread Jason Ekstrand
Previously, we were passing the shader around, we were just calling it "mem_ctx". However, the nir_shader is (and must be for the purposes of mark-and-sweep) the mem_ctx so we might as well pass it around explicitly. --- src/glsl/nir/nir_lower_vec_to_movs.c | 14 -- 1 file changed, 8

[Mesa-dev] [PATCH v2 10.2/11] i965/vec4: Use the replicated fdot instruction in NIR

2015-09-11 Thread Jason Ekstrand
Cc: Connor Abbott --- src/mesa/drivers/dri/i965/brw_shader.cpp | 8 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 6 +++--- 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index cf9aa23.

[Mesa-dev] [PATCH v2 11/11] nir/lower_vec_to_movs: Coalesce into destinations of fdot instructions

2015-09-11 Thread Jason Ekstrand
Now that we have a replicating fdot instruction, we can actually coalesce into the destinations of vec4 instructions. We couldn't really do this before because, if the destination had to end up in .z, we couldn't reswizzle the instruction. With a replicated destination, the result ends up in all

[Mesa-dev] [PATCH v2 10.1/11] nir: Add a fdot instruction that replicates the result to a vec4

2015-09-11 Thread Jason Ekstrand
Fortunately, nir_constant_expr already auto-splats if "dst" never shows up in the constant expression field so we don't need to do anything there. Cc: Connor Abbott --- src/glsl/nir/nir.h| 6 ++ src/glsl/nir/nir_opcodes.py | 3 +++ src/glsl/nir/nir_opt_algebraic.py | 3

[Mesa-dev] [PATCH v2 07/13] nir/lower_vec_to_movs: Handle partially SSA shaders

2015-09-11 Thread Jason Ekstrand
v2 (Jason Ekstrand): - Use nir_instr_rewrite_dest - Pass impl directly into lower_vec_to_movs --- src/glsl/nir/nir_lower_vec_to_movs.c | 21 +++-- 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/src/glsl/nir/nir_lower_vec_to_movs.c b/src/glsl/nir/nir_lower_vec_to_

[Mesa-dev] [PATCH v3] i915: fixing driver crashes if too few vertices are submitted

2015-09-11 Thread Marius Predut
Comparison with a signed expression and unsigned value is converted to unsigned value, reason for minus value is interpreted as a big unsigned value. For this case the "for" loop is going into unexpected behavior. v1: Brian Paul: code style fix. v2: Ian Romanick: glDrawArrays(GL_QUADS, 0, (n * 4)

Re: [Mesa-dev] [RFC] nir: add lowering stage for user-clip-planes

2015-09-11 Thread Rob Clark
On Fri, Sep 11, 2015 at 1:20 AM, Connor Abbott wrote: > On Thu, Sep 10, 2015 at 10:54 PM, Rob Clark wrote: >> >> On Sep 10, 2015 7:39 PM, "Jason Ekstrand" wrote: >>> >>> On Thu, Sep 10, 2015 at 2:39 PM, Rob Clark wrote: >>> > From: Rob Clark >>> > >>> > So this is basically working as a loweri

Re: [Mesa-dev] [PATCH] nir: add nir_swizzle

2015-09-11 Thread Rob Clark
On Thu, Sep 10, 2015 at 8:03 PM, Erik Faye-Lund wrote: > On Thu, Sep 10, 2015 at 10:08 PM, Rob Clark wrote: >> From: Rob Clark >> >> Rather than make yet another copy of channel(), let's move it into nir. >> >> Signed-off-by: Rob Clark >> --- >> src/glsl/nir/nir_builder.h | 6

Re: [Mesa-dev] [PATCH 09/11] nir/lower_vec_to_movs: Get rid of start_idx and swizzle compacting

2015-09-11 Thread Eduardo Lima Mitev
On 09/10/2015 02:50 AM, Jason Ekstrand wrote: > Previously, we did this thing with keeping track of a separate start_idx > which was different from the iteration variable. I think this was a relic > of the way that GLSL IR implements writemasks. In NIR, if a given bit in > the writemask is unset

[Mesa-dev] [PATCH v2] i965/vec4: check writemask when bailing out at register coalesce

2015-09-11 Thread Alejandro Piñeiro
opt_register_coalesce stopped to check previous instructions to coalesce with if somebody else was writing on the same destination. This can be optimized to check if somebody else was writing to the same channels of the same destination using the writemask. Shader DB results (taking into account o

Re: [Mesa-dev] [PATCH 0/4] gallium: add support for retrieving number of texture samples

2015-09-11 Thread Brian Paul
On 09/11/2015 07:26 AM, Roland Scheidegger wrote: Am 11.09.2015 um 05:15 schrieb Ilia Mirkin: My hope was (as you can see in the last patch) to enable this for all drivers that support MS textures. I've got nv50/nvc0/r600g covered. RadeonSI will have to read the data from the texture descriptor

[Mesa-dev] nv3x xfce4 compositing issue, making good progress, need help / input

2015-09-11 Thread Hans de Goede
Hi, I've been working on trying to fix this one: https://bugs.freedesktop.org/show_bug.cgi?id=90871 And today I've more or less root caused this, it seems that some code is making glTexImage2D calls with npot width / height, which fails on nv3x (where as it works on nv4x). The bug has a simple

Re: [Mesa-dev] [PATCH 4/4] st/mesa: emit TXQS, support ARB_shader_texture_image_samples

2015-09-11 Thread Brian Paul
On 09/10/2015 09:15 PM, Ilia Mirkin wrote: This is enabled for all drivers that support MS textures. The image component of the ext is a no-op since there is no image support in gallium (yet). Signed-off-by: Ilia Mirkin --- src/mesa/state_tracker/st_extensions.c | 1 + src/mesa/state_tra

Re: [Mesa-dev] [PATCH 1/4] tgsi: add a TXQS opcode to retrieve the number of texture samples

2015-09-11 Thread Brian Paul
On 09/10/2015 09:15 PM, Ilia Mirkin wrote: Signed-off-by: Ilia Mirkin --- src/gallium/auxiliary/tgsi/tgsi_info.c | 3 ++- src/gallium/docs/source/tgsi.rst | 12 +++- src/gallium/include/pipe/p_shader_tokens.h | 1 + 3 files changed, 14 insertions(+), 2 deletions(-)

Re: [Mesa-dev] [PATCH] vc4: Try to pair up instructions when only one of them has PM bit

2015-09-11 Thread Boyan Ding
2015-08-30 15:07 GMT+08:00 Boyan Ding : > Instructions with difference in PM field can actually be paired up if > the one without PM doesn't do packing/unpacking and non-NOP > packing/unpacking operations from PM instruction aren't added to the > other without PM. > > total instructions in shared p

Re: [Mesa-dev] [PATCH] i965/vec4: check writemask when bailing out at register coalesce

2015-09-11 Thread Matt Turner
On Fri, Sep 11, 2015 at 5:18 AM, Alejandro Piñeiro wrote: > opt_register_coalesce stopped to check previous instructions to > coalesce with if somebody else was writing on the same > destination. This can be optimized to check if somebody else was > writing to the same channels of the same destina

Re: [Mesa-dev] [PATCH 1/2] r600g: Support I2D/U2D/D2I/D2U

2015-09-11 Thread Roland Scheidegger
Am 11.09.2015 um 05:14 schrieb Dave Airlie: > On 11 September 2015 at 12:37, Roland Scheidegger wrote: >> Just on a very quick glance, seems somewhat odd this function is named >> "cypress" whereas the other 64bit ones are named "cayman". >> In any case, saying enabling support for chips which hav

Re: [Mesa-dev] [PATCH 1/4] tgsi: add a TXQS opcode to retrieve the number of texture samples

2015-09-11 Thread Roland Scheidegger
Am 11.09.2015 um 05:15 schrieb Ilia Mirkin: > Signed-off-by: Ilia Mirkin > --- > src/gallium/auxiliary/tgsi/tgsi_info.c | 3 ++- > src/gallium/docs/source/tgsi.rst | 12 +++- > src/gallium/include/pipe/p_shader_tokens.h | 1 + > 3 files changed, 14 insertions(+), 2 deletio

Re: [Mesa-dev] [PATCH 0/4] gallium: add support for retrieving number of texture samples

2015-09-11 Thread Roland Scheidegger
Am 11.09.2015 um 05:15 schrieb Ilia Mirkin: > My hope was (as you can see in the last patch) to enable this for all > drivers that support MS textures. I've got nv50/nvc0/r600g covered. > > RadeonSI will have to read the data from the texture descriptor. I'm > totally unfamiliar with LLVM, the des

Re: [Mesa-dev] [PATCH] nir/lower_outputs_to_temporaries: Reparent the output name

2015-09-11 Thread Eduardo Lima Mitev
Reviewed-by: Eduardo Lima Mitev On 09/10/2015 10:58 PM, Jason Ekstrand wrote: > We copy the output, make the old output the temporary, and give the > temporary a new name. The copy keeps the pointer to the old name. This > works just fine up until the point where we lower things to SSA and dele

Re: [Mesa-dev] [PATCH] nir: Fix output variable names

2015-09-11 Thread Eduardo Lima Mitev
Oops, I missed a patch from Jason from two days ago, fixing exactly the same thing. http://lists.freedesktop.org/archives/mesa-dev/2015-September/094107.html Please ignore this one. Eduardo On 09/11/2015 09:24 AM, Eduardo Lima Mitev wrote: > Commit 1dbe4af9c9e318525fc082b542b93fb7f1e5efba > "ni

[Mesa-dev] [PATCH] i965/vec4: check writemask when bailing out at register coalesce

2015-09-11 Thread Alejandro Piñeiro
opt_register_coalesce stopped to check previous instructions to coalesce with if somebody else was writing on the same destination. This can be optimized to check if somebody else was writing to the same channels of the same destination using the writemask. Shader DB results (taking into account o

Re: [Mesa-dev] [PATCH 2/4] svga: remove useless MAX2() call

2015-09-11 Thread Iago Toral
Reviewed-by: Iago Toral Quiroga On Thu, 2015-09-10 at 09:04 -0600, Brian Paul wrote: > The sum of two unsigned ints is always >= 0. Found with Coverity. > --- > src/gallium/drivers/svga/svga_state_tss.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/gallium/driver

Re: [Mesa-dev] [PATCH] nir: Fix output variable names

2015-09-11 Thread Iago Toral
On Fri, 2015-09-11 at 09:24 +0200, Eduardo Lima Mitev wrote: > Commit 1dbe4af9c9e318525fc082b542b93fb7f1e5efba > "nir: Add a pass to lower outputs to temporary variables" messed up output > variable names. The issue can be reproduced by dumping the NIR shaders > with INTEL_DEBUG="vs,fs". > --- > s

Re: [Mesa-dev] [PATCH] ralloc: Use __attribute__((destructor)) instead of atexit(3)

2015-09-11 Thread Jose Fonseca
On 11/09/15 00:35, Erik Faye-Lund wrote: On Mon, Sep 7, 2015 at 3:54 PM, Jose Fonseca wrote: On 07/09/15 10:17, Jean-Sébastien Pédron wrote: On 04.09.2015 01:37, Matt Turner wrote: You need to test for this support in configure.ac. It's as simple as adding a call to AX_GCC_FUNC_ATTRIBUTE in

[Mesa-dev] [PATCH v2 2/2] r600: Enable fp64 on chips with native support

2015-09-11 Thread Glenn Kennard
Cypress/Cayman/Aruba, earlier r6xx/r7xx chips only support a subset of the needed fp64 ops, and don't do GL4 anyway. Signed-off-by: Glenn Kennard --- Changes since v1: Updated commit message docs/GL3.txt | 4 ++-- docs/relnotes/11.1.0.html| 2 +- src/gallium

[Mesa-dev] [PATCH v2 1/2] r600g: Support I2D/U2D/D2I/D2U

2015-09-11 Thread Glenn Kennard
Only for Cypress/Cayman/Aruba, older chips have only partial fp64 support. Uses float intermediate values so only accurate for int24 range, which matches what the blob does. Signed-off-by: Glenn Kennard --- Changes since v1: Split into two functions Make names a bit clearer which chips they app

Re: [Mesa-dev] [PATCH v2] i915: fixing driver crashes if too few vertices are submitted

2015-09-11 Thread Predut, Marius
> -Original Message- > From: Ian Romanick [mailto:i...@freedesktop.org] > Sent: Wednesday, September 09, 2015 8:54 PM > To: Predut, Marius; mesa-dev@lists.freedesktop.org > Subject: Re: [Mesa-dev] [PATCH v2] i915: fixing driver crashes if too few > vertices are submitted > > On 09/09/201

Re: [Mesa-dev] [PATCH v1] i915: fixing driver crashes if too few vertices are submitted

2015-09-11 Thread Predut, Marius
> -Original Message- > From: Eirik Byrkjeflot Anonsen [mailto:ei...@eirikba.org] > Sent: Wednesday, September 09, 2015 9:18 PM > To: Predut, Marius; mesa-dev@lists.freedesktop.org > Subject: Re: [Mesa-dev] [PATCH v1] i915: fixing driver crashes if too few > vertices are submitted > > Mar

Re: [Mesa-dev] [PATCH 08/11] i965/vec4_nir: Use partial SSA form rather than full non-SSA

2015-09-11 Thread Eduardo Lima Mitev
On 09/10/2015 02:50 AM, Jason Ekstrand wrote: > We made this switch in the FS backend some time ago and it seems to make a > number of things a bit easier. > The commit log could be a bit less abstract, like mentioning why this change helps the subsequent passes. In any case, if it was only for co

Re: [Mesa-dev] [PATCH 1/2] r600: define some values for the fetch constant offsets.

2015-09-11 Thread Edward O'Callaghan
Reviewed-by: Edward O'Callaghan -- Edward O'Callaghan edward.ocallag...@koparo.com On Fri, Sep 11, 2015, at 02:43 PM, Dave Airlie wrote: > From: Dave Airlie > > This just puts these in one place and #defines them. > > Signed-off-by: Dave Airlie > --- > src/gallium/drivers/r600/evergree

Re: [Mesa-dev] [PATCH 2/2] r600g: lower number of driver const buffers

2015-09-11 Thread Edward O'Callaghan
This series is, Reviewed-by: Edward O'Callaghan -- Edward O'Callaghan edward.ocallag...@koparo.com On Fri, Sep 11, 2015, at 08:09 PM, Glenn Kennard wrote: > Series is: > > Reviewed-by: Glenn Kennard > ___ > mesa-dev mailing list > mesa-dev@list

Re: [Mesa-dev] [PATCH 2/2] r600g: lower number of driver const buffers

2015-09-11 Thread Glenn Kennard
Series is: Reviewed-by: Glenn Kennard ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 0/4] gallium: add support for retrieving number of texture samples

2015-09-11 Thread Edward O'Callaghan
This series is, Reviewed-by: Edward O'Callaghan -- Edward O'Callaghan edward.ocallag...@koparo.com On Fri, Sep 11, 2015, at 01:15 PM, Ilia Mirkin wrote: > My hope was (as you can see in the last patch) to enable this for all > drivers that support MS textures. I've got nv50/nvc0/r600g cove

[Mesa-dev] [PATCH 17/20] i965: Upload UBO surfaces before emitting constant state packet

2015-09-11 Thread Abdiel Janulgue
Now that UBOs are uploaded as push constants. We need to obtain and append the amount of push constant entries generated by the UBO entry fetches to the 3DSTATE_CONSTANT_* packets. v2: GEN8 support Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_state_upload.c | 12 ++--

[Mesa-dev] [PATCH 18/20] i965: Program the push constants state using the gather table

2015-09-11 Thread Abdiel Janulgue
Use the gather table generated from the uniform uploads and ir_binop_ubo_load to gather and pack the constants to the gather pool. Note that the 3DSTATE_CONSTANT_* packet now refers to the gather pool generated by the resource streamer instead of the constant buffer pointed to by an offset of the

[Mesa-dev] [PATCH 15/20] i965/vec4: Append ir_binop_ubo_load entries to the gather table

2015-09-11 Thread Abdiel Janulgue
When the const block and offset are immediate values. Otherwise just fall-back to the previous method of uploading the UBO constant data to GRF using pull constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4.cpp| 13 src/mesa/drivers/dri/i965/brw_vec4

[Mesa-dev] [PATCH 16/20] i965/vec4: Pack UBO registers right after uniform registers

2015-09-11 Thread Abdiel Janulgue
Since we now consider UBOs as push constants, we need to layout our push constant register space in such a way that UBO registers are packed right after uniform registers. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 38 ++ 1 file ch

[Mesa-dev] [PATCH 19/20] i965: Disable gather push constants for null constants

2015-09-11 Thread Abdiel Janulgue
Programming null constants with gather constant tables seems to be unsupported and results in a GPU lockup even with the prescribed GPU workarounds in the bspec. Found out by trial and error that disabling HW gather constant when the constant state for a stage needs to be nullified is the only way

[Mesa-dev] [PATCH 20/20] i965: Enable push constants for UBOs

2015-09-11 Thread Abdiel Janulgue
Switches on push constants whenever we have UBO entries. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen7_wm_state.c | 2 +- src/mesa/drivers/dri/i965/gen8_ps_state.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c

[Mesa-dev] [PATCH 04/20] i965: Allocate space on the gather pool for UBO entries

2015-09-11 Thread Abdiel Janulgue
If there are UBO constant entries, append them to stage_state->push_const_size. The gather pool contains the combined entries of both ordinary uniforms and UBO constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen6_vs_state.c | 20 ++-- 1 file changed, 18 in

[Mesa-dev] [PATCH 14/20] i965/vec4: Append uniform entries to the gather table

2015-09-11 Thread Abdiel Janulgue
Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 12 src/mesa/drivers/dri/i965/brw_vec4.h | 1 + 2 files changed, 13 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 85dc372..f2b03f8 10064

[Mesa-dev] [PATCH 05/20] i965: Store gather table information in the program data

2015-09-11 Thread Abdiel Janulgue
The resource streamer is able to gather and pack sparsely-located constant data from any buffer object by a referring to a gather table This patch adds support for keeping track of these constant data fetches into a gather table. The gather table is generated from two sources. Ordinary uniform fet

[Mesa-dev] [PATCH 11/20] i965/fs: Append uniform entries to the gather table

2015-09-11 Thread Abdiel Janulgue
This patch generates the gather table entries for ordinary uniforms if they are present. The uniform constants here will later be packed together with UBO constants. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.cpp | 18 +- 1 file changed, 17 insertions(+),

[Mesa-dev] [PATCH 13/20] i965/fs: Pack UBO registers right after uniform registers

2015-09-11 Thread Abdiel Janulgue
We now have two sources of constant buffers: UBOs and ordinary uniforms. After assigning a block of push constant hw-register to normal uniforms, just pack the UBO push constant registers right after it. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.cpp | 20 ---

[Mesa-dev] [PATCH 12/20] i965/fs/nir: Append nir_intrinsic_load_ubo entries to the gather table

2015-09-11 Thread Abdiel Janulgue
When the const block and offset are immediate values. Otherwise just fall-back to the previous method of uploading the UBO constant data to GRF using pull constants. Cc: kenn...@whitecape.org Cc: ja...@jlekstrand.net Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/brw_fs.cpp

[Mesa-dev] [PATCH 10/20] i965: Include UBO parameter sizes in push constant parameters

2015-09-11 Thread Abdiel Janulgue
Now that we consider UBO constants as push constants, we need to include the sizes of the UBO's constant slots in the visitor's uniform slot sizes. This information is needed to properly pack vector constants tightly next to each other. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i96

[Mesa-dev] [PATCH 03/20] i965: Allocate space on the gather pool for plain uniforms

2015-09-11 Thread Abdiel Janulgue
Reserve space in the gather pool where the gathered uniforms are flushed. Signed-off-by: Abdiel Janulgue --- src/mesa/drivers/dri/i965/gen6_vs_state.c | 8 1 file changed, 8 insertions(+) diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.

[Mesa-dev] [PATCH 06/20] i965: Assign hw-binding table index for each UBO constant buffer.

2015-09-11 Thread Abdiel Janulgue
To be able to refer to a constant buffer, the resource streamer needs to index it with a hardware binding table entry. This blankets the ubo buffers with hardware binding table indices. Gather constants hardware fetches in 16-entry binding table blocks. So we need to use a block that is unused. S

[Mesa-dev] [PATCH 08/20] nir: Add glsl_get_array_size() wrapper.

2015-09-11 Thread Abdiel Janulgue
Signed-off-by: Abdiel Janulgue --- src/glsl/nir/nir_types.cpp | 6 ++ src/glsl/nir/nir_types.h | 2 ++ 2 files changed, 8 insertions(+) diff --git a/src/glsl/nir/nir_types.cpp b/src/glsl/nir/nir_types.cpp index 940c676..a0caf0e 100644 --- a/src/glsl/nir/nir_types.cpp +++ b/src/glsl/nir/nir

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