Re: [Mesa-dev] [PATCH 1/8] gallium: Add a cap for offset_units_unscaled

On 15/06/2016 03:04, Roland Scheidegger wrote: Am 15.06.2016 um 01:08 schrieb Axel Davy: On 15/06/2016 00:21, Roland Scheidegger wrote: Am 14.06.2016 um 23:33 schrieb Axel Davy: diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h index 396f563..7dce80a 100644 -

Re: [Mesa-dev] [PATCH 0/7] Fix ralloc/rzalloc usage v2

On 14/06/16 18:47, Martin Peres wrote: On 14/06/16 17:58, Juha-Pekka Heikkila wrote: Here is fixed version of this ralloc set. Now I got to run this on many different machines thanks to Mark Janes. There didn't show up any regressions on different gen hw. On my IVB I've been running also many di

[Mesa-dev] [PATCH 14/18] nir/glsl: add double packing support to vs and fs

--- src/compiler/glsl/link_varyings.cpp | 16 +--- src/compiler/nir/nir_lower_io.c | 16 2 files changed, 29 insertions(+), 3 deletions(-) diff --git a/src/compiler/glsl/link_varyings.cpp b/src/compiler/glsl/link_varyings.cpp index 22dc2d8..7c0d93a 100644 --- a/s

[Mesa-dev] [PATCH 11/18] i965: add indirect packing support to gs load inputs

Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 4eaf5ea..75737c1 100644 --- a/src/mesa/drive

[Mesa-dev] [PATCH 17/18] i965: enable ARB_enhanced_layouts for gen8+

--- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 5be4787..d61692d 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/

[Mesa-dev] [PATCH 08/18] nir: add glsl_dvec_type() helper

--- src/compiler/nir_types.cpp | 6 ++ src/compiler/nir_types.h | 1 + 2 files changed, 7 insertions(+) diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp index 4ea7a2f..835d53b 100644 --- a/src/compiler/nir_types.cpp +++ b/src/compiler/nir_types.cpp @@ -257,6 +257,12 @@ g

[Mesa-dev] [PATCH 13/18] nir: add glsl_double_type() helper

Reviewed-by: Kenneth Graunke --- src/compiler/nir_types.cpp | 6 ++ src/compiler/nir_types.h | 1 + 2 files changed, 7 insertions(+) diff --git a/src/compiler/nir_types.cpp b/src/compiler/nir_types.cpp index 835d53b..f694a84 100644 --- a/src/compiler/nir_types.cpp +++ b/src/compiler/nir_ty

[Mesa-dev] [PATCH 07/18] i965: add component packing support for tcs

Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 6033e5e..587549f 100644 --- a/src/mesa/drivers/dri/i

[Mesa-dev] [PATCH 16/18] i965: add double packing support to tess stages

Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 27 ++- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 9f890ca..bd37a51 100644 --- a/src/m

[Mesa-dev] [PATCH 06/18] i965: add component packing support for tes

Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 38 +++- 1 file changed, 33 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 6d695f1..6033e5e 100644 --- a/

[Mesa-dev] [PATCH 18/18] docs: mark ARB_enhanced_layouts as DONE for i965

--- docs/GL3.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index 0204695..b0573c8 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -193,11 +193,11 @@ GL 4.4, GLSL 4.40: GL_MAX_VERTEX_ATTRIB_STRIDE DONE (all drive

[Mesa-dev] [PATCH 12/18] i965: add component packing support for load_output intrinsics

--- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 38 +++- 1 file changed, 33 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 75737c1..c18e7b6 100644 --- a/src/mesa/drivers/dri/i965/brw_

[Mesa-dev] [PATCH 15/18] i965: add double support packing support to gs inputs

Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index c18e7b6..9f890ca 100644 --- a/src/mesa/drivers/dri/i965/brw

[Mesa-dev] [PATCH 10/18] i965: add indirect packing support for tcs and tes

Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 33 1 file changed, 29 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 587549f..4eaf5ea 100644 --- a/

[Mesa-dev] [PATCH 01/18] nir: add new intrinsic field for storing component offset

This offset is used for packing. Reviewed-by: Kenneth Graunke --- src/compiler/nir/nir.h| 6 ++ src/compiler/nir/nir_intrinsics.h | 12 ++-- src/compiler/nir/nir_lower_io.c | 8 src/compiler/nir/nir_print.c | 3 +++ 4 files changed, 23 insertions(+), 6

[Mesa-dev] [PATCH 03/18] glsl/nir: add new num_packed_components field

This will be used to store the total number of components used at this location when packing via ARB_enhanced_layouts. --- src/compiler/glsl/glsl_to_nir.cpp | 1 + src/compiler/glsl/ir.h | 5 +++ src/compiler/glsl/link_varyings.cpp | 74 - src/c

[Mesa-dev] [PATCH 09/18] i965: add support for packing arrays

Here we add a new helper function calc_type_size_offset() to help calculate the size of a varying once packing is taken into account. --- src/compiler/nir/nir_lower_io.c | 55 +++-- 1 file changed, 48 insertions(+), 7 deletions(-) diff --git a/src/compiler/nir/

[Mesa-dev] [PATCH 04/18] i965: enable component packing for vs and fs

--- src/mesa/drivers/dri/i965/brw_fs.cpp | 20 src/mesa/drivers/dri/i965/brw_fs.h | 5 +++-- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 29 - 3 files changed, 35 insertions(+), 19 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_f

[Mesa-dev] [PATCH 05/18] i965: add component packing support for gs

Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs.h | 2 +- src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 22 ++ 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index f

[Mesa-dev] [PATCH 02/18] nir: use the same driver location for packed varyings

Reviewed-by: Kenneth Graunke --- src/compiler/nir/nir.h| 4 ++-- src/compiler/nir/nir_lower_io.c | 28 ++-- src/mesa/drivers/dri/i965/brw_nir.c | 8 +--- src/mesa/drivers/dri/i965/brw_program.c | 4 ++-- src/mesa/state_tracker/s

[Mesa-dev] V3 ARB_enhanced_layouts packing support for i965 Gen8+

V3: - Rewrite patch 9 (add support for packing arrays) to not add hacks to the type_size() functions. - Add packing support for the load_output intrinsics (patch 12) - Add glsl_dvec_type() helper (patch 8) V2: - validation fixes patches 1-2 - added support for packing doubles now that explicit loc

Re: [Mesa-dev] [PATCH] i965: remove type_size_vec4_times_4()

On Tuesday, June 14, 2016 4:53:22 PM PDT Timothy Arceri wrote: > type_size_vec4_times_4() was introduced as a fix in 8dcf807cb43383 > however since 3810c1561 we can just use type_size_scalar() and > get the actual number of outputs we need. > > Cc: Kenneth Graunke > --- > Hi Ken, > > I'm looki

Re: [Mesa-dev] [PATCH 07/11] mesa: Fix incorrect "see also" comments

On Tue, 2016-06-14 at 19:01 -0700, Ian Romanick wrote: > From: Ian Romanick > > Signed-off-by: Ian Romanick Reviewed-by: Timothy Arceri > --- >  src/compiler/glsl/ir.h | 2 +- >  src/mesa/main/mtypes.h | 2 +- >  2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/src/compiler/gl

Re: [Mesa-dev] [PATCH 06/11] mesa: Silence unused parameter warning

On Tue, 2016-06-14 at 19:01 -0700, Ian Romanick wrote: > From: Ian Romanick > > main/pipelineobj.c: In function ‘delete_pipelineobj_cb’: > main/pipelineobj.c:110:30: warning: unused parameter ‘id’ [-Wunused- > parameter] >  delete_pipelineobj_cb(GLuint id, void *data, void *userData) >   

Re: [Mesa-dev] [PATCH 05/11] glsl: Don't monkey about with the interpolation modes

On Tue, 2016-06-14 at 19:01 -0700, Ian Romanick wrote: > From: Ian Romanick > > Previously we'd munge the interpolation mode so that later checks in > the > GLSL linker would pass.  The caused problems for similar checks in > SSO > IO validation.  Instead, make the check smarter, use the same che

Re: [Mesa-dev] [PATCH 04/11] glsl: Pack integer and double varyings as flat even if interpolation mode is none

On Tue, 2016-06-14 at 19:01 -0700, Ian Romanick wrote: > From: Ian Romanick > > Signed-off-by: Ian Romanick > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96358 > Cc: "12.0" > Cc: Gregory Hainaut > Cc: Ilia Mirkin > --- I guess we might also want to update varying_matches::compute_

Re: [Mesa-dev] [PATCH 03/11] mesa: Strip arrayness from interface block names in some IO validation

On Tue, 2016-06-14 at 19:01 -0700, Ian Romanick wrote: > From: Ian Romanick > > Outputs from the vertex shader need to be able to match > per-vertex-arrayed inputs of later stages.  Acomplish this by > stripping > one level of arrayness from the names and types of outputs going to a > per-vertex-

Re: [Mesa-dev] [PATCH 02/11] mesa: If validation fails in a debug context just emit a debug message

On Tue, 2016-06-14 at 19:01 -0700, Ian Romanick wrote: > From: Ian Romanick > > There are quite a few pipelines that desktop applications (including > a > bunch of piglit test) can expect to have run but don't meet the GLES > requirements.  Instead of failing validation, just emit a debug > messa

[Mesa-dev] [PATCH 04/11] glsl: Pack integer and double varyings as flat even if interpolation mode is none

From: Ian Romanick Signed-off-by: Ian Romanick Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96358 Cc: "12.0" Cc: Gregory Hainaut Cc: Ilia Mirkin --- src/compiler/glsl/lower_packed_varyings.cpp | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/com

[Mesa-dev] [PATCH 03/11] mesa: Strip arrayness from interface block names in some IO validation

From: Ian Romanick Outputs from the vertex shader need to be able to match per-vertex-arrayed inputs of later stages. Acomplish this by stripping one level of arrayness from the names and types of outputs going to a per-vertex-arrayed stage. Signed-off-by: Ian Romanick Bugzilla: https://bugs.f

[Mesa-dev] [PATCH 11/11] i965: Delete redundant extension enables

From: Ian Romanick A nearly identical block already exists in the gen >= 6 block above. Signed-off-by: Ian Romanick --- src/mesa/drivers/dri/i965/intel_extensions.c | 9 - 1 file changed, 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/

[Mesa-dev] [PATCH 08/11] docs: Update GL3.txt for OpenGL ES on i965-ish hardware

From: Ian Romanick Signed-off-by: Ian Romanick --- docs/GL3.txt | 28 +++- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index 0204695..dedea1a 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -222,25 +222,26 @@ GL 4.5, GLSL 4

[Mesa-dev] [PATCH 05/11] glsl: Don't monkey about with the interpolation modes

From: Ian Romanick Previously we'd munge the interpolation mode so that later checks in the GLSL linker would pass. The caused problems for similar checks in SSO IO validation. Instead, make the check smarter, use the same check in both places, and don't modify the interpolation mode. Signed-o

[Mesa-dev] [PATCH 10/11] docs: Add extensions not part of any GL or GL ES version

From: Ian Romanick Based loosely on patches submitted ages ago by Thomas Helland. Signed-off-by: Ian Romanick --- docs/GL3.txt | 56 1 file changed, 56 insertions(+) diff --git a/docs/GL3.txt b/docs/GL3.txt index 0deeaa1..b0966a2 100644

[Mesa-dev] [PATCH 02/11] mesa: If validation fails in a debug context just emit a debug message

From: Ian Romanick There are quite a few pipelines that desktop applications (including a bunch of piglit test) can expect to have run but don't meet the GLES requirements. Instead of failing validation, just emit a debug message. Signed-off-by: Ian Romanick Bugzilla: https://bugs.freedesktop.

[Mesa-dev] [PATCH 09/11] docs: Update GL3.txt for OpenGL 4.0 on i965-ish hardware

From: Ian Romanick Signed-off-by: Ian Romanick --- docs/GL3.txt | 26 +- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index dedea1a..0deeaa1 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -107,11 +107,11 @@ GL 3.3, GLSL 3.3

[Mesa-dev] [PATCH 07/11] mesa: Fix incorrect "see also" comments

From: Ian Romanick Signed-off-by: Ian Romanick --- src/compiler/glsl/ir.h | 2 +- src/mesa/main/mtypes.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/compiler/glsl/ir.h b/src/compiler/glsl/ir.h index 3629356..cd17f69 100644 --- a/src/compiler/glsl/ir.h +++ b/src/co

[Mesa-dev] [PATCH 01/11] glsl: Always strip arrayness in precision_qualifier_allowed

From: Ian Romanick Previously some callers of precision_qualifier_allowed would strip the arrayness from the type and some would not. As a result, some places would not notice that float[6], for example, needed a precision qualifier. Fixes the new piglit test no-default-float-array-precision.fr

[Mesa-dev] [PATCH 06/11] mesa: Silence unused parameter warning

From: Ian Romanick main/pipelineobj.c: In function ‘delete_pipelineobj_cb’: main/pipelineobj.c:110:30: warning: unused parameter ‘id’ [-Wunused-parameter] delete_pipelineobj_cb(GLuint id, void *data, void *userData) ^ Signed-off-by: Ian Romanick --- src/mesa/main

Re: [Mesa-dev] [PATCH] anv: Fix a harmless overflow warning

On Jun 14, 2016 4:23 PM, "Chad Versace" wrote: > > anv_pipeline_binding::index is a uint8_t, but some code assigned to it > UINT16_MAX. > --- > src/intel/vulkan/anv_pipeline.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulk

Re: [Mesa-dev] [PATCH 1/8] gallium: Add a cap for offset_units_unscaled

Am 15.06.2016 um 01:08 schrieb Axel Davy: > On 15/06/2016 00:21, Roland Scheidegger wrote: >> Am 14.06.2016 um 23:33 schrieb Axel Davy: >>> diff --git a/src/gallium/include/pipe/p_state.h >>> b/src/gallium/include/pipe/p_state.h >>> index 396f563..7dce80a 100644 >>> --- a/src/gallium/include/pipe/p

Re: [Mesa-dev] [PATCH] anv: Fix a harmless overflow warning

On Tue, Jun 14, 2016 at 4:22 PM, Chad Versace wrote: > anv_pipeline_binding::index is a uint8_t, but some code assigned to it > UINT16_MAX. > --- > src/intel/vulkan/anv_pipeline.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/

[Mesa-dev] [PATCH] anv: Fix a harmless overflow warning

anv_pipeline_binding::index is a uint8_t, but some code assigned to it UINT16_MAX. --- src/intel/vulkan/anv_pipeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index 60b7c6b..b41e11e 100644 --- a/src/intel

Re: [Mesa-dev] [PATCH 1/8] gallium: Add a cap for offset_units_unscaled

On 15/06/2016 00:21, Roland Scheidegger wrote: Am 14.06.2016 um 23:33 schrieb Axel Davy: diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h index 396f563..7dce80a 100644 --- a/src/gallium/include/pipe/p_state.h +++ b/src/gallium/include/pipe/p_state.h @@ -139,6

Re: [Mesa-dev] [PATCH 1/8] gallium: Add a cap for offset_units_unscaled

Am 14.06.2016 um 23:33 schrieb Axel Davy: > D3D9 has a different behaviour for depth bias. > > For OGL/D3D1X, the depth bias unit is the > minimal resolvable value for the depth buffer, > which depends on the format (and has different > behaviour for float depth buffers). > > For D3D9, the depth

[Mesa-dev] [PATCH 7/8] r600, r600g: Implement POLYGON_OFFSET_UNITS_UNSCALED

Empirical tests show that the polygon offset behaviour is entirely determined by the content of the PA_SU_POLY_OFFSET states, and not by the depth buffer format bound. PA_SU_POLY_OFFSET seems to directly set the parameters of the polygon offset formula, and setting 0 for PA_SU_POLY_OFFSET_DB_FMT_C

[Mesa-dev] [PATCH 5/8] radeon: Remove useless pa_su_poly_offset_db_fmt_cntl

pa_su_poly_offset_db_fmt_cntl usages were removed in previous patches. Signed-off-by: Axel Davy --- src/gallium/drivers/radeon/r600_pipe_common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h inde

[Mesa-dev] [PATCH 8/8] st/nine: Use offset_units_unscaled

offset_units_unscaled enables proper support for depth bias for gallium nine. Use it if available. Solves issues with some games using depth bias. For example: https://github.com/iXit/Mesa-3D/issues/220 Signed-off-by: Axel Davy --- src/gallium/state_trackers/nine/device9.c| 1 + src/galliu

[Mesa-dev] [PATCH 3/8] r600: Emit poly_offset states together

Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with the other poly_offset states. This will be useful to implement PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. Signed-off-by: Axel Davy --- src/gallium/drivers/r600/r600_state.c | 35 --- 1 file changed, 12 insertions(+), 23 deletio

[Mesa-dev] [PATCH 6/8] radeonsi: Implement POLYGON_OFFSET_UNITS_UNSCALED

Empirical tests show that the polygon offset behaviour is entirely determined by the content of the PA_SU_POLY_OFFSET states, and not by the depth buffer format bound. PA_SU_POLY_OFFSET seems to directly set the parameters of the polygon offset formula, and setting 0 for PA_SU_POLY_OFFSET_DB_FMT_C

[Mesa-dev] [PATCH 4/8] r600g: Emit poly_offset states together

Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with the other poly_offset states. This will be useful to implement PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. Signed-off-by: Axel Davy --- src/gallium/drivers/r600/evergreen_state.c | 36 ++ 1 file changed, 12 insertions(+), 24 deletio

[Mesa-dev] [PATCH 2/8] radeonsi: Emit poly_offset states together

Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with rasterizer poly_offset states. This will be useful to implement PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. Signed-off-by: Axel Davy --- src/gallium/drivers/radeonsi/si_state.c | 31 --- 1 file changed, 8 insertions(+), 23 deletions

[Mesa-dev] [PATCH 1/8] gallium: Add a cap for offset_units_unscaled

D3D9 has a different behaviour for depth bias. For OGL/D3D1X, the depth bias unit is the minimal resolvable value for the depth buffer, which depends on the format (and has different behaviour for float depth buffers). For D3D9, the depth bias unit is 1.0f. Signed-off-by: Axel Davy --- src/gal

[Mesa-dev] [PATCH] vc4: fix vc4_resource_from_handle() stride calculation

The expected stride calculation is completely wrong. It should ultimately be multiplying cpp and width rather than dividing. The width also needs to be aligned to the tiling width first before converting to stride bytes. The whole stride check here is possibly pointless. Any buffers which were all

Re: [Mesa-dev] [PATCH] radeon: remove unnecessary checks

On Tue, 2016-06-14 at 22:44 +0200, Jakob Sinclair wrote: > On 2016-06-14 20:39, Jan Vesely wrote: > > I really disagree here. The conditions check whether swizzle is > > between > > X and W (as in, only X,Y,Z,W are allowed). The fact that X maps to > > 0 is > > irrelevant. removing the checks impai

[Mesa-dev] [PATCH 4/5] radeon/vce: sort cpb by ref list for VAAPI encode

Signed-off-by: Boyuan Zhang --- src/gallium/drivers/radeon/radeon_vce.c | 52 +++-- 1 file changed, 49 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index 549d999..0ff07eb 100644 --- a/src

[Mesa-dev] [PATCH 1/5] radeon/vce: add vce structures

Signed-off-by: Boyuan Zhang --- src/gallium/drivers/radeon/radeon_vce.h | 297 1 file changed, 297 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h index e438148..da61285 100644 --- a/src/gallium/driver

Re: [Mesa-dev] [PATCH] radeon: remove unnecessary checks

On 2016-06-14 20:39, Jan Vesely wrote: I really disagree here. The conditions check whether swizzle is between X and W (as in, only X,Y,Z,W are allowed). The fact that X maps to 0 is irrelevant. removing the checks impairs readability of the code because the lower bound is now inferred (by being

[Mesa-dev] [PATCH 3/5] radeon/vce: use vce structures for encoding

Signed-off-by: Boyuan Zhang --- src/gallium/drivers/radeon/radeon_vce.c| 180 ++- src/gallium/drivers/radeon/radeon_vce.h| 2 +- src/gallium/drivers/radeon/radeon_vce_40_2_2.c | 425 + src/gallium/drivers/radeon/radeon_vce_50.c | 183 ++---

[Mesa-dev] [PATCH 2/5] vl: add parameters for VAAPI encode

Signed-off-by: Boyuan Zhang --- src/gallium/include/pipe/p_video_state.h | 13 + 1 file changed, 13 insertions(+) diff --git a/src/gallium/include/pipe/p_video_state.h b/src/gallium/include/pipe/p_video_state.h index d353be6..d519d17 100644 --- a/src/gallium/include/pipe/p_video_sta

[Mesa-dev] [PATCH 5/5] st/va: enable h264 VAAPI encode

Signed-off-by: Boyuan Zhang --- src/gallium/state_trackers/va/buffer.c | 6 ++ src/gallium/state_trackers/va/config.c | 104 +++--- src/gallium/state_trackers/va/context.c| 72 - src/gallium/state_trackers/va/image.c | 126 +++--- src/ga

Re: [Mesa-dev] [PATCH 0/7] Fix ralloc/rzalloc usage v2

Rob Clark writes: > I (and I expect Eric too) would appreciate it if you went ahead and > replaced the current use of non-"z" versions in code that you can't > test w/ the "z" versions. That way we can switch over to non-zero'ing > on our own time, rather than getting a surprise next time we > p

[Mesa-dev] [Bug 96517] [llvmpipe] piglit arb_uniform_buffer_object-rendering-dsa regression

https://bugs.freedesktop.org/show_bug.cgi?id=96517 Roland Scheidegger changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

Re: [Mesa-dev] [PATCH] i965/fs: Fix regs_written for SIMD-lowered instructions some more.

Iago Toral writes: > On Fri, 2016-06-10 at 22:39 -0700, Francisco Jerez wrote: >> ISTR having suggested this during review of the recent FP64 changes to >> the SIMD lowering pass, but it doesn't look like it was taken into >> account in the end. Using the fs_reg::component_size helper instead >>

Re: [Mesa-dev] [PATCH] radeon: remove unnecessary checks

On Tue, 2016-06-14 at 20:19 +0200, Jakob Sinclair wrote: > On 2016-06-13 12:02, Nicolai Hähnle wrote: > > > > Meh. This is the kind of thing where Coverity should perhaps just > > shut  > > up :/ > > I do agree with you that Coverity should perhaps shut up about this  > kinda thing > but I couldn

[Mesa-dev] [PATCH] V2 radeon: remove unnecessary checks

PIPE_SWIZZLE_X is always 0 and desc->swizzle is an unsigned char meaning that desc->swizzle can never be smaller then PIPE_SWIZZLE_X. Removing these checks doesn't change the code path at all because they would always give the same result. Issue discovered by Coverity. V2: Removed "- PIPE_SWIZZLE_

Re: [Mesa-dev] [PATCH] radeon: remove unnecessary checks

On 2016-06-13 12:02, Nicolai Hähnle wrote: Meh. This is the kind of thing where Coverity should perhaps just shut up :/ I do agree with you that Coverity should perhaps shut up about this kinda thing but I couldn't see a reason to have these checks in the code. They really didn't contribute

Re: [Mesa-dev] [PATCH 3/3] radeonsi: fix undefined left-shift into sign bit

Reviewed-by: Marek Olšák Marek On Tue, Jun 14, 2016 at 4:37 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > --- > src/gallium/drivers/radeonsi/cik_sdma.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/src/gallium/drivers/radeonsi/cik_sdma.c > b/src/gallium/dr

Re: [Mesa-dev] [PATCH 05/10] gallium: change end_query() to return boolean

On Tue, Jun 14, 2016 at 6:24 PM, Ilia Mirkin wrote: > On Tue, Jun 14, 2016 at 12:19 PM, Nicolai Hähnle wrote: >> On 14.06.2016 17:57, Rob Clark wrote: >>> >>> From: Rob Clark >>> >>> s/bool/boolean/ to make it match the other APIs. >> >> >> Please no. C has finally grown a proper bool type, we s

Re: [Mesa-dev] [PATCH 01/10] gallium: cleanup set_tess_state

On Tue, Jun 14, 2016 at 12:30 PM, Nicolai Hähnle wrote: > On 14.06.2016 18:02, Ilia Mirkin wrote: >> >> Can you explain the motivation behind this change? I'm adding a >> ->set_window_rectangles thing which also takes multiple parameters. >> What's the advantage of stuffing things into a struct fi

Re: [Mesa-dev] [PATCH v2] swr: automake: don't ship LLVM version specific generated sources

On 14 June 2016 at 18:06, Rowley, Timothy O wrote: > >> On Jun 13, 2016, at 8:03 PM, Rowley, Timothy O >> wrote: >> >> A clean tree build works with this version, but distcheck fails: >> >> ... >> rm -f config.status config.cache config.log configure.lineno >> config.status.lineno >> rm -f Make

Re: [Mesa-dev] [PATCH (backport)] radeonsi: mark buffer texture range valid for shader images

Reviewed-by: Marek Olšák Marek On Tue, Jun 14, 2016 at 6:00 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > When a shader image view into a buffer texture can be written to, the buffer's > valid range must be updated, or subsequent transfers may incorrectly skip > synchronization. > > Thi

Re: [Mesa-dev] [PATCH 0/7] Fix ralloc/rzalloc usage v2

I (and I expect Eric too) would appreciate it if you went ahead and replaced the current use of non-"z" versions in code that you can't test w/ the "z" versions. That way we can switch over to non-zero'ing on our own time, rather than getting a surprise next time we pull/rebase I think it's only

Re: [Mesa-dev] [PATCH v2] swr: automake: don't ship LLVM version specific generated sources

> On Jun 13, 2016, at 8:03 PM, Rowley, Timothy O > wrote: > > A clean tree build works with this version, but distcheck fails: > > ... > rm -f config.status config.cache config.log configure.lineno > config.status.lineno > rm -f Makefile > ERROR: files left in build directory after distclean:

[Mesa-dev] [PATCH 2/2] winsys/radeon: use the common job queue for multithreaded command submission v2

From: Marek Olšák v2: fixup after renaming to util_queue_fence --- src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 22 src/gallium/winsys/radeon/drm/radeon_drm_cs.h | 4 +- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 63 ++- src/gallium/winsys/radeon

[Mesa-dev] [PATCH 1/2] gallium/util: import the multithreaded job queue from amdgpu winsys (v2)

From: Marek Olšák v2: rename the event to util_queue_fence --- src/gallium/auxiliary/Makefile.sources| 2 + src/gallium/auxiliary/util/u_queue.c | 129 ++ src/gallium/auxiliary/util/u_queue.h | 80 src/gallium/winsys/amdgpu/dr

Re: [Mesa-dev] [PATCH 06/10] gallium/util: add util_copy_index_buffer() helper

On Tue, Jun 14, 2016 at 12:32 PM, Nicolai Hähnle wrote: > On 14.06.2016 17:57, Rob Clark wrote: >> >> From: Rob Clark >> >> Note there was previously a util_set_index_buffer() which was only used >> by svga. Replace this. >> >> (The util_copy_* naming is more consistent with other u_inlines/ >>

Re: [Mesa-dev] [PATCH 05/10] gallium: change end_query() to return boolean

On Tue, Jun 14, 2016 at 12:24 PM, Ilia Mirkin wrote: > On Tue, Jun 14, 2016 at 12:19 PM, Nicolai Hähnle wrote: >> On 14.06.2016 17:57, Rob Clark wrote: >>> >>> From: Rob Clark >>> >>> s/bool/boolean/ to make it match the other APIs. >> >> >> Please no. C has finally grown a proper bool type, we

Re: [Mesa-dev] [PATCH 06/10] gallium/util: add util_copy_index_buffer() helper

On 14.06.2016 17:57, Rob Clark wrote: From: Rob Clark Note there was previously a util_set_index_buffer() which was only used by svga. Replace this. (The util_copy_* naming is more consistent with other u_inlines/ u_framebuffer helpers) Looks like you're changing semantics in a few places:

Re: [Mesa-dev] [PATCH 01/10] gallium: cleanup set_tess_state

On 14.06.2016 18:02, Ilia Mirkin wrote: Can you explain the motivation behind this change? I'm adding a ->set_window_rectangles thing which also takes multiple parameters. What's the advantage of stuffing things into a struct first? FWIW, I tend to be mildly supportive of changes like this. At

Re: [Mesa-dev] [PATCH 01/10] gallium: cleanup set_tess_state

On Tue, Jun 14, 2016 at 12:13 PM, Ilia Mirkin wrote: > [trimming cc's because mesa-dev hates them] > > On Tue, Jun 14, 2016 at 12:09 PM, Rob Clark wrote: >> On Tue, Jun 14, 2016 at 12:02 PM, Ilia Mirkin wrote: >>> Can you explain the motivation behind this change? I'm adding a >>> ->set_window_r

Re: [Mesa-dev] [PATCH 05/10] gallium: change end_query() to return boolean

On Tue, Jun 14, 2016 at 12:19 PM, Nicolai Hähnle wrote: > On 14.06.2016 17:57, Rob Clark wrote: >> >> From: Rob Clark >> >> s/bool/boolean/ to make it match the other APIs. > > > Please no. C has finally grown a proper bool type, we should use it where > possible. If anything, make the patch go i

Re: [Mesa-dev] [PATCH 04/10] gallium: make image_view const

Patches 2-4: Reviewed-by: Nicolai Hähnle On 14.06.2016 17:57, Rob Clark wrote: From: Rob Clark Signed-off-by: Rob Clark --- src/gallium/drivers/ddebug/dd_context.c | 2 +- src/gallium/drivers/ilo/ilo_state.c | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 4 ++--

Re: [Mesa-dev] [PATCH 0/7] Fix ralloc/rzalloc usage v2

On 14.06.2016 17:07, Ilia Mirkin wrote: I assume you've only tested this with i965? ralloc is also used by st/mesa, freedreno, and vc4. Should probably try to coordinate with the responsible developers before making the big switch. In st_glsl_to_tgsi.c, there is one ralloc(mem_ctx, function_ent

Re: [Mesa-dev] [PATCH 01/10] gallium: cleanup set_tess_state

On Tue, Jun 14, 2016 at 12:02 PM, Ilia Mirkin wrote: > Can you explain the motivation behind this change? I'm adding a > ->set_window_rectangles thing which also takes multiple parameters. > What's the advantage of stuffing things into a struct first? consistency with the other pipe->set_xyz APIs

Re: [Mesa-dev] [PATCH 00/10] gallium: resequencer layer

On 06/14/2016 10:07 AM, Rob Clark wrote: bleh, seems like max-cc's is still too low on mesa-dev, and some of the patches didn't get through. You can also find them here: https://urldefense.proofpoint.com/v2/url?u=https-3A__github.com_freedreno_mesa_commits_wip-2Drsq&d=CwIGaQ&c=Sqcl0Ez6M0X8a

Re: [Mesa-dev] [PATCH v2] glsl: reuse main extension table to appropriate restrict extensions

On Mon, Jun 13, 2016 at 11:43:57PM -0400, Ilia Mirkin wrote: > Previously we were only restricting based on ES/non-ES-ness and whether > the overall enable bit had been flipped on. However we have been adding > more fine-grained restrictions, such as based on compat profiles, as > well as specific

Re: [Mesa-dev] [PATCH 05/10] gallium: change end_query() to return boolean

On 14.06.2016 17:57, Rob Clark wrote: From: Rob Clark s/bool/boolean/ to make it match the other APIs. Please no. C has finally grown a proper bool type, we should use it where possible. If anything, make the patch go in the other direction. Nicolai Signed-off-by: Rob Clark --- src/g

Re: [Mesa-dev] [PATCH 01/10] gallium: cleanup set_tess_state

[trimming cc's because mesa-dev hates them] On Tue, Jun 14, 2016 at 12:09 PM, Rob Clark wrote: > On Tue, Jun 14, 2016 at 12:02 PM, Ilia Mirkin wrote: >> Can you explain the motivation behind this change? I'm adding a >> ->set_window_rectangles thing which also takes multiple parameters. >> What'

[Mesa-dev] [PATCH 01/10] gallium: cleanup set_tess_state

From: Rob Clark The reset of the state APIs take state structs, rather than inline parameters (with the exception of a couple which just amount to a single uint). This makes the API more regular and simplifies autogeneration of the gallium state related APIs. Signed-off-by: Rob Clark --- src/

Re: [Mesa-dev] [PATCH 00/10] gallium: resequencer layer

bleh, seems like max-cc's is still too low on mesa-dev, and some of the patches didn't get through. You can also find them here: https://github.com/freedreno/mesa/commits/wip-rsq BR, -R On Tue, Jun 14, 2016 at 11:57 AM, Rob Clark wrote: > From: Rob Clark > > So, I know there were a couple c

[Mesa-dev] [PATCH 10/10] RFC: gallium: add resequencer driver (INCOMPLETE)

From: Rob Clark NOTE: the mako templates turned out to be a bit more hairy than expected.. maybe they would be better split out, or maybe there is something that could be done more simply. It more or less is my first time doing much with mako. But, I have changed how the state tracking / emit /

[Mesa-dev] [PATCH 05/10] gallium: change end_query() to return boolean

From: Rob Clark s/bool/boolean/ to make it match the other APIs. Signed-off-by: Rob Clark --- src/gallium/drivers/freedreno/freedreno_query.c | 2 +- src/gallium/drivers/i915/i915_query.c | 2 +- src/gallium/drivers/ilo/ilo_query.c | 2 +- src/gallium/drivers/llvmpipe/lp_

[Mesa-dev] [PATCH 02/10] gallium: make shader_buffers const

From: Rob Clark Be consistent with the rest of the "set_xyz" state interfaces. Signed-off-by: Rob Clark --- src/gallium/drivers/ddebug/dd_context.c | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 6 +++--- src/gallium/drivers/radeonsi/si_descriptors.c | 4 ++-- src/gallium/driver

[Mesa-dev] [PATCH 03/10] gallium: make constant_buffer const

From: Rob Clark Signed-off-by: Rob Clark --- src/gallium/drivers/ddebug/dd_context.c | 2 +- src/gallium/drivers/freedreno/freedreno_state.c | 2 +- src/gallium/drivers/i915/i915_state.c | 2 +- src/gallium/drivers/ilo/ilo_state.c | 2 +- src/gallium/drivers/llvmpi

[Mesa-dev] [PATCH 04/10] gallium: make image_view const

From: Rob Clark Signed-off-by: Rob Clark --- src/gallium/drivers/ddebug/dd_context.c | 2 +- src/gallium/drivers/ilo/ilo_state.c | 2 +- src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 4 ++-- src/gallium/drivers/radeonsi/si_descriptors.c | 6 +++--- src/gallium/drivers/softpipe

Re: [Mesa-dev] [PATCH 01/10] gallium: cleanup set_tess_state

Can you explain the motivation behind this change? I'm adding a ->set_window_rectangles thing which also takes multiple parameters. What's the advantage of stuffing things into a struct first? -ilia On Tue, Jun 14, 2016 at 11:57 AM, Rob Clark wrote: > From: Rob Clark > > The reset of the stat

[Mesa-dev] [PATCH 06/10] gallium/util: add util_copy_index_buffer() helper

From: Rob Clark Note there was previously a util_set_index_buffer() which was only used by svga. Replace this. (The util_copy_* naming is more consistent with other u_inlines/ u_framebuffer helpers) Signed-off-by: Rob Clark --- src/gallium/auxiliary/util/u_helpers.c | 15 ---

[Mesa-dev] [PATCH (backport)] radeonsi: mark buffer texture range valid for shader images

From: Nicolai Hähnle When a shader image view into a buffer texture can be written to, the buffer's valid range must be updated, or subsequent transfers may incorrectly skip synchronization. This fixes a bug that was exposed in Xephyr by PBO acceleration for glReadPixels, reported by Michel Dän

[Mesa-dev] [PATCH 08/10] gallium/util: add util_copy_vertex_buffer helper

From: Rob Clark Signed-off-by: Rob Clark --- src/gallium/auxiliary/util/u_inlines.h | 17 + 1 file changed, 17 insertions(+) diff --git a/src/gallium/auxiliary/util/u_inlines.h b/src/gallium/auxiliary/util/u_inlines.h index ebaf368..93171d9 100644 --- a/src/gallium/auxiliary/u

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