https://bugs.freedesktop.org/show_bug.cgi?id=100876
--- Comment #3 from Balázs Vinarz ---
The current patch is sending the data line-by-line instead of sending the whole
output at the exit. Right?
Maybe the exit status won't affect the data generation.
--
You are receiving this mail because:
Yo
https://bugs.freedesktop.org/show_bug.cgi?id=100876
--- Comment #2 from Balázs Vinarz ---
Yes the files are exist, but there is no data.
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You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.___
m
On 28/04/17 09:11 PM, Marek Olšák wrote:
> On Thu, Apr 27, 2017 at 8:47 AM, Michel Dänzer wrote:
>> On 27/04/17 10:15 AM, Timothy Arceri wrote:
>>> Modern disks are extremely large and are only going to get bigger.
>>> Usage has shown frequent Mesa upgrades can result in the cache
>>> growing very
The matrix used for YCbCr to RGB is listed in Wiki
https://en.wikipedia.org/wiki/YCbCr;
There is minor error in the matrix constant: 0.0625=16/256 should be 16.0/255,
and 0.5=128.0/256 should be 128.0/255.
Note that conversion from a 0-255 byte number to 0-1.0 float is to divide by 255
instead o
Yes, We can. Will do it
-Original Message-
From: Eric Anholt [mailto:e...@anholt.net]
Sent: Saturday, April 29, 2017 6:02 AM
To: Lin, Johnson ; mesa-dev@lists.freedesktop.org
Cc: Lin, Johnson
Subject: Re: [Mesa-dev] [PATCH] fix minor error in YUV2RGB matrix used in shader
Johnson Lin
https://bugs.freedesktop.org/show_bug.cgi?id=100613
--- Comment #16 from Roland Scheidegger ---
(In reply to Bruce Cherniak from comment #15)
> This isn't really an OpenSWR (Drivers/Gallium/swr) specific problem. Is
> there another component that it should be moved to?
We don't really have an a
> On Apr 28, 2017, at 3:20 PM, Ilia Mirkin wrote:
>
> On Fri, Apr 28, 2017 at 3:58 PM, Cherniak, Bruce
> wrote:
>>
>>> On Apr 27, 2017, at 7:50 PM, Ilia Mirkin wrote:
>>>
>>> On Thu, Apr 27, 2017 at 8:45 PM, Cherniak, Bruce
>>> wrote:
> On Apr 27, 2017, at 7:38 PM, Ilia Mirkin wr
https://bugs.freedesktop.org/show_bug.cgi?id=100613
--- Comment #15 from Bruce Cherniak ---
This isn't really an OpenSWR (Drivers/Gallium/swr) specific problem. Is there
another component that it should be moved to?
--
You are receiving this mail because:
You are the QA Contact for the bug.
Yo
> -Original Message-
> From: Chad Versace [mailto:chadvers...@chromium.org]
> Sent: Saturday, April 29, 2017 12:19 AM
> To: Emil Velikov
> Cc: Xu, Randy ; mesa-dev@lists.freedesktop.org
> Subject: Re: [Mesa-dev] [PATCH] i965: Solve Android native fence fd double
> close issue
>
> On Thu 2
The Ironlake documentation is terrible, so it's unclear whether or not
this field exists there. It definitely doesn't exist on Sandybridge
and later. It definitely does exist on G45.
We haven't been setting it for our normal vertex attributes - just
the SGVs (VertexID, InstanceID, BaseVertex, Ba
Samuel Iglesias Gonsálvez writes:
> The regioning parameters are now properly set by convert_to_hw_regs()
> and we don't need to fix them in the generator.
>
It would be worth stressing here that the "fix" previously done in the
generator was strictly speaking wrong for any non-identity regions.
Samuel Iglesias Gonsálvez writes:
> On gen7, the swizzles used in DF align16 instructions works for element
> size of 32 bits, so we can address only 2 consecutive DFs. As we assumed that
> in the rest of the code and prepare the instructions for this
> (scalarize_df()),
> we need to set it to t
Samuel Iglesias Gonsálvez writes:
> From IVB PRM, vol4, part3, "General Restrictions on Regioning
> Parameters":
>
> "If ExecSize = Width and HorzStride ≠ 0, VertStride must
>be set to Width * HorzStride."
>
> In next patch, we are going to modify the region parameter for
> uniforms and vgr
Samuel Iglesias Gonsálvez writes:
> It was setting XYWZ swizzle and writemask to all uniforms, no matter if they
> were a vector or scalar, so this can lead to problems when loading them
> to the push constant buffer.
>
> Moreover, 'shift' calculation was designed to calculate the offset in
> DWO
On Friday, April 28, 2017 3:02:01 PM PDT Eric Anholt wrote:
> Johnson Lin writes:
>
> > The matrix used for YCbCr to RGB is listed in Wiki
> > https://en.wikipedia.org/wiki/YCbCr;
> > There is minor error in the matrix constant: 0.0625=16/256 should be
> > 16.0/255,
> > and 0.5=128.0/256 shoul
Hi,
This series shrinks various gallium structures and removes
set_index_buffer in order to decrease CPU overhead.
PART 1: Performance results
All testing below was done with radeonsi, and I used the drawoverhead
microbenchmark from mesa/demos ported to piglit and using GL 3.0
Compat and GL 3.2
From: Marek Olšák
---
src/mesa/state_tracker/st_draw.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c
index 3fee0cd..8b657be 100644
--- a/src/mesa/state_tracker/st_draw.c
+++ b/src/mesa/state_trac
From: Marek Olšák
For faster initialization of non-indirect draws.
---
src/gallium/auxiliary/util/u_draw.c | 4 +-
src/gallium/auxiliary/util/u_dump_state.c| 15 ---
src/gallium/auxiliary/util/u_vbuf.c | 8 ++--
src/gallium/docs/source/screen.rst | 2 +-
sr
On Monday, April 24, 2017 3:19:08 PM PDT Rafael Antognolli wrote:
> We need to use some enums inside genX_state_upload.c, but including the
> whole header will cause several conflicts between things defined in this
> header and the genxml auto-generated headers.
>
> So create a separate header tha
On Fri, 2017-04-28 at 19:25 +0100, Emil Velikov wrote:
> From: Emil Velikov
>
> Split the target to allow faster builds for each run.
>
> The overall build time will be more, yet Travis runs multiple builds in
> parallel so we're limited by the slowest one.
>
> Things are split roughly as:
> -
On Tuesday, April 25, 2017 1:59:15 PM PDT Rafael Antognolli wrote:
> Use an alias, so we can set the same value as the #define's.
>
> v3:
>- Call it "SO Buffer MOCS" to follow the most common naming scheme.
>- Add alias for gen7 and gen75 too (Ken).
>
> Signed-off-by: Rafael Antognolli
>
On Monday, April 24, 2017 3:18:57 PM PDT Rafael Antognolli wrote:
> Set the type of some fields, instead of prefix. Also fix the
> SAMPLER_BORDER_COLOR_STATE fields of gen5.xml.
>
> Signed-off-by: Rafael Antognolli
We need to squash this with the previous patch or else it breaks the
build. I'm
This is:
Reviewed-by: Andres Gomez
On Fri, 2017-04-28 at 19:25 +0100, Emil Velikov wrote:
> From: Emil Velikov
>
> Should make things a bit more consistent across the board.
>
> Cc: Eric Engestrom
> CC: Andres Gomez
> Signed-off-by: Emil Velikov
> ---
> .travis.yml | 8 +++-
> 1 file
This is:
Reviewed-by: Andres Gomez
On Fri, 2017-04-28 at 19:25 +0100, Emil Velikov wrote:
> From: Emil Velikov
>
> Provides a small, but consistent improvement.
> Example numbers of the jobs added later in the series.
>
> "make loaders/classic DRI" - 1s
> "scons SWR" - 6s
>
> Signed-off-by:
On Monday, April 24, 2017 3:19:32 PM PDT Rafael Antognolli wrote:
> On this patch, we port:
>- brw_polygon_stipple
>- brw_polygon_stipple_offset
>- brw_line_stipple
>- brw_drawing_rect
>
> v2:
>- Also emit states for gen4-5 with this code.
>
> Signed-off-by: Rafael Antognolli
On Fri, Apr 14, 2017 at 10:37:49AM -0700, Jason Ekstrand wrote:
> The command is really operating on a Queue not a command buffer and the
> nearest object to that with an allocator is VkDevice.
>
> Cc: "17.0"
Should this have been Cc'ed to mesa-stable instead of mesa-dev?
___
Mesa 17.0.5 is now available.
In this release we have:
Nouveau has seen fixed a problem regarding the instructions emission
with GF100's ISA encoding.
Intel drivers have several fixes. The Vulkan one has some corrections
for flusing the cache (VF and texture) while setting up a null surface
sta
On Monday, April 24, 2017 3:19:29 PM PDT Rafael Antognolli wrote:
> Some code that was placed in brw_draw_upload.c and exported to be used
> by gen8+ was also moved to genX_state_upload, and the respective symbols
> are not exported anymore.
>
> v2:
>- Remove code from brw_draw_upload too
>
Johnson Lin writes:
> The matrix used for YCbCr to RGB is listed in Wiki
> https://en.wikipedia.org/wiki/YCbCr;
> There is minor error in the matrix constant: 0.0625=16/256 should be 16.0/255,
> and 0.5=128.0/256 should be 128.0/255.
> Note that conversion from a 0-255 byte number to 0-1.0 floa
2017-04-28 21:38 GMT+02:00 Rob Herring :
> On Fri, Apr 28, 2017 at 10:58 AM, Mauro Rossi
> wrote:
> > 2017-04-28 14:23 GMT+02:00 Rob Herring :
> >> On Thu, Apr 27, 2017 at 9:50 PM, Chih-Wei Huang <
> cwhu...@android-x86.org> wrote:
> >>> A typo in the subject?
> >>> (s/building/build/)
> >>
> >>
https://bugs.freedesktop.org/show_bug.cgi?id=100876
--- Comment #1 from Edmondo Tommasina ---
There is a patch in git master that maybe helps:
https://cgit.freedesktop.org/mesa/mesa/commit/?id=5589fd89e1337a03c947840b344f515cb1d3a96d
Just to be sure: Are you seeing empty fps and cpu files in /m
On Fri, Apr 28, 2017 at 2:11 PM, Gregory Hainaut
wrote:
> I extended the struct __DRIbackgroundCallableExtensionRec because
> the other function pointer is already related for glthread.
>
> DRI2/DRI3 glx code path check that display can be locked (basically
> XInitThread was called)
>
> EGL code p
Acked-by: Jason Ekstrand
On Mon, Apr 24, 2017 at 8:28 AM, Rob Clark wrote:
> This is equivalent to what mesa/st does in glsl_to_tgsi. For most hw
> there isn't a particularly good reason to treat these differently.
>
> Signed-off-by: Rob Clark
> ---
> v2: do the interface_type thing properly
From: Marek Olšák
It works now.
---
src/gallium/drivers/radeonsi/si_state_shaders.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index a3ff511..a5260f5 100644
--- a/src/gallium/dr
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_state_shaders.c | 32 +++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 16fb522..a3ff511 100644
--
From: Marek Olšák
at least I think this is correct.
---
src/gallium/drivers/radeonsi/si_shader.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 06ad370..8bdde1a 100644
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 1 -
src/gallium/drivers/radeonsi/si_shader_internal.h | 1 -
.../drivers/radeonsi/si_shader_tgsi_setup.c| 53 +-
3 files changed, 22 insertions(+), 33 deletions(-)
diff --git a/src/gallium
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 427afd5..5ee8c6f 100644
--- a/src/gallium/drivers/radeonsi/si_shad
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_compute.c | 2 +-
src/gallium/drivers/radeonsi/si_shader.c| 6 ++
src/gallium/drivers/radeonsi/si_shader.h| 6 ++
src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +-
4 files changed, 6 insertions(+), 10 delet
From: Marek Olšák
Picked from a different branch. When we stop using the scratch patching,
this function will not be called.
---
src/gallium/drivers/radeonsi/si_state_shaders.c | 101 +---
1 file changed, 55 insertions(+), 46 deletions(-)
diff --git a/src/gallium/drivers/rad
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_state_shaders.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index d5de749..ac53eff 100644
--- a/src/gallium/drivers/radeonsi/si_stat
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 16
src/gallium/drivers/radeonsi/si_shader.h | 8
2 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index
From: Marek Olšák
LLVM 3.8:
- had broken indirect resource indexing
- didn't have scratch coalescing
- was the last user of problematic v16i8
- only supported OpenGL 4.1
This leaves us with LLVM 3.9 and LLVM 4.0 support for Mesa 17.2.
---
configure.ac | 4
From: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 2 +-
src/gallium/drivers/radeonsi/si_shader.c| 18 --
src/gallium/drivers/radeonsi/si_shader_internal.h | 1 -
src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 1 -
4 files changed,
From: Marek Olšák
Cc: 17.1
---
src/amd/common/gfx9d.h | 4
src/gallium/drivers/radeonsi/si_state.c | 21 ++---
2 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/src/amd/common/gfx9d.h b/src/amd/common/gfx9d.h
index e295a1d..787d0a9 100644
---
From: Marek Olšák
for scratch support
---
src/gallium/drivers/radeonsi/si_shader.c| 1 +
src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 19 +--
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gall
From: Marek Olšák
and rename to si_llvm_optimize_module.
---
src/gallium/drivers/radeonsi/si_shader.c| 20
src/gallium/drivers/radeonsi/si_shader_internal.h | 3 +--
src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 10 +++---
3 files changed, 12 inser
I extended the struct __DRIbackgroundCallableExtensionRec because
the other function pointer is already related for glthread.
DRI2/DRI3 glx code path check that display can be locked (basically
XInitThread was called)
EGL code path is more tricky as we don't want to pull X11 header. Instead
the c
Otherwise print a warning
Signed-off-by: Gregory Hainaut
---
src/gallium/state_trackers/dri/dri_context.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/gallium/state_trackers/dri/dri_context.c
b/src/gallium/state_trackers/dri/dri_context.c
index 92d79849c4..
Hello,
Following the discussion from
https://lists.freedesktop.org/archives/mesa-dev/2017-April/153137.html
A check was added to ensure that X11 display can be locked. It should be enough
to ensure thread safety between X11 and glthread.
I also did the check on DRI3 as I'm not 100% sure that it
Not much effect on dota2/talos, but positive on deferred.
Signed-off-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_pipeline.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index d6989137a55..7340675915f 100644
---
https://bugs.freedesktop.org/show_bug.cgi?id=100741
Chad Versace changed:
What|Removed |Added
CC||chadvers...@chromium.org
--
You are rec
https://bugs.freedesktop.org/show_bug.cgi?id=100876
Bug ID: 100876
Summary: Variable GALLIUM_HUD_DUMP_DIR is not working with Wine
LFS
Product: Mesa
Version: 17.0
Hardware: x86-64 (AMD64)
OS: Linux (All)
On Tue, Apr 25, 2017 at 8:24 AM, Nicolai Hähnle wrote:
> On 24.04.2017 18:22, Marek Olšák wrote:
>>
>> From: Marek Olšák
>>
>> Basically, don't load GRID_SIZE or BLOCK_SIZE if they are unused,
>> determine
>> whether to load BLOCK_ID for each component separately, and set the number
>> of THREAD_
On Fri, Apr 28, 2017 at 3:58 PM, Cherniak, Bruce
wrote:
>
>> On Apr 27, 2017, at 7:50 PM, Ilia Mirkin wrote:
>>
>> On Thu, Apr 27, 2017 at 8:45 PM, Cherniak, Bruce
>> wrote:
>>>
On Apr 27, 2017, at 7:38 PM, Ilia Mirkin wrote:
Erm, so ... what happens if I render to FB1, then rend
> On Apr 27, 2017, at 7:50 PM, Ilia Mirkin wrote:
>
> On Thu, Apr 27, 2017 at 8:45 PM, Cherniak, Bruce
> wrote:
>>
>>> On Apr 27, 2017, at 7:38 PM, Ilia Mirkin wrote:
>>>
>>> Erm, so ... what happens if I render to FB1, then render to FB2, then
>>> render to FB1 again (and I have blending en
On 28.04.2017 03:15, Timothy Arceri wrote:
On 26/04/17 18:27, Samuel Pitoiset wrote:
On 04/26/2017 10:05 AM, Nicolai Hähnle wrote:
On 24.04.2017 12:36, Samuel Pitoiset wrote:
Because the variable declaration holds more information than
the dereference. Note that an image is considered bindless
On Fri, Apr 28, 2017 at 9:31 PM, Nicolai Hähnle wrote:
> Fair enough on those magic numbers. It would be nice to understand them
> better though.
>
>
> On 28.04.2017 17:56, Marek Olšák wrote:
> [snip]
@@ -1721,20 +1893,26 @@ static void *si_create_shader_selector(struct
pipe_context
On Fri, Apr 28, 2017 at 10:58 AM, Mauro Rossi wrote:
> 2017-04-28 14:23 GMT+02:00 Rob Herring :
>> On Thu, Apr 27, 2017 at 9:50 PM, Chih-Wei Huang
>> wrote:
>>> A typo in the subject?
>>> (s/building/build/)
>>
>> It's a bit misleading as originally I wrote it such that a blank
>> BOARD_GPU_DRIV
Thanks for this. Series is
Reviewed-by: Nicolai Hähnle
On 26.04.2017 11:35, Marek Olšák wrote:
From: Marek Olšák
also remove the incorrect comment about primitive restart.
---
src/mesa/state_tracker/st_draw.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/src/
On Fri, Apr 28, 2017 at 9:33 PM, Nicolai Hähnle wrote:
> On 28.04.2017 17:59, Marek Olšák wrote:
>>
>> On Fri, Apr 28, 2017 at 1:25 PM, Nicolai Hähnle
>> wrote:
>>>
>>> On 24.04.2017 10:45, Marek Olšák wrote:
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_sh
On 28.04.2017 18:08, Marek Olšák wrote:
On Fri, Apr 28, 2017 at 1:54 PM, Nicolai Hähnle wrote:
On 24.04.2017 10:45, Marek Olšák wrote:
From: Marek Olšák
VGPR1 = InstanceID / StepRate0; // StepRate0 can be set to 1
---
src/gallium/drivers/radeonsi/si_shader.c| 20 ++-
On 28.04.2017 17:59, Marek Olšák wrote:
On Fri, Apr 28, 2017 at 1:25 PM, Nicolai Hähnle wrote:
On 24.04.2017 10:45, Marek Olšák wrote:
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 87
+---
1 file changed, 70 insertions(+), 17 deletions(-)
di
Fair enough on those magic numbers. It would be nice to understand them
better though.
On 28.04.2017 17:56, Marek Olšák wrote:
[snip]
@@ -1721,20 +1893,26 @@ static void *si_create_shader_selector(struct
pipe_context *ctx,
break;
case TGS
On 28.04.2017 21:19, Marc Dietrich wrote:
> Am Freitag, 28. April 2017, 16:53:55 CEST schrieb Dieter Nützel:
>> I'm running this, too.
>> But alone. 4/4 didn't apply anylonger ;-)
>>
>> NO glitches on NI/Turks XT (6670).
>>
>> I had tested 'Heaven' and 'Valley' even with the former patch version.
>
Samuel Pitoiset writes:
> On 04/28/2017 06:58 PM, Mark Janes wrote:
>> With this commit, a wide range of intel hardware began hanging during
>> the GLES CTS, with dmesg errors like:
>>
>> [25488.739167] traps: glcts[15106] general protection ip:7fdac6484ba5
>> sp:7ffdcda85a20 error:0
>>
>> Mac
Nice change.
Reviewed-by: Matt Turner
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
Reviewed-by: Marek Olšák
Marek
On Fri, Apr 28, 2017 at 5:11 AM, Brian Paul wrote:
> The VMware driver has a limited set of integer texture formats. We
> often have to fall back to 4-component formats when 1- or 2-component
> formats are missing.
>
> This fixes about 8 integer texture Piglit te
Reviewed-by: Marek Olšák
Marek
On Fri, Apr 28, 2017 at 5:09 AM, Brian Paul wrote:
> Return as soon as we find an existing color channel that's enabled for
> writing. Typically, this allows us to return true on the first loop
> iteration intead of doing four iterations.
>
> No piglit regression
On Fri, 2017-04-28 at 19:27 +0100, Emil Velikov wrote:
> On 28 April 2017 at 19:15, Emil Velikov wrote:
> > On 28 April 2017 at 11:50, Andres Gomez wrote:
> > > Do we want to do this?
> > >
> > > According to Travis own doc, there is little to no gain:
> > > https://docs.travis-ci.com/user/cachi
From: Emil Velikov
The instance should have 2 cores, yet bumping the jobs to 4 should give
us a minor speed improvement.
Signed-off-by: Emil Velikov
Reviewed-by: Andres Gomez
---
.travis.yml | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/.travis.yml b/.travis
From: Emil Velikov
Split the target to allow faster builds for each run.
The overall build time will be more, yet Travis runs multiple builds in
parallel so we're limited by the slowest one.
Things are split roughly as:
- DRI loaders, classic DRI drivers, classic OSMesa, make check
- All Gall
From: Emil Velikov
Split the "if test" blocks so that we get more sensible output in case
of a failure.
Signed-off-by: Emil Velikov
Reviewed-by: Andres Gomez
---
.travis.yml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/.travis.yml b/.travis.yml
index 8921429c7e9..a4f
From: Emil Velikov
The former does not require any LLVM, while the latter uses LLVM 3.3.
This way we'll quickly catch any LLVM 3.3+ functionality that gets
introduced where it shouldn't.
Add the full list of addons for each build permutation.
v2: Keep libedit-dev, rework check target.
v3: Comm
From: Emil Velikov
Split into OpenCL and others, since the former is quite time consuming.
v2:
- explicitly enable/disable components
- build libvdpau 1.1 requirement
- enable st/vdpau
- build libva 1.6.2 (API 0.38) requirement
v3: Drop ubuntu-toolchain-r-test from sources (Andres)
Signed-
From: Emil Velikov
According to the manual
"If you are using ccache, use:
language: c # or other C/C++ variants
cache: ccache
to cache $HOME/.ccache and automatically add /usr/lib/ccache to your
$PATH."
Signed-off-by: Emil Velikov
Reviewed-by: Andres Gomez
---
.travis.yml | 4 +---
1
From: Emil Velikov
We effectively override libdrm-dev and libxcb-dri2-0-dev since we build
and install the package locally.
Signed-off-by: Emil Velikov
Reviewed-by: Andres Gomez
---
.travis.yml | 2 --
1 file changed, 2 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index f34b762a4e5..8
From: Emil Velikov
Signed-off-by: Emil Velikov
Reviewed-by: Andres Gomez
---
.travis.yml | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/.travis.yml b/.travis.yml
index 563d9e25379..db3cb9517fe 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -22,6 +22,7
From: Emil Velikov
Provides a small, but consistent improvement.
Example numbers of the jobs added later in the series.
"make loaders/classic DRI" - 1s
"scons SWR" - 6s
Signed-off-by: Emil Velikov
---
.travis.yml | 1 +
1 file changed, 1 insertion(+)
diff --git a/.travis.yml b/.travis.yml
in
From: Andres Gomez
Trusty's LLVM toochain repository was whitelisted some time ago. See:
https://github.com/travis-ci/apt-source-whitelist/commit/479067c5e74cb0c1e2419209179b1afe2edce274
Signed-off-by: Andres Gomez
[Emil Velikov]
- set sudo to false
- reference the Trusty change (Rhys)
- kee
From: Emil Velikov
Should make things a bit more consistent across the board.
Cc: Eric Engestrom
CC: Andres Gomez
Signed-off-by: Emil Velikov
---
.travis.yml | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/.travis.yml b/.travis.yml
index 5298fa11b67..ec76cf7c9cb 10
From: Emil Velikov
Requires GCC 5.0 (due to the C++14 requirement) and LLVM 3.9.
v2: Enable the target, add libedit-dev, rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS, quote OVERRIDE
variables.
v4: Keep check target as-is (Andres)
Cc: Tim Rowley
Cc: George Kyria
From: Emil Velikov
v2: Quote OVERRIDE variables.
v3: Add missplaced libedit-dev hunk (Andres).
Signed-off-by: Emil Velikov
Reviewed-by: Andres Gomez
---
.travis.yml | 41 ++---
1 file changed, 38 insertions(+), 3 deletions(-)
diff --git a/.travis.yml b/.tr
From: Emil Velikov
Some of the libraries may be dlopened, which may not always work due to
the non-standard prefix that we're using.
Signed-off-by: Emil Velikov
Reviewed-by: Andres Gomez
---
.travis.yml | 1 +
1 file changed, 1 insertion(+)
diff --git a/.travis.yml b/.travis.yml
index 6d6e44
From: Andres Gomez
The txc-dxtn library implements the patented S3 Texture Compression
algorithm.
By default it won't be used but we add the possibility of setting the
USE_TXC_DXTN variable to yes in the travis web UI so it will be
installed and used for the scons tests.
Cc: Eric Anholt
Cc: Rh
From: Emil Velikov
With next commits we'll add a couple of more options.
v2: Rework check target.
v3: Comment the current check target, add -j4 SCONSFLAGS
v4: Keep check target as-is, will rework with later patch.
Signed-off-by: Emil Velikov
Reviewed-by: Andres Gomez
---
.travis.yml | 18 +++
On 28 April 2017 at 19:15, Emil Velikov wrote:
> On 28 April 2017 at 11:50, Andres Gomez wrote:
>> Do we want to do this?
>>
>> According to Travis own doc, there is little to no gain:
>> https://docs.travis-ci.com/user/caching/#Things-not-to-cache
>>
> The packages we use should not be slow to d
Fix kmscube -A on i915 :P
On 17-04-28 14:17:34, Rob Clark wrote:
I guess this applies on top of one of Ben's in-flight patches?
Perhaps it can be squashed into that? (Otherwise remind me about this
when the modifiers patchset is merged)
BR,
-R
On Fri, Apr 28, 2017 at 12:18 PM, Lucas Stach wr
Am Freitag, 28. April 2017, 16:53:55 CEST schrieb Dieter Nützel:
> I'm running this, too.
> But alone. 4/4 didn't apply anylonger ;-)
>
> NO glitches on NI/Turks XT (6670).
>
> I had tested 'Heaven' and 'Valley' even with the former patch version.
> The 'Heaven' GPU hang (wireframe/tessellation)
I guess this applies on top of one of Ben's in-flight patches?
Perhaps it can be squashed into that? (Otherwise remind me about this
when the modifiers patchset is merged)
BR,
-R
On Fri, Apr 28, 2017 at 12:18 PM, Lucas Stach wrote:
> Use long long format when printing the format modifier, as a
On 28 April 2017 at 11:50, Andres Gomez wrote:
> Do we want to do this?
>
> According to Travis own doc, there is little to no gain:
> https://docs.travis-ci.com/user/caching/#Things-not-to-cache
>
The packages we use should not be slow to download, although I've not
checked explicitly. It seems c
On 04/28/2017 06:58 PM, Mark Janes wrote:
With this commit, a wide range of intel hardware began hanging during
the GLES CTS, with dmesg errors like:
[25488.739167] traps: glcts[15106] general protection ip:7fdac6484ba5
sp:7ffdcda85a20 error:0
Machines that did complete the cts, reported hun
Ping
On Wed, Apr 26, 2017 at 11:35 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> We could also remove index_bounds_valid and use max_index != ~0 instead.
> Opinions on that are welcome.
> ---
> src/mesa/vbo/vbo_context.c| 2 +-
> src/mesa/vbo/vbo_exec_array.c | 6 +++---
> 2 files changed,
On Fri, 2017-04-28 at 17:43 +0100, Emil Velikov wrote:
> On 28 April 2017 at 16:00, Andres Gomez wrote:
> > On Thu, 2017-04-27 at 19:38 +0100, Emil Velikov wrote:
> > > From: Emil Velikov
> > >
> > > Split the target to allow faster builds for each run.
> > >
> > > The overall build time will b
With this commit, a wide range of intel hardware began hanging during
the GLES CTS, with dmesg errors like:
[25488.739167] traps: glcts[15106] general protection ip:7fdac6484ba5
sp:7ffdcda85a20 error:0
Machines that did complete the cts, reported hundreds of errors like:
*** Error in `/tmp/buil
On 28.04.2017 13:08, Eric Engestrom wrote:
Hi,
I'm currently running llvm r299777 but I have no idea when this was
changed.
Yeah, you'll just have to upgrade LLVM (or downgrade to LLVM 4.0). This
sort of thing unfortunately happens occasionally when running LLVM trunk
and Mesa master. I curr
On 28 April 2017 at 16:00, Andres Gomez wrote:
> On Thu, 2017-04-27 at 19:38 +0100, Emil Velikov wrote:
>> From: Emil Velikov
>>
>> Split the target to allow faster builds for each run.
>>
>> The overall build time will be more, yet Travis runs multiple builds in
>> parallel so we're limited by t
Use long long format when printing the format modifier, as a simple
long is only 4 bytes on 32bit systems.
Signed-off-by: Lucas Stach
---
drm-common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drm-common.c b/drm-common.c
index 2f2c918596a4..fb4ec7f4389e 100644
--- a/drm
The current initial value of 0 is a valid fd, so this will trip up
the GPU submit on the first render, when used as an IN fence for rendering.
Reported-by: Philipp Zabel
Signed-off-by: Lucas Stach
---
drm-atomic.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drm-atom
On Thu 27 Apr 2017, Emil Velikov wrote:
> On 27 April 2017 at 12:14, Xu, Randy wrote:
> > Hi, Chad
> >
> > Please review this patch, we need it to solve some instability issues
Randy and Tapani, could you provide a few dEQP test names that this
patch fixes? I'd like to mention at least one EGL an
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