Re: [Mesa-dev] [PATCH] radeonsi/uvd: fix interlaced video buffer height alignment

On 09/12/2017 11:37 AM, Christian König wrote: Am 12.09.2017 um 17:32 schrieb Leo Liu: On 09/12/2017 11:23 AM, Christian König wrote: I don't think this is correct. A long long time ago I've came up with this because the firmware didn't liked what you proposed below. Since this change only

Re: [Mesa-dev] [PATCH] radeonsi/uvd: fix interlaced video buffer height alignment

Am 12.09.2017 um 17:32 schrieb Leo Liu: On 09/12/2017 11:23 AM, Christian König wrote: I don't think this is correct. A long long time ago I've came up with this because the firmware didn't liked what you proposed below. Since this change only affects 720p video, so I did quite a bit tests

Re: [Mesa-dev] [PATCH] radeonsi/uvd: fix interlaced video buffer height alignment

On 09/12/2017 11:23 AM, Christian König wrote: I don't think this is correct. A long long time ago I've came up with this because the firmware didn't liked what you proposed below. Since this change only affects 720p video, so I did quite a bit tests on 720p video dec/enc, and haven't see any

Re: [Mesa-dev] [PATCH] i965 : optimized bucket index calculation

On Tue, Sep 12, 2017 at 2:40 AM, Marathe, Yogesh wrote: > Hi Jason, > > > > On the asserts you’ve mentioned below, I assume we need to add them after > ‘bufmgr->num_buckets++’ in add_bucket() as num_buckets could be 0 initially. > Yes, because otherwise bucket_for_size

Re: [Mesa-dev] Is there a mesa Docker image available like on travis-ci? (was Re: [PATCH 1/2] gallium/targets/dri: Add libunwind to linker flags)

Am Dienstag, den 12.09.2017, 12:26 +0100 schrieb Emil Velikov: > On 12 September 2017 at 11:17, Gert Wollny > wrote: > > > > > > Is there a docker image available that resembles the travis-ci > > build environment as it is set up in mesa/.travis.yml (i.e. > > Ubuntu/Trusty

Re: [Mesa-dev] [PATCH mesa] radv: compile out unused code

Reviewed-by: Emil Velikov -Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] radeonsi/uvd: fix interlaced video buffer height alignment

I don't think this is correct. A long long time ago I've came up with this because the firmware didn't liked what you proposed below. Instead we should rather fix the scaler to use the original width/height of the video buffer and not the adjusted width/height of the resources. Regards,

Re: [Mesa-dev] [PATCH mesa] glx: remove dead code

On Tue, 2017-09-12 at 16:08 +0100, Eric Engestrom wrote: > On Wednesday, 2017-09-06 17:25:29 +0100, Emil Velikov wrote: > > I'm not that much of an expert on things XCB, so perhaps a silly question. > > Isn't the presence checked with the code just above the removed hunk? > > Namely: > > > >

[Mesa-dev] [PATCH mesa] radv: compile out unused code

Signed-off-by: Eric Engestrom --- src/amd/vulkan/radv_wsi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/amd/vulkan/radv_wsi.c b/src/amd/vulkan/radv_wsi.c index aa44b7d78a..8a551c48bb 100644 --- a/src/amd/vulkan/radv_wsi.c +++ b/src/amd/vulkan/radv_wsi.c

Re: [Mesa-dev] [PATCH mesa] glx: remove dead code

On Wednesday, 2017-09-06 17:25:29 +0100, Emil Velikov wrote: > On 6 September 2017 at 17:17, Adam Jackson wrote: > > On Fri, 2017-09-01 at 15:04 +0100, Eric Engestrom wrote: > >> These fields were added in 2d94601582 but never used; hasPresent was > >> never set, while the other

Re: [Mesa-dev] [PATCH mesa] docs/egl: remove reference to EGL_DRIVERS_PATH

On 12 September 2017 at 15:38, Eric Engestrom wrote: > Support for external egl drivers was dropped a few years ago. > > Fixes: 209360bbb91bb10346eb "egl/main: drop support for external egl drivers" > Signed-off-by: Eric Engestrom Thanks!

[Mesa-dev] [PATCH mesa] glsl: compile unused function out

The function is only called from one place, which is hidden behind the same `#ifdef DEBUG`. Fixes: ca73c3358c91434e68ab "glsl: Mark functions static" Signed-off-by: Eric Engestrom --- src/compiler/glsl/ir_validate.cpp | 2 ++ 1 file changed, 2 insertions(+) diff

[Mesa-dev] [PATCH mesa] docs/egl: remove reference to EGL_DRIVERS_PATH

Support for external egl drivers was dropped a few years ago. Fixes: 209360bbb91bb10346eb "egl/main: drop support for external egl drivers" Signed-off-by: Eric Engestrom --- docs/egl.html | 21 - 1 file changed, 21 deletions(-) diff --git

Re: [Mesa-dev] [PATCH] radeonsi/uvd: fix interlaced video buffer height alignment

On 09/12/2017 10:24 AM, Emil Velikov wrote: Hi Leo, On 12 September 2017 at 14:56, Leo Liu wrote: In code: template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT); ... template.height *= array_size; It turns out the height will

[Mesa-dev] [Bug 102665] test_glsl_to_tgsi_lifetime.cpp:53:67: error: ‘?=>>=?UTF-8?Q?’ should be ‘?=> >=?UTF-8?Q?’ within a nested template argument list

https://bugs.freedesktop.org/show_bug.cgi?id=102665 --- Comment #3 from Gert Wollny --- @Vinson: on Travis with the exact same version of g++ you reported (gcc (Ubuntu 4.8.4-2ubuntu1~14.04.3) 4.8.4 [1] the build runs through without modifying the source (I had to enable

Re: [Mesa-dev] [PATCH] radeonsi/uvd: fix interlaced video buffer height alignment

Hi Leo, On 12 September 2017 at 14:56, Leo Liu wrote: > In code: > template.height = align(tmpl->height / array_size, > VL_MACROBLOCK_HEIGHT); > ... > template.height *= array_size; > > It turns out the height will be aligned with 2*VL_MACROBLOCK_HEIGHT.

[Mesa-dev] [PATCH] radeonsi/uvd: fix interlaced video buffer height alignment

In code: template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT); ... template.height *= array_size; It turns out the height will be aligned with 2*VL_MACROBLOCK_HEIGHT. The problematic case for example is when VA-API postproc scaling with blit between

[Mesa-dev] [PATCH mesa] swr: use ARRAY_SIZE macro

Signed-off-by: Eric Engestrom --- src/gallium/drivers/swr/rasterizer/memory/StoreTile.h | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/swr/rasterizer/memory/StoreTile.h

[Mesa-dev] [PATCH] i965: add BRW_NEW_BLORP to the list of dirty state for render targets

Commit b96313c0e1289b removed BRW_NEW_BLORP for a bunch of SURFACE_STATE setup code, including render targets, on the basis that blorp invalidates binding tables but not surface states, however, at least on Broadwell, this seems to be causing a regression in a CTS test that seems related to render

Re: [Mesa-dev] [PATCH] glsl: remove assert in lower_packed_varyings

Reviewed-by: Marek Olšák Marek On Mon, Sep 11, 2017 at 3:37 PM, Ilia Mirkin wrote: > It's obviously misformed, and it's triggering on > > dEQP-GLES31.functional.program_interface_query.program_input.type.separable_geometry.int > > and a few related

Re: [Mesa-dev] [PATCH 10/15] radeonsi: move si_get_wave_info() to AMD common code

Reviewed-by: Marek Olšák Marek On Tue, Sep 12, 2017 at 12:35 PM, Samuel Pitoiset wrote: > This will allow us to use it from radv. > > Signed-off-by: Samuel Pitoiset > --- > src/amd/common/ac_debug.c | 76

Re: [Mesa-dev] Is there a mesa Docker image available like on travis-ci? (was Re: [PATCH 1/2] gallium/targets/dri: Add libunwind to linker flags)

On 12 September 2017 at 11:17, Gert Wollny wrote: > >> > This doesn't seem right. GALLIUM_COMMON_LIB_DEPS already has >> > $(LIBUNWIND_LIBS) so this change should not be needed. >> >> I already started looking at this, but haven't been able to figure >> out why in this

[Mesa-dev] [PATCH mesa] r600: extend use of HAS_SIZE() macro

The macro was only used a few times; let's use it everywhere, simplifying the code. I also uniformised the use of curly brackets by adding them around all uses of the macro, removed a few unnecessary `else` after `return`, and turned a ternary op into an `if`. Signed-off-by: Eric Engestrom

[Mesa-dev] [Bug 102665] test_glsl_to_tgsi_lifetime.cpp:53:67: error: ‘?=>>=?UTF-8?Q?’ should be ‘?=> >=?UTF-8?Q?’ within a nested template argument list

https://bugs.freedesktop.org/show_bug.cgi?id=102665 --- Comment #2 from Emil Velikov --- One option is to add space between the two >> - it's compatible with older C++ standards and part of Mesa already uses it. Alternatively, move '&' one character to the right (again

Re: [Mesa-dev] [PATCH] anv: fix build issues on release build

On 12 September 2017 at 11:11, Tapani Pälli wrote: > Fixes: d083bc1c4b ("anv: wire up vk_errorf macro to do debug reporting") > Signed-off-by: Tapani Pälli FWIW Reviewed-by: Emil Velikov -Emil

[Mesa-dev] [PATCH 15/15] radv: dump the list of enabled options when a hang occured

Useful to know which debug/perftest options were enabled when a hang report is generated. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 25 + src/amd/vulkan/radv_device.c | 14 ++ src/amd/vulkan/radv_private.h

[Mesa-dev] [PATCH 14/15] radv: dump last 60 lines of dmesg when a hang occured

Copied from dd_dump_dmesg(). Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 20 1 file changed, 20 insertions(+) diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index 741bf76f15..106c6e4f64 100644 ---

[Mesa-dev] [PATCH 13/15] radv: dump descriptors when a hang occured

Might be useful for checking if all descriptors are sets by the application. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 181 1 file changed, 181 insertions(+) diff --git a/src/amd/vulkan/radv_debug.c

[Mesa-dev] [PATCH 11/15] radv: dump annotated shaders using UMR

This might be very useful in order to figure out where a shader is stucked. This uses UMR to detect which instruction is executing bad things. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 166 1 file

[Mesa-dev] [PATCH 08/15] radv/winsys: add a read_registers() callback

To dump some status MMIO registers when a hang is detected. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_radeon_winsys.h | 3 +++ src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c | 11 +++ 2 files changed, 14 insertions(+) diff --git

[Mesa-dev] [PATCH 09/15] radv: dump some status MMIO registers when a hang occured

Might report some useful information to help figuring out where does the hang happened. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 57 + 1 file changed, 57 insertions(+) diff --git

[Mesa-dev] [PATCH 05/15] radv: dump the active shaders when a hang occured

Only the disassembly is currently dumped. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 78 ++--- 1 file changed, 73 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_debug.c

[Mesa-dev] [PATCH 12/15] radv: save all descriptor pointers into the trace BO

To dump them when a hang is detected. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 32 src/amd/vulkan/radv_debug.c | 3 +++ 2 files changed, 35 insertions(+) diff --git a/src/amd/vulkan/radv_cmd_buffer.c

[Mesa-dev] [PATCH 07/15] radv: dump shader stats when a hang occured

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index fe9d9cfdba..4abdb6489e 100644 --- a/src/amd/vulkan/radv_debug.c +++

[Mesa-dev] [PATCH 10/15] radeonsi: move si_get_wave_info() to AMD common code

This will allow us to use it from radv. Signed-off-by: Samuel Pitoiset --- src/amd/common/ac_debug.c | 76 ++ src/amd/common/ac_debug.h | 18 +++ src/gallium/drivers/radeonsi/si_debug.c | 96

[Mesa-dev] [PATCH 02/15] radv: save the bound pipeline pointers into the trace BO

When a GPU hang is detected in radv_gpu_hang_occured() we know which command buffer is faulty but the bound pipelines might have been updated during the execution. The pointers to the radv_pipeline objects are emitted just after the second trace ID, that way it would be easy to dump the active

[Mesa-dev] [PATCH 03/15] radv: add radv_cmd_buffer_after_draw() helper function

To share common code after every draw/compute calls. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c

[Mesa-dev] [PATCH 00/15] radv: GPU hangs should now be easier to detect

Hi, Currently, it's not easy to debug a GPU hang with radv because only a trace file is generated (cf. RADV_TRACE_FILE). That file contains all packets and commands emitted into the IB, that's useful but definitely not enough. For example, the active shaders at the moment of the hang are not

[Mesa-dev] [PATCH 04/15] radv: add debug flags for syncing shaders after every draw call

To improve GPU hangs detection when shaders are stucked. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 15 +++ src/amd/vulkan/radv_debug.h | 1 + src/amd/vulkan/radv_device.c | 1 + 3 files changed, 17 insertions(+) diff

[Mesa-dev] [PATCH 01/15] radv: add a comment that describes the trace BO layout

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index d52ba5d86d..052daaef2f 100644 --- a/src/amd/vulkan/radv_debug.c +++

[Mesa-dev] [PATCH 06/15] radv: add radv_shader_dump_stats() helper

To dump the shader stats when a hang is detected. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 64 +- src/amd/vulkan/radv_shader.c | 70 ++

Re: [Mesa-dev] [PATCH] anv: fix build issues on release build

On 12 September 2017 at 11:11, Tapani Pälli wrote: > Fixes: d083bc1c4b ("anv: wire up vk_errorf macro to do debug reporting") > Signed-off-by: Tapani Pälli Reviewed-by: Daniel Stone

[Mesa-dev] Is there a mesa Docker image available like on travis-ci? (was Re: [PATCH 1/2] gallium/targets/dri: Add libunwind to linker flags)

> > This doesn't seem right. GALLIUM_COMMON_LIB_DEPS already has > > $(LIBUNWIND_LIBS) so this change should not be needed. > > I already started looking at this, but haven't been able to figure > out why in this specific configuration GALLIUM_COMMON_LIB_DEPS seems > to be empty, or at least it

[Mesa-dev] [PATCH] anv: fix build issues on release build

Fixes: d083bc1c4b ("anv: wire up vk_errorf macro to do debug reporting") Signed-off-by: Tapani Pälli --- src/intel/vulkan/anv_private.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h

Re: [Mesa-dev] [PATCH] r600/sb: remove superfluos assert

Am Dienstag, den 12.09.2017, 09:56 +0300 schrieb Vadim Girlin: > On 09/11/2017 07:09 PM, Emil Velikov wrote: > Anyway, if num_arrays is 0 there, I suspect it can be a result of > some other issue. At the very least it looks like a potential > performance problem, because in that case we assume

Re: [Mesa-dev] [PATCH] i965 : optimized bucket index calculation

Hi Jason, On the asserts you’ve mentioned below, I assume we need to add them after ‘bufmgr->num_buckets++’ in add_bucket() as num_buckets could be 0 initially. Another clarification on ~1%, we meant approx. 1% there, that’s an improvement we saw in 3Dmark total not a degradation, we’ll

[Mesa-dev] [Bug 102564] swr: GPU Caps Viewer crashes with any 3D demo

https://bugs.freedesktop.org/show_bug.cgi?id=102564 --- Comment #4 from Alex Granni --- Sorry, I didn't mention that GPU Caps Viewer is 32-bit even if running on 64-bit Windows so it goes in \windows\syswow64 on a 64-bit Windows. The way I get it to use Mesa is by copying

Re: [Mesa-dev] [RFC] NIR serialization

On 12/09/17 16:55, Jordan Justen wrote: On 2017-09-11 21:44:32, Timothy Arceri wrote: On 12/09/17 14:23, Ian Romanick wrote: On 09/08/2017 01:59 AM, Kenneth Graunke wrote: We shouldn't use SPIR-V for the shader cache. The compilation process for GLSL is: GLSL -> GLSL IR -> NIR -> i965 IRs.

Re: [Mesa-dev] [RFC] NIR serialization

On 2017-09-10 17:15:48, Timothy Arceri wrote: > Ccing list. > > On 11/09/17 09:50, Timothy Arceri wrote: > > Hi Daniel, > > > > Here is the code that does the caching of tgsi in Gallium. > > > > https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/state_tracker/st_shader_cache.c > > > > > >

Re: [Mesa-dev] [PATCH] glsl: Disallow unsized array of atomic_uint

On Tue, 2017-09-12 at 00:03 -0700, Kenneth Graunke wrote: > On Monday, September 11, 2017 11:15:05 PM PDT Iago Toral Quiroga > wrote: > > This was a bugfix to the spec addressed in OpenGL 4.5 and there is > > a CTS test to check this. > > > > Fixes: > >

Re: [Mesa-dev] [PATCH] glsl: Disallow unsized array of atomic_uint

On Monday, September 11, 2017 11:15:05 PM PDT Iago Toral Quiroga wrote: > This was a bugfix to the spec addressed in OpenGL 4.5 and there is > a CTS test to check this. > > Fixes: > KHR-GL45.shader_atomic_counters.negative-unsized-array > --- > src/compiler/glsl/ast_to_hir.cpp | 11 +++ >

Re: [Mesa-dev] [PATCH] r600/sb: remove superfluos assert

On 09/11/2017 07:09 PM, Emil Velikov wrote: On 11 September 2017 at 15:39, Gert Wollny wrote: The assert checks whether pshader->num_arrays != 0, but the code after the assert actually branches based on the same check. Removing this assert fixes: piglit

Re: [Mesa-dev] [RFC] NIR serialization

On 2017-09-11 21:44:32, Timothy Arceri wrote: > On 12/09/17 14:23, Ian Romanick wrote: > > On 09/08/2017 01:59 AM, Kenneth Graunke wrote: > >> > >> We shouldn't use SPIR-V for the shader cache. > >> > >> The compilation process for GLSL is: GLSL -> GLSL IR -> NIR -> i965 IRs. > >> Storing the

Re: [Mesa-dev] [RFC] NIR serialization

On Monday, September 11, 2017 9:23:05 PM PDT Ian Romanick wrote: > On 09/08/2017 01:59 AM, Kenneth Graunke wrote: > > On Thursday, September 7, 2017 4:26:04 PM PDT Jordan Justen wrote: > >> On 2017-09-06 14:12:41, Daniel Schürmann wrote: > >>> Hello together! > >>> Recently, we had a small

[Mesa-dev] [PATCH] glsl: Disallow unsized array of atomic_uint

This was a bugfix to the spec addressed in OpenGL 4.5 and there is a CTS test to check this. Fixes: KHR-GL45.shader_atomic_counters.negative-unsized-array --- src/compiler/glsl/ast_to_hir.cpp | 11 +++ 1 file changed, 11 insertions(+) diff --git a/src/compiler/glsl/ast_to_hir.cpp

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