https://bugs.freedesktop.org/show_bug.cgi?id=102891
Dave Airlie changed:
What|Removed |Added
Status|NEW |NEEDINFO
--- Comment #8 from Dave Airlie
Hello Lucas,
On Thu, Nov 09, 2017 at 06:15:51PM +0100, Lucas Stach wrote:
> Hi Wladimir!
> > etna_resource_needs_flush is only called from two places - here, and
> > in resource_flush, where it also determines whether to do a
> > resolve-to-self, but before presenting the image. There it also onl
On Thu, 2017-11-09 at 16:34 -0800, Jason Ekstrand wrote:
> On Thu, Nov 9, 2017 at 4:23 PM, Chad Versace g>
> wrote:
>
> > On Wed 08 Nov 2017, Jason Ekstrand wrote:
> > > On Wed, Nov 8, 2017 at 1:34 AM, Samuel Iglesias Gonsálvez <[1]
> > > sigles...@igalia.com> wrote:
> > >
> > > The HW has s
https://bugs.freedesktop.org/show_bug.cgi?id=103658
Bug ID: 103658
Summary: addrlib/gfx9/gfx9addrlib.cpp:727:50: error: expected
expression
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
On 09/11/17 17:42, Jordan Justen wrote:
The ARB_get_program_binary extension requires that uniform values in a
program be restored to their initial value just after linking.
This patch saves off the initial values just after linking. When the
program is restored by glProgramBinary, we can use th
6-9:
Reviewed-by: Timothy Arceri
On 09/11/17 17:42, Jordan Justen wrote:
Signed-off-by: Jordan Justen
---
src/mesa/drivers/dri/i965/brw_program.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index 798
Reviewed-by: Timothy Arceri
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
From: Dave Airlie
Otherwise we end up emitting the fence.
Signed-off-by: Dave Airlie
---
src/gallium/drivers/r600/evergreen_state.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/gallium/drivers/r600/evergreen_state.c
b/src/gallium/drivers/r600/evergreen_state.c
index c1d13fd..308
On 2017-11-09 08:07:57, Jose Fonseca wrote:
> On 09/11/17 13:19, Emil Velikov wrote:
> > Hi Jordan,
> >
> > On 9 November 2017 at 06:42, Jordan Justen
> > wrote:
> >> Signed-off-by: Jordan Justen
> >> ---
> >> src/util/Makefile.sources | 2 +
> >> src/util/meson.build | 2 +
> >> s
v2: copy input primitive
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 5b68ff2a07..c7880b7f87 100644
--- a/src/gallium/drivers/radeonsi/s
---
src/gallium/drivers/radeonsi/si_pipe.c | 3 +-
src/gallium/drivers/radeonsi/si_shader_nir.c | 43
src/mesa/state_tracker/st_glsl_to_nir.cpp| 3 +-
3 files changed, 28 insertions(+), 21 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b
---
src/amd/common/ac_nir_to_llvm.c | 24 -
src/amd/common/ac_shader_abi.h| 7 ++
src/gallium/drivers/radeonsi/si_shader.c | 1 +
src/gallium/drivers/radeonsi/si_shader_internal.h | 5 +
src/gallium/drivers/radeonsi/si_s
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 5b68ff2a07..1933c8c770 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/g
---
src/amd/common/ac_nir_to_llvm.c | 16
src/amd/common/ac_shader_abi.h| 2 ++
src/gallium/drivers/radeonsi/si_shader.c | 14 ++
src/gallium/drivers/radeonsi/si_shader_internal.h | 2 --
4 files changed, 16 insertions(+
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 847d75ba14..fca16f46cf 100644
--- a/src/gallium/drivers/radeonsi/si_shader
---
src/amd/common/ac_llvm_build.c | 22 ++
src/amd/common/ac_llvm_build.h | 4
src/amd/common/ac_nir_to_llvm.c | 34 ++
3 files changed, 32 insertions(+), 28 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_l
---
src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index 9ec5a876f3..59d02605e9 100644
--- a/src/gallium/drive
This creates a common function that can be shared by the tgsi
and nir backends.
---
src/gallium/drivers/radeonsi/si_shader.c | 61 ++-
src/gallium/drivers/radeonsi/si_shader_internal.h | 6 +++
2 files changed, 44 insertions(+), 23 deletions(-)
diff --git a/src/galli
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 37
1 file changed, 37 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c
b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 32f6d86647..847d75ba14 100644
--- a/src/gallium/drivers/radeonsi/si_
---
src/gallium/drivers/radeonsi/si_shader.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 10b1890b4f..efaab0a7a1 100644
--- a/src/gallium/drivers/radeonsi/si_sha
---
src/gallium/drivers/radeonsi/si_shader.c | 32 +---
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index cc68d0ac6f..10b1890b4f 100644
--- a/src/gallium/drivers/rad
---
src/gallium/drivers/radeonsi/si_shader.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 33c37d438b..3708696c69 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/driver
---
src/gallium/drivers/radeonsi/si_shader.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 3708696c69..37d97cb341 100644
--- a/src/gallium/drivers/radeonsi/si_s
This is like bitcast() but takes an llvm type rather than a tgsi
type.
---
src/gallium/drivers/radeonsi/si_shader_internal.h | 3 +++
src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 9 +
2 files changed, 12 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal
---
src/gallium/drivers/radeonsi/si_shader.c| 11 +++
src/gallium/drivers/radeonsi/si_shader_internal.h | 2 +-
src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c | 17 ++---
3 files changed, 18 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/ra
This simplifies things a bit and will enable it to work with the
common NIR -> LLVM code.
---
src/gallium/drivers/radeonsi/si_shader.c | 25 ---
src/gallium/drivers/radeonsi/si_shader_internal.h | 7 +--
2 files changed, 10 insertions(+), 22 deletions(-)
diff --g
This is too simple and breaks gs and I'm not sure its required there
anyway.
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 6c474cb718
---
src/gallium/drivers/radeonsi/si_shader.c | 37 +++-
1 file changed, 22 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 47ca64fdea..cc68d0ac6f 100644
--- a/src/gallium/drivers/rad
This will be used by gallium drivers.
---
src/compiler/glsl/glsl_to_nir.cpp | 1 +
src/compiler/nir/nir.h| 8
2 files changed, 9 insertions(+)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp
b/src/compiler/glsl/glsl_to_nir.cpp
index caea2ea3b2..d327f52be6 100644
--- a/src/com
The support is still WIP but the patches as starting to pile
up so thought I'd see if I could land these before continuing.
Whats missing?
Vega support for gs_vtx_offset handling (see patch 3), I don't
have one yet for testing so didn't attempt to adapt the code.
Lots of piglit tests still fail.
---
src/amd/common/ac_nir_to_llvm.c | 11 +-
src/amd/common/ac_shader_abi.h | 4
src/gallium/drivers/radeonsi/si_shader.c | 35 +++-
3 files changed, 31 insertions(+), 19 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/a
On Thu, Nov 9, 2017 at 2:42 PM, Kenneth Graunke
wrote:
> On Thursday, November 9, 2017 12:31:18 PM PST Jason Ekstrand wrote:
> > On Thu, Nov 9, 2017 at 12:45 AM, Kenneth Graunke
> > wrote:
> >
> > > This fixes the missing AutomaticSize handling in the ABO code, removes
> > > a bunch of duplicate
On Thu, Nov 9, 2017 at 7:17 PM, Marek Olšák wrote:
> On Fri, Nov 10, 2017 at 12:40 AM, Matt Arsenault wrote:
>>
>>> On Nov 10, 2017, at 07:41, Marek Olšák wrote:
>>>
>>> Hi,
>>>
>>> This fixes the TCS gl_ClipDistance piglit failure that was uncovered
>>> by a recent LLVM change. The solution is
On Thu, Nov 9, 2017 at 2:23 PM, Matt Turner wrote:
> On Thu, Nov 2, 2017 at 3:54 PM, Jason Ekstrand
> wrote:
> > Register strides higher than 4 are uncommon but they can happen. For
> > instance, if you have a 64-bit extract_u8 operation, we turn that into
> > UB -> UQ MOV with a source stride
This commit makes most query piglit tests crash. I've not investigated further.
Marek
On Mon, Nov 6, 2017 at 11:23 AM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> Queries should still get marked as flushed when flushes are executed
> asynchronously in the driver thread.
>
> To this end, th
On Thu, Nov 9, 2017 at 4:23 PM, Chad Versace
wrote:
> On Wed 08 Nov 2017, Jason Ekstrand wrote:
> > On Wed, Nov 8, 2017 at 1:34 AM, Samuel Iglesias Gonsálvez <[1]
> > sigles...@igalia.com> wrote:
> >
> > The HW has some limits but, according to the spec, we can create
> > the image as it
On Wed 08 Nov 2017, Jason Ekstrand wrote:
> This function is used to determine when we need to re-allocate a
> miptree. Since we do nothing different in miptree allocation for
> sRGB vs. linear, loosening this should be safe and may lead to less
> copying and reallocating in some odd cases.
>
> C
On Wed 08 Nov 2017, Jason Ekstrand wrote:
> On Wed, Nov 8, 2017 at 1:34 AM, Samuel Iglesias Gonsálvez <[1]
> sigles...@igalia.com> wrote:
>
> The HW has some limits but, according to the spec, we can create
> the image as it has not yet any memory backing it. When we allocate
> that me
On Fri, Nov 10, 2017 at 12:40 AM, Matt Arsenault wrote:
>
>> On Nov 10, 2017, at 07:41, Marek Olšák wrote:
>>
>> Hi,
>>
>> This fixes the TCS gl_ClipDistance piglit failure that was uncovered
>> by a recent LLVM change. The solution is to set volatile on loads
>> and stores to enforce proper orde
for the series:
Reviewed-by: Dylan Baker
Quoting Chad Versace (2017-11-09 15:45:00)
> Use the host arch, not the target arch. In Meson and in recent
> Autotools, the host arch is where the binary will be used. The target
> arch is useful only when compiling a compiler.
>
> See: http://mesonbuild
On Tue 07 Nov 2017, Lionel Landwerlin wrote:
> On 07/11/17 14:47, Chad Versace wrote:
> > Make it a stand-alone function. Pre-patch, for some formats the function
> > returned incorrect VkFormatFeatureFlags which were cleaned up by the
> > caller.
> >
> > This prepares for a cleaner implementation
Reviewed-by: Bas Nieuwenhuizen
On 10 Nov 2017 00:45, "Chad Versace" wrote:
> Use the host arch, not the target arch. In Meson and in recent
> Autotools, the host arch is where the binary will be used. The target
> arch is useful only when compiling a compiler.
>
> See: http://mesonbuild.com/Cro
On Tue 07 Nov 2017, Jason Ekstrand wrote:
> I think I'd prefer we not make "Fix" the first word in the title unless it
> fixes an actual bug. How about "Refactor"? Same for the ASTC patch.
Sure, I'll s/Fix/Refactor/ in those patches.
___
mesa-dev maili
On Thu, Nov 09, 2017 at 01:50:29PM -0800, Kenneth Graunke wrote:
> On Thursday, November 9, 2017 11:22:34 AM PST Rafael Antognolli wrote:
> > On Thu, Nov 09, 2017 at 12:59:12AM -0800, Jordan Justen wrote:
> > > Reviewed-by: Jordan Justen
> >
> > It's also
> >
> > Tested-by: Rafael Antognolli
>
Use the host arch, not the target arch. In Meson and in recent
Autotools, the host arch is where the binary will be used. The target
arch is useful only when compiling a compiler.
See: http://mesonbuild.com/Cross-compilation.html
See:
https://www.gnu.org/software/automake/manual/html_node/Cross_0
I tested this in a setup where the builddir was outside of the srcdir.
Reviewed-by: Eric Engestrom
Acked-by: Dylan Baker
---
src/intel/vulkan/meson.build | 12
1 file changed, 12 insertions(+)
diff --git a/src/intel/vulkan/meson.build b/src/intel/vulkan/meson.build
index debdcce4e
Use the host arch, not the target arch. In Meson and in recent
Autotools, the host arch is where the binary will be used. The target
arch is useful only when compiling a compiler.
See: http://mesonbuild.com/Cross-compilation.html
See:
https://www.gnu.org/software/automake/manual/html_node/Cross_0
> On Nov 10, 2017, at 07:41, Marek Olšák wrote:
>
> Hi,
>
> This fixes the TCS gl_ClipDistance piglit failure that was uncovered
> by a recent LLVM change. The solution is to set volatile on loads
> and stores to enforce proper ordering.
>
> Please review.
>
Every LDS access certainly shoul
Quoting Eric Anholt (2017-11-08 13:26:12)
> We shouldn't have to manually specify most of these deps, I think, since
> they should be transitively pulled in by the static libraries using
> them, right? It's fine either way, though.
>
> > + install : true,
> > + version : '1.5.0',
>
> Looks lik
FWIW it looks like this series also broke compilation on mac os (I
suppose that was f0d3a4de75fdb865c058aba8614f0fe6ba5f0969 though):
[...truncated 173 lines...]
pthread_barrier_destroy(barrier);
^~~
/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.plat
On Thu 09 Nov 2017, Eric Engestrom wrote:
> On Wednesday, 2017-11-08 13:40:13 -0800, Chad Versace wrote:
> > On Tue 07 Nov 2017, Dylan Baker wrote:
> > > Quoting Eric Engestrom (2017-11-07 07:25:53)
> > > > On Wednesday, 2017-11-01 13:49:03 -0700, Chad Versace wrote:
> > > > > I tested this in a se
On Thursday, November 9, 2017 12:31:18 PM PST Jason Ekstrand wrote:
> On Thu, Nov 9, 2017 at 12:45 AM, Kenneth Graunke
> wrote:
>
> > This fixes the missing AutomaticSize handling in the ABO code, removes
> > a bunch of duplicated code, and drops an extra layer of wrapping around
> > brw_emit_buf
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index ff4ea95..ec4cf89 100644
--- a/src/gallium/drivers/radeons
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.c | 4 ++--
src/gallium/drivers/radeonsi/si_shader_internal.h | 2 --
src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 2 +-
3 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_sha
From: Marek Olšák
I like the writeonly wrapper more than using ac_build_store directly.
---
src/amd/common/ac_llvm_build.c | 6 ++
src/amd/common/ac_llvm_build.h | 2 ++
src/amd/common/ac_nir_to_llvm.c | 4 ++--
src/gallium/drivers/radeonsi/si_shader.c | 15 ++
From: Marek Olšák
---
src/amd/common/ac_llvm_build.c | 6 ++
src/amd/common/ac_llvm_build.h | 2 ++
src/amd/common/ac_nir_to_llvm.c | 4 ++--
src/gallium/drivers/radeonsi/si_shader.c | 25 ++---
4 files changed, 24 insertions(+), 13 deletio
Hi,
This fixes the TCS gl_ClipDistance piglit failure that was uncovered
by a recent LLVM change. The solution is to set volatile on loads
and stores to enforce proper ordering.
Please review.
Thanks,
Marek
___
mesa-dev mailing list
mesa-dev@lists.free
From: Marek Olšák
LLVM uses arbitrary scheduling if we don't set volatile.
volatile is a keyword, so use Volatile
---
src/amd/common/ac_llvm_build.c | 38
src/amd/common/ac_llvm_build.h | 13 ---
src/amd/common/ac_nir_to_llvm.c
On 11/09/2017 02:41 PM, Nicolai Hähnle wrote:
Sorry for the mess.
Not a huge deal. FWIW, you can test the MinGW cross-compile pretty easily:
1. apt-get install g++-mingw-w64-x86-64 (or equivalent)
2. cd mesa ; scons platform=windows
-Brian
Reviewed-by: Nicolai Hähnle
On 09.11.2017 17:46
On Thu, Nov 9, 2017 at 1:58 PM, Dylan Baker wrote:
> These flags are set for C sources, but not C++. This causes symbol
> visibility leaks from the C++ parts of the Intel compiler.
>
> fixes: 700bebb958e93f4d ("i965: Move the back-end compiler to
> src/intel/compiler")
Fixes
> Signed-off-by: Dy
On Thu, Nov 2, 2017 at 3:54 PM, Jason Ekstrand wrote:
> Register strides higher than 4 are uncommon but they can happen. For
> instance, if you have a 64-bit extract_u8 operation, we turn that into
> UB -> UQ MOV with a source stride of 8. Our previous calculation would
> try to generate a strid
These flags are set for C sources, but not C++. This causes symbol
visibility leaks from the C++ parts of the Intel compiler.
fixes: 700bebb958e93f4d ("i965: Move the back-end compiler to
src/intel/compiler")
Signed-off-by: Dylan Baker
---
src/intel/Makefile.am | 3 +++
1 file changed, 3 inser
Signed-off-by: Adam Jackson
---
src/glx/indirect_glx.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/src/glx/indirect_glx.c b/src/glx/indirect_glx.c
index 4302a8ff28..cfae12f6c0 100644
--- a/src/glx/indirect_glx.c
+++ b/src/glx/indirect_glx.c
@@ -62,13 +62,1
Testing the EXT_no_config_context series revealed that a bunch more
things were broken than I expected. While I work my way through that,
here's one trivial cleanup and a couple of pretty obvious bugfixes.
- ajax
___
mesa-dev mailing list
mesa-dev@lists
Without this, trying to create a GLX_RGBA_FLOAT_TYPE_ARB context would
fail, because GLX_RGBA_TYPE would be a mismatch with the fbconfig.
Signed-off-by: Adam Jackson
---
src/glx/dri3_glx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx
This is perfectly legal in GL 3.0+.
Fixes piglit/glx-create-context-no-current-framebuffer.
Signed-off-by: Adam Jackson
---
src/glx/drisw_glx.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/glx/drisw_glx.c b/src/glx/drisw_glx.c
index 2f0675addb..df2467a5c2 100644
On Thursday, November 9, 2017 11:22:34 AM PST Rafael Antognolli wrote:
> On Thu, Nov 09, 2017 at 12:59:12AM -0800, Jordan Justen wrote:
> > Reviewed-by: Jordan Justen
>
> It's also
>
> Tested-by: Rafael Antognolli
Sorry, I forgot to sync email before pushing this patch, so I missed
adding your
Sorry for the mess.
Reviewed-by: Nicolai Hähnle
On 09.11.2017 17:46, Brian Paul wrote:
Fixes: f1a364878431c8 ("threads: update for late C11 changes")
---
include/c11/threads_win32.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/c11/threads_win32.h b/include
Fixes the following tests on CHV, BXT, and GLK:
KHR-GL46.shader_ballot_tests.ShaderBallotFunctionBallot
dEQP-VK.spirv_assembly.instruction.compute.uconvert.uint32_to_int64
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103115
---
src/intel/compiler/brw_fs_nir.cpp | 8
1 fi
Reviewed-by: Andres Rodriguez
Been going through these patches as they are tightly related to the
semaphore series I'm working on.
Regards,
Andres
On 2017-11-09 08:45 AM, Nicolai Hähnle wrote:
Hi all,
I've previously sent some of this series, but I'm splitting it up
further for bisectabili
Reviewed-by; Charmaine Lee
From: Brian Paul
Sent: Thursday, November 9, 2017 11:31:16 AM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee
Subject: [PATCH] st/mesa: remove 'struct' keyword on function parameter
st_src_reg is a class, not a struct. S
On Thu, Nov 9, 2017 at 12:45 AM, Kenneth Graunke
wrote:
> Having this separate could potentially make programs that rebind atomics
> but no other surfaces ever so slightly faster. But it's a tiny amount
> of code to add to the existing UBO/SSBO atom, and very related.
>
> The extra atoms have a
On Thu, Nov 9, 2017 at 12:45 AM, Kenneth Graunke
wrote:
> This fixes the missing AutomaticSize handling in the ABO code, removes
> a bunch of duplicated code, and drops an extra layer of wrapping around
> brw_emit_buffer_surface_state().
> ---
> src/mesa/drivers/dri/i965/brw_context.h |
For this series, Reviewed-by: Charmaine Lee
From: Brian Paul
Sent: Thursday, November 9, 2017 11:31:42 AM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee
Subject: [PATCH 3/3] mesa: s/GLint/gl_buffer_index/ for _ColorDrawBufferIndexes
Also fix local
Looks good..
Reviewed-By: George Kyriazis
mailto:george.kyria...@intel.com>>
On Nov 8, 2017, at 6:39 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
State validation is performed during clear and draw calls. Validation
during clear was still accessing vertex buffer state. When th
Signed-off-by: Rob Clark
---
src/mesa/state_tracker/st_glsl_to_nir.cpp | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp
b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index e9a8d6414e7..b748e13de1b 100644
--- a/src/mesa/state_trac
Also fix local variable declarations and replace -1 with BUFFER_NONE.
No Piglit changes.
---
src/mesa/drivers/common/meta.c | 2 +-
src/mesa/main/buffers.c | 16
src/mesa/main/clear.c| 9 +
src/mesa/main/framebuffer.c | 4 ++--
This function should probably be moved elsewhere, too.
---
src/mesa/main/mtypes.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index d092630..af9115e 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -2532
BUFFER_NONE is -1 so no reason for GLint.
---
src/mesa/main/mtypes.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index af9115e..a8e2b39 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3484,7 +3484,7 @@ str
st_src_reg is a class, not a struct. Simply remove 'struct' to silence
a MSVC compiler warning (class vs. struct mismatch).
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/s
IIRC if we wait using SURFACE_SYNC other waits in other rings seemed
to sometimes get insanely long, almost like it got stuck behind it.
However, the shader waits don't have this issue.
On Thu, Nov 9, 2017 at 8:00 PM, Marek Olšák wrote:
> What high priority interactions?
>
> Marek
>
> On Thu, Nov
On Thu, Nov 09, 2017 at 12:59:12AM -0800, Jordan Justen wrote:
> Reviewed-by: Jordan Justen
It's also
Tested-by: Rafael Antognolli
> On 2017-11-08 10:56:00, Kenneth Graunke wrote:
> > Similar to what we did for pixel shader threads - see gen_device_info.c.
> >
> > We don't want to bump the ac
On CNL this bit has been moved to CACHE_MODE_SS register.
We already have this enabled in OpenGL driver.
See Mesa commit 6c681b4cc1
Signed-off-by: Anuj Phogat
Cc: Nanley Chery
Cc: Rafael Antognolli
---
src/intel/genxml/gen10.xml| 12
src/intel/vulkan/genX_state.c | 12
From: Marek Olšák
Fixes piglit - egl_khr_fence_sync/android_native tests.
Broken by 884a0b2a9e55d4c1ca39475b50d9af598d7d7280.
---
src/gallium/include/state_tracker/st_api.h | 2 ++
src/gallium/state_trackers/dri/dri_helpers.c | 2 +-
src/mesa/state_tracker/st_manager.c | 7 +--
3
We already have this workaround in OpenGL driver.
See Mesa commit 3cf4fe2219.
Signed-off-by: Anuj Phogat
Cc: Nanley Chery
Cc: Rafael Antognolli
---
src/intel/vulkan/genX_state.c | 61 +++
1 file changed, 61 insertions(+)
diff --git a/src/intel/vulkan/ge
Reviewed-by: Jason Ekstrand
On Fri, Oct 27, 2017 at 5:05 PM, Francisco Jerez
wrote:
> This makes the dataflow propagation logic of the copy propagation pass
> more intelligent in cases where the destination of a copy is known to
> be undefined for some incoming CFG edges, building upon the
> de
FYI, this breaks:
piglit/bin/bufferstorage-persistent read -auto
and a bunch of others.
Marek
On Mon, Nov 6, 2017 at 11:23 AM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> The idea is to fix the following interleaving of operations
> that can arise from deferred fences:
>
> Thread 1 / Co
From: Roland Scheidegger
r600 used the clamped version for rcp, whereas both evergreen and cayman
used the ieee version. I don't know why that discrepancy exists (it does so
since day 1) but there does not seem to be a valid reason for this, so make
it consistent. This seems now safer than before
What high priority interactions?
Marek
On Thu, Nov 9, 2017 at 6:22 PM, Bas Nieuwenhuizen
wrote:
> Nack. We had that and Andres removed it due to high priority interactions.
>
>
> On 9 Nov 2017 18:01, "Samuel Pitoiset" wrote:
>
> Copied from RadeonSI.
>
> Signed-off-by: Samuel Pitoiset
> ---
>
From: Roland Scheidegger
Both r600 and evergreen used the clamped version, whereas cayman used the
ieee one. I don't think there's a valid reason for this discrepancy, so let's
switch to the ieee version for r600 and evergreen too, since we generally
want to stick to ieee arithmetic.
With this, b
From: Roland Scheidegger
I believe this is the safe thing to do, especially ever since the driver
actually generates NaNs for muls too.
The ISA docs are not very helpful here, however the dx10 versions will pick
a non-nan result over a NaN one (this is also the ieee754 behavior), whereas
the non-
From: Roland Scheidegger
Float rts were always set as unorm instead of float.
Not sure of the consequences, but at least it looks like the blend clamp
would have been enabled, which is against the rules (only eg really bothered
to even attempt to specify this correctly, r600 always used clamp any
From: Roland Scheidegger
The docs are not very concise in what this really does, however both
Alex Deucher and Nicolai Hähnle suggested this only really affects instructions
using the CLAMP output modifier, and I've confirmed that with the newly
changed piglit isinf_and_isnan test.
So, with this
Looks alright to me.
Reviewed-by: Roland Scheidegger
Am 09.11.2017 um 17:46 schrieb Brian Paul:
> Fixes: f1a364878431c8 ("threads: update for late C11 changes")
> ---
> include/c11/threads_win32.h | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/include/c11/threads_
Am 09.11.2017 um 18:58 schrieb Roland Scheidegger:
> Am 09.11.2017 um 18:27 schrieb Jan Vesely:
>> On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote:
>>> From: Roland Scheidegger
>>>
>>> r600 used the clamped version for rcp, whereas both evergreen and cayman
>>> used the ieee version. I
Am 09.11.2017 um 18:27 schrieb Jan Vesely:
> On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote:
>> From: Roland Scheidegger
>>
>> r600 used the clamped version for rcp, whereas both evergreen and cayman
>> used the ieee version. I don't know why that discrepancy exists (it does so
>> sin
Am 09.11.2017 um 18:43 schrieb Jan Vesely:
> On Thu, 2017-11-09 at 18:39 +0100, Nicolai Hähnle wrote:
>> On 09.11.2017 18:26, Roland Scheidegger wrote:
>>> Am 09.11.2017 um 18:19 schrieb Jan Vesely:
On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote:
> From: Roland Scheidegger
>>
On Thu, 2017-11-09 at 18:39 +0100, Nicolai Hähnle wrote:
> On 09.11.2017 18:26, Roland Scheidegger wrote:
> > Am 09.11.2017 um 18:19 schrieb Jan Vesely:
> > > On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote:
> > > > From: Roland Scheidegger
> > > >
> > > > I believe this is the safe t
On 9 November 2017 at 17:23, Jason Ekstrand wrote:
> This is a really rubbish solution. Yes, it fixes a crash in MPV but unless
> we disable all blorp on gen4-5 (which I don't think is possible anymore), we
> haven't actually fixed it for real.
>
Fully agreed - it is nasty.
Skimming through the
On 09.11.2017 18:26, Roland Scheidegger wrote:
Am 09.11.2017 um 18:19 schrieb Jan Vesely:
On Thu, 2017-11-09 at 03:58 +0100, srol...@vmware.com wrote:
From: Roland Scheidegger
I believe this is the safe thing to do, especially ever since the driver
actually generates NaNs for muls too.
Albeit
1 - 100 of 171 matches
Mail list logo