[Mesa-dev] [Bug 108856] floating-point-exceptions in gallium/auxiliary/tgsi/ functions

https://bugs.freedesktop.org/show_bug.cgi?id=108856 --- Comment #4 from popi...@basilisk.fr --- Thanks for your feedback. I understand we may have a different point-of-view due to different fields of application. > But even there, we don't mess with enabling/disabling exceptions, as it's >

Re: [Mesa-dev] [PATCH 1/2] nir: add rewrite_phi_predecessor_blocks() helper

This patch is: Reviewed-by: Thomas Helland Den tir. 27. nov. 2018 kl. 06:32 skrev Timothy Arceri : > > This will also be used by the if merge pass in the following commit. > --- > src/compiler/nir/nir_opt_if.c | 45 ++- > 1 file changed, 28 insertions(+), 17

Re: [Mesa-dev] [PATCH 04/11] st/mesa: Use Array._DrawVAO in st_atom_array.c.

Hi Erik, > > On Monday, 26 November 2018 19:39:50 CET Erik Faye-Lund wrote: > > > I know this is *very* late notice, but this commit broke Super Tux > > > Kart > > > on VirGL. Both the player-models as as well as the level data > > > renders > > > with gibberish vertex positions since this

[Mesa-dev] [PATCH 2/2] nir: merge some basic consecutive ifs

After trying multiple times to merge if-statements with phis between them I've come to the conclusion that it cannot be done without regressions. The problem is for some shaders we end up with a whole bunch of phis for the merged ifs resulting in increased register pressure. So this patch just

[Mesa-dev] [PATCH 1/2] nir: add rewrite_phi_predecessor_blocks() helper

This will also be used by the if merge pass in the following commit. --- src/compiler/nir/nir_opt_if.c | 45 ++- 1 file changed, 28 insertions(+), 17 deletions(-) diff --git a/src/compiler/nir/nir_opt_if.c b/src/compiler/nir/nir_opt_if.c index

Re: [Mesa-dev] [PATCH 2/3] winsys/amdgpu: add support for allocating GDS and OA resources

OA = ordered append (feature of GDS) Marek On Mon, Nov 26, 2018 at 9:08 PM Mike Lothian wrote: > Same for OA > > Cheers > > Mike > > On Tue, 27 Nov 2018, 01:57 Marek Olšák, wrote: > >> From: Marek Olšák >> >> --- >> src/gallium/drivers/radeon/radeon_winsys.h | 4 +- >>

Re: [Mesa-dev] [PATCH 1/3] radeonsi: allow si_cp_dma_clear_buffer to clear GDS from any IB

GDS = Global Data Share (on-chip memory) IB = indirect buffer (command buffer) Marek On Mon, Nov 26, 2018 at 9:07 PM Mike Lothian wrote: > Hi > > What's GDS and IB stand for? > > Thanks > > Mike > > On Tue, 27 Nov 2018, 01:57 Marek Olšák, wrote: > >> From: Marek Olšák >> >> --- >>

Re: [Mesa-dev] [PATCH 2/3] winsys/amdgpu: add support for allocating GDS and OA resources

Same for OA Cheers Mike On Tue, 27 Nov 2018, 01:57 Marek Olšák, wrote: > From: Marek Olšák > > --- > src/gallium/drivers/radeon/radeon_winsys.h | 4 +- > src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 55 +- > 2 files changed, 36 insertions(+), 23 deletions(-) > > diff

Re: [Mesa-dev] [PATCH 1/3] radeonsi: allow si_cp_dma_clear_buffer to clear GDS from any IB

Hi What's GDS and IB stand for? Thanks Mike On Tue, 27 Nov 2018, 01:57 Marek Olšák, wrote: > From: Marek Olšák > > --- > .../drivers/radeonsi/si_compute_blit.c| 4 +- > src/gallium/drivers/radeonsi/si_cp_dma.c | 49 ++- > src/gallium/drivers/radeonsi/si_pipe.h

[Mesa-dev] [PATCH 3/3] radeonsi: add memory management stress tests for GDS

From: Marek Olšák --- src/gallium/drivers/radeonsi/si_pipe.c | 46 ++ src/gallium/drivers/radeonsi/si_pipe.h | 2 ++ 2 files changed, 48 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index

[Mesa-dev] [PATCH 1/3] radeonsi: allow si_cp_dma_clear_buffer to clear GDS from any IB

From: Marek Olšák --- .../drivers/radeonsi/si_compute_blit.c| 4 +- src/gallium/drivers/radeonsi/si_cp_dma.c | 49 ++- src/gallium/drivers/radeonsi/si_pipe.h| 8 +-- .../drivers/radeonsi/si_test_dma_perf.c | 3 +- 4 files changed, 33 insertions(+),

[Mesa-dev] [PATCH 2/3] winsys/amdgpu: add support for allocating GDS and OA resources

From: Marek Olšák --- src/gallium/drivers/radeon/radeon_winsys.h | 4 +- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 55 +- 2 files changed, 36 insertions(+), 23 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h

Re: [Mesa-dev] [PATCH 00/15] nir: Rework boolean (and maybe all?) conversions

On 10/11/18 3:58 am, Jason Ekstrand wrote: In case anyone is wondering my opinion based on my experience writing both patch series, I think it's decidedly in the version B camp.  The code changes required to nir_algebraic and nir_search are almost identical between the two besides the whole

Re: [Mesa-dev] Lets talk about autotools

Ian Romanick writes: > On 11/26/2018 03:44 PM, Marek Olšák wrote: >> I don't run meson. I have a script that runs meson. I want to just run >> the script and I want to it configure or reconfigure. >> >> I don't want to add this failure path into my script: "meson ... || >> meson --reconfigure

Re: [Mesa-dev] Lets talk about autotools

On 11/26/2018 03:44 PM, Marek Olšák wrote: > I don't run meson. I have a script that runs meson. I want to just run > the script and I want to it configure or reconfigure. > > I don't want to add this failure path into my script: "meson ... || > meson --reconfigure ..." I have a similar build

Re: [Mesa-dev] [PATCH 06/15] nir/algebraic: Improve error messages for replace expressions

I'm no python expect but for what its worth patches 1-6 are: Reviewed-by: Timothy Arceri On 9/11/18 2:45 pm, Jason Ekstrand wrote: In bf441d22a7917f38c, I wrote a bunch of descriptive asserts for various bit size checks in the validation of search expressions. This commit improves a few of

Re: [Mesa-dev] Lets talk about autotools

I don't run meson. I have a script that runs meson. I want to just run the script and I want to it configure or reconfigure. I don't want to add this failure path into my script: "meson ... || meson --reconfigure ..." Marek On Mon, Nov 26, 2018 at 6:36 PM Dylan Baker wrote: > You mean you

Re: [Mesa-dev] Lets talk about autotools

You mean you want to change the driver list? meson builddir meson configure builddir -Ddri-drivers= -Dvulkan-drivers= -Dgallium-drivers=radeonsi ninja -C builddir # which will trigger a reconfigure Or was there something else you are trying to do? Dylan Quoting Marek Olšák (2018-11-26

Re: [Mesa-dev] Lets talk about autotools

meson has a design defect that annoys me. I have a configure script. If I want to change enabled drivers and run meson, it won't configure because the directory exists, even if the meson parameters are different. I have to add --reconfigure manually into the script. If I keep --reconfigure in the

[Mesa-dev] [PATCH 1/3] winsys/amdgpu, radeon: pass vm_alignment to buffer_from_handle

From: Marek Olšák --- src/gallium/drivers/r300/r300_texture.c | 2 +- src/gallium/drivers/r600/r600_texture.c | 5 - src/gallium/drivers/radeon/radeon_winsys.h| 1 + src/gallium/drivers/radeonsi/si_texture.c | 5 -

[Mesa-dev] [PATCH 2/3] winsys/amdgpu: use optimal VM alignment for imported buffers

From: Marek Olšák Window system buffers didn't use the optimal alignment. --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 49 ++- 1 file changed, 29 insertions(+), 20 deletions(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c

[Mesa-dev] [PATCH 3/3] winsys/amdgpu: use optimal VM alignment for CPU allocations

From: Marek Olšák --- src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index 7b239695872..a9170a2bc69 100644 ---

Re: [Mesa-dev] Lets talk about autotools

The VA-API state tracker has been fixed, that was a bug. For wayland, I'm not sure what the right thing to do is. The autotools build is equally rigid compared to meson, but it only enables surfaceless and x11 by default on Linux and *BSD, meson enables wayland and drm as well. I think we can

Re: [Mesa-dev] [PATCH 04/11] st/mesa: Use Array._DrawVAO in st_atom_array.c.

Yes, it's the right thread and the right commit for radeonsi. All geometry is broken. I might revert it. Marek On Mon, Nov 26, 2018, 3:56 PM Erik Faye-Lund Uhm, what? Are you sure you're responding to the right email and > linking the right commit? Because, well, this problem has been present >

Re: [Mesa-dev] [PATCH 04/11] st/mesa: Use Array._DrawVAO in st_atom_array.c.

(sorry, forgot to answer one of the questions) On Mon, 2018-11-26 at 21:33 +0100, Mathias Fröhlich wrote: > Hi, > > On Monday, 26 November 2018 19:39:50 CET Erik Faye-Lund wrote: > > I know this is *very* late notice, but this commit broke Super Tux > > Kart > > on VirGL. Both the player-models

Re: [Mesa-dev] [PATCH] mesa/main: fixup requirements for GL_PRIMITIVES_GENERATED

Thanks. Pushed :) On Mon, 2018-11-26 at 12:58 -0800, Mark Janes wrote: > Tested-by: Mark Janes > > Erik Faye-Lund writes: > > > This enum is also allowed by EXT_tessellation_shader, which is > > supported > > on older i965 HW (as opposed to OES_geometry_shader). This was > > missed > > when

[Mesa-dev] [PATCH] gallium: Fix uninitialized variable warning in compute test.

The compiler doesn't know that ny != 0, so x might be uninitialized for the printf at the end. --- src/gallium/tests/trivial/compute.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/tests/trivial/compute.c b/src/gallium/tests/trivial/compute.c index

Re: [Mesa-dev] [PATCH 04/11] st/mesa: Use Array._DrawVAO in st_atom_array.c.

On Mon, 2018-11-26 at 21:33 +0100, Mathias Fröhlich wrote: > Hi, > > On Monday, 26 November 2018 19:39:50 CET Erik Faye-Lund wrote: > > I know this is *very* late notice, but this commit broke Super Tux > > Kart > > on VirGL. Both the player-models as as well as the level data > > renders > >

[Mesa-dev] [Bug 108856] floating-point-exceptions in gallium/auxiliary/tgsi/ functions

https://bugs.freedesktop.org/show_bug.cgi?id=108856 --- Comment #3 from Roland Scheidegger --- FWIW in the example you gave the result wouldn't even be undefined (it would be infinite). Either that was an overflow exception, or what was happening there wasn't quite what you used in the example.

Re: [Mesa-dev] [RFC 1/5] nir: Rename nir_op_fne to nir_op_fneu

Jason Ekstrand writes: > This way, it's explicit in the opcode name that it's an unordered > comparison. > --- > src/amd/common/ac_nir_to_llvm.c | 2 +- > src/compiler/glsl/glsl_to_nir.cpp | 4 +- > src/compiler/nir/nir.h| 2 +- >

Re: [Mesa-dev] [PATCH] mesa/main: fixup requirements for GL_PRIMITIVES_GENERATED

Tested-by: Mark Janes Erik Faye-Lund writes: > This enum is also allowed by EXT_tessellation_shader, which is supported > on older i965 HW (as opposed to OES_geometry_shader). This was missed > when narrowing this code-path, leading to dEQP regressions. > > Bugzilla:

Re: [Mesa-dev] [PATCH 04/11] st/mesa: Use Array._DrawVAO in st_atom_array.c.

Uhm, what? Are you sure you're responding to the right email and linking the right commit? Because, well, this problem has been present here since Mesa 18.1, and that commit went in *today*... Also, it seems very unlikely for a GetTexImage-related commit to change the renndered *geometry*... On

Re: [Mesa-dev] Lets talk about autotools

Was there any conclusion on the idea of "auto" in having the build try to adapt to your systems by default instead of just assuming a configuration? That's the biggest issue I see at the momemt; for many options the current auto-tools build tries to adapt to your system and for the most part does

Re: [Mesa-dev] [PATCH 04/11] st/mesa: Use Array._DrawVAO in st_atom_array.c.

I have this issue on radeonsi as well, but the bad commit is: commit f1998e15ffccf260552bf559abe1a733a8ce990e Author: Erik Faye-Lund Date: Wed Nov 21 20:09:46 2018 +0100 mesa/main: remove ARB suffix from glGetnTexImage This function has been core since OpenGL 4.3, so naming the

Re: [Mesa-dev] [PATCH 04/11] st/mesa: Use Array._DrawVAO in st_atom_array.c.

Hi, On Monday, 26 November 2018 19:39:50 CET Erik Faye-Lund wrote: > I know this is *very* late notice, but this commit broke Super Tux Kart > on VirGL. Both the player-models as as well as the level data renders > with gibberish vertex positions since this commit. > > The fix that Rob Clark did

Re: [Mesa-dev] [PATCH] intel/compiler: Flag surface reads as having side-effects

On Mon, Nov 26, 2018 at 2:08 PM Francisco Jerez wrote: > Jason Ekstrand writes: > > > --- > > src/intel/compiler/brw_shader.cpp | 12 > > 1 file changed, 12 insertions(+) > > > > diff --git a/src/intel/compiler/brw_shader.cpp > b/src/intel/compiler/brw_shader.cpp > > index

Re: [Mesa-dev] [PATCH 7/7] intel/compiler: Release memory used by NIR metadata before generating machine code

On Mon, Nov 26, 2018 at 12:43 PM Ian Romanick wrote: > On 11/21/2018 11:08 AM, Jason Ekstrand wrote: > > On Tue, Nov 20, 2018 at 6:40 PM Ian Romanick > > wrote: > > > > From: Ian Romanick > > > > > > Changes in peak

Re: [Mesa-dev] [PATCH] intel/compiler: Flag surface reads as having side-effects

Jason Ekstrand writes: > --- > src/intel/compiler/brw_shader.cpp | 12 > 1 file changed, 12 insertions(+) > > diff --git a/src/intel/compiler/brw_shader.cpp > b/src/intel/compiler/brw_shader.cpp > index 34b8f3acf93..5cb91e0dce9 100644 > --- a/src/intel/compiler/brw_shader.cpp >

Re: [Mesa-dev] [PATCH] radv: Align large buffers to the fragment size.

On Mon, 26 Nov 2018, 20:48 Marek Olšák You increase both virtual and physical alignment. Are you sure it's > necessary to increase the physical alignment? > Hence the v2 which should not do that. > > Marek > > On Sun, Nov 25, 2018 at 11:13 PM Bas Nieuwenhuizen < > b...@basnieuwenhuizen.nl>

[Mesa-dev] [PATCH] intel/compiler: Flag surface reads as having side-effects

--- src/intel/compiler/brw_shader.cpp | 12 1 file changed, 12 insertions(+) diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 34b8f3acf93..5cb91e0dce9 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@

Re: [Mesa-dev] [PATCH 2/5] i965/icl: Set use full ways in L3CNTLREG

On Mon, Nov 26, 2018 at 11:47 AM Francisco Jerez wrote: > > Anuj Phogat writes: > > > L3 allocation table in h/w specification recommends using 4 KB > > granularity for programming allocation fields in L3CNTLREG. > > > > Signed-off-by: Anuj Phogat > > Cc: Kenneth Graunke > > Cc: Francisco

Re: [Mesa-dev] [PATCH] mesa/main: fixup requirements for GL_PRIMITIVES_GENERATED

Reviewed-by: Marek Olšák Marek On Mon, Nov 26, 2018 at 2:45 PM Erik Faye-Lund wrote: > This enum is also allowed by EXT_tessellation_shader, which is supported > on older i965 HW (as opposed to OES_geometry_shader). This was missed > when narrowing this code-path, leading to dEQP regressions.

Re: [Mesa-dev] [PATCH 4/7] winsys/amdgpu: clean up code around BO VM alignment

On Mon, Nov 26, 2018 at 8:46 AM Bas Nieuwenhuizen wrote: > patches 4-7 are > > Reviewed-by: Bas Nieuwenhuizen > > though I agree with Christian that it would be nice to get a case > where 7 improves things before we submit it. > > For patches 1-3 I need to dive into the slab allocator before I

Re: [Mesa-dev] [PATCH 1/3] virgl: quadruple command buffer size

On Mon, 2018-11-26 at 09:54 -0800, Gurchetan Singh wrote: > Tested running WebGL aquarium on Nvidia host (10,000 fishes) > > This moves us from 7 fps to 9 fps. After quadrupling, performance > gains diminish. > > v2: Remove change ID (Erik) > > Tested-By: Gert Wollny > For the series:

Re: [Mesa-dev] [PATCH 5/5] anv/icl: Set use full ways in L3CNTLREG

Anuj Phogat writes: > L3 allocation table in h/w specification recommends using 4 KB > granularity for programming allocation fields in L3CNTLREG. > > Signed-off-by: Anuj Phogat > Cc: Kenneth Graunke > Cc: Francisco Jerez > Cc: Lionel Landwerlin Reviewed-by: Francisco Jerez > --- >

Re: [Mesa-dev] [PATCH] radv: Align large buffers to the fragment size.

You increase both virtual and physical alignment. Are you sure it's necessary to increase the physical alignment? Marek On Sun, Nov 25, 2018 at 11:13 PM Bas Nieuwenhuizen wrote: > Improves performance in Talos by about 15% (and significant improvements > in RotR and possibly other but did not

Re: [Mesa-dev] [PATCH 3/5] intel/icl: Set way_size_per_bank to 4

Anuj Phogat writes: > Signed-off-by: Anuj Phogat > Cc: Kenneth Graunke > Cc: Francisco Jerez > Cc: Lionel Landwerlin Reviewed-by: Francisco Jerez > --- > src/intel/common/gen_l3_config.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git

Re: [Mesa-dev] [PATCH 2/5] i965/icl: Set use full ways in L3CNTLREG

Anuj Phogat writes: > L3 allocation table in h/w specification recommends using 4 KB > granularity for programming allocation fields in L3CNTLREG. > > Signed-off-by: Anuj Phogat > Cc: Kenneth Graunke > Cc: Francisco Jerez > Cc: Lionel Landwerlin > --- >

[Mesa-dev] [PATCH] mesa/main: fixup requirements for GL_PRIMITIVES_GENERATED

This enum is also allowed by EXT_tessellation_shader, which is supported on older i965 HW (as opposed to OES_geometry_shader). This was missed when narrowing this code-path, leading to dEQP regressions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108868 Fixes: f09d94fbd11 "mesa/main:

Re: [Mesa-dev] [PATCH V2 1/4] i965/icl: Fix L3 configurations

Anuj Phogat writes: > Use L3 configuration specified in h/w specification. > > V2: Drop configs which do under allocation of l3 cache. > Bump up the comment above table. > > Signed-off-by: Anuj Phogat > Cc: Kenneth Graunke > Cc: Francisco Jerez Reviewed-by: Francisco Jerez > --- >

[Mesa-dev] [PATCH 3.1/7] util/slab: Rename slab_mempool typed parameters to mempool

From: Ian Romanick Now everything with type 'struct slab_child_pool *' is name pool, and everything with type 'struct slab_mempool *' is named mempool. Signed-off-by: Ian Romanick Cc: Nicolai Hähnle --- src/util/slab.c | 20 ++-- src/util/slab.h | 8 2 files

[Mesa-dev] [PATCH v2 3.2/7] util/slab: Add function to flush allocations from a child pool

From: Ian Romanick Ralloc has a feature that all allocations from a temporary memory context can be whisked away in a single call without fear of leaks. As the slab allocator is designed for use in multhreaded scenarios with a child pool per CPU, it lacks this feature. However, many users will

[Mesa-dev] [ANNOUNCE] Mesa 18.2.6 release candidate

Hello list, The candidate for the Mesa 18.2.6 is now available. Currently we have: - 40 queued (+1 squashed) - 0 nominated (outstanding) - and 7 rejected patch The current queue consists of: Several patches fixing leaks in glsl, winsys and r600. Improvements in the scripts that helps in

Re: [Mesa-dev] [PATCH 7/7] intel/compiler: Release memory used by NIR metadata before generating machine code

On 11/21/2018 11:08 AM, Jason Ekstrand wrote: > On Tue, Nov 20, 2018 at 6:40 PM Ian Romanick > wrote: > > From: Ian Romanick > > > Changes in peak memory usage according to Valgrind massif: > > mean soft fp64 using

Re: [Mesa-dev] [PATCH 04/11] st/mesa: Use Array._DrawVAO in st_atom_array.c.

On Mon, 2018-05-07 at 08:14 +0200, mathias.froehl...@gmx.net wrote: > From: Mathias Fröhlich > > Finally make use of the binding information in the VAO when > setting up arrays for draw. > > v2: Emit less relocations also for interleaved userspace arrays. > > Signed-off-by: Mathias Fröhlich

Re: [Mesa-dev] [PATCH mesa 2/2] build: stop defining unused VERSION

Quoting Eric Engestrom (2018-11-25 09:11:57) > Scons and autotools don't define it, and as of last commit nothing > uses it. > > `VERSION` is also a generic enough name that something somewhere will > eventually clash, and we don't want to repeat the LLVM `DEBUG` fiasco. > > Signed-off-by: Eric

[Mesa-dev] [PATCH 2/3] virgl: avoid large inline transfers

We flush everytime the command buffer (16 kB) is full, which is quite costly. This improves dEQP-GLES3.performance.buffer.data_upload.function_call.buffer_data.new_buffer.usage_stream_draw from 111.16 MB/s to 1930.36 MB/s. In addition, I made the benchmark produce buffers from 0 -->

[Mesa-dev] [PATCH 3/3] virgl: don't mark buffers as unclean after a write

We can mark the buffer unclean if it's ever bound as a TBO, SSBO, ABO, or image. This improves dEQP-GLES3.performance.buffer.data_upload.function_call.map_buffer_range.new_specified_buffer.flag_write_full.stream_draw from 9.58 MB/s to 451.17 MB/s. v2: Track buffer cleanliness as a function of

[Mesa-dev] [PATCH 1/3] virgl: quadruple command buffer size

Tested running WebGL aquarium on Nvidia host (10,000 fishes) This moves us from 7 fps to 9 fps. After quadrupling, performance gains diminish. v2: Remove change ID (Erik) Tested-By: Gert Wollny --- src/gallium/drivers/virgl/virgl_winsys.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [Mesa-dev] [PATCH mesa 2/2] build: stop defining unused VERSION

On Sun, 25 Nov 2018 at 17:12, Eric Engestrom wrote: > > Scons and autotools don't define it, and as of last commit nothing > uses it. > > `VERSION` is also a generic enough name that something somewhere will > eventually clash, and we don't want to repeat the LLVM `DEBUG` fiasco. > >

[Mesa-dev] [PATCH 3/3] radv: Check for shareable images in central place.

One place to put the logic makes things easier to change. --- src/amd/vulkan/radv_image.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 7c0ecb89661..c459e81379b 100644 ---

[Mesa-dev] [PATCH 2/3] radv/android: Use buffer metadata to determine scanout compat.

These days we don't always allocate scanout compatible textures anymore. That does mean we have to fix the radv android WSI though. Fixes: b1444c9ccb0 "radv: Implement VK_ANDROID_native_buffer." --- src/amd/vulkan/radv_android.c | 73 ++-

[Mesa-dev] [PATCH 1/3] radv/android: Mark android WSI image as shareable.

Fixes: b1444c9ccb0 "radv: Implement VK_ANDROID_native_buffer." --- src/amd/vulkan/radv_android.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_android.c b/src/amd/vulkan/radv_android.c index f5d70825dd2..93799b87b8f 100644 ---

Re: [Mesa-dev] [PATCH] nir: Fix assert in print_intrinsic_instr().

On 26/11/2018 15:04, Józef Kucia wrote: Signed-off-by: Józef Kucia Reviewed-by: Lionel Landwerlin --- src/compiler/nir/nir_print.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c index

[Mesa-dev] [PATCH] nir: Fix assert in print_intrinsic_instr().

Signed-off-by: Józef Kucia --- src/compiler/nir/nir_print.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c index e20c28fec874..9ecb2a7c54e6 100644 --- a/src/compiler/nir/nir_print.c +++

[Mesa-dev] [Bug 108856] floating-point-exceptions in gallium/auxiliary/tgsi/ functions

https://bugs.freedesktop.org/show_bug.cgi?id=108856 --- Comment #2 from popi...@basilisk.fr --- Thanks for your quick reply. IMHO a numerical algorithm/code which uses the results from undefined mathematical operations should be considered wrong. In effect, I believe that the default

[Mesa-dev] [Bug 108823] [Bisected]. Autotools. Installing mesa fails with error "error: relink 'libEGL.la' with the above command before installing it"

https://bugs.freedesktop.org/show_bug.cgi?id=108823 --- Comment #1 from Denis --- any ideas what could be wrong, guys? Issue is still actual for my PC, using autotools -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the

[Mesa-dev] [Bug 108856] floating-point-exceptions in gallium/auxiliary/tgsi/ functions

https://bugs.freedesktop.org/show_bug.cgi?id=108856 --- Comment #1 from Roland Scheidegger --- I do not think this is a mesa problem. (Note I believe you could trigger fpe even without gallium osmesa, but you might need to try harder.) As far as I can tell, the "workaround" is the correct

Re: [Mesa-dev] [PATCH 4/7] winsys/amdgpu: clean up code around BO VM alignment

patches 4-7 are Reviewed-by: Bas Nieuwenhuizen though I agree with Christian that it would be nice to get a case where 7 improves things before we submit it. For patches 1-3 I need to dive into the slab allocator before I have enough knowledge to review. On Sat, Nov 24, 2018 at 12:41 AM Marek

[Mesa-dev] [PATCH] intel/compiler: fix regs_equal for 64-bit integers

--- src/intel/compiler/brw_reg.h | 59 ++-- 1 file changed, 29 insertions(+), 30 deletions(-) diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h index 46d66198a1..860c18e475 100644 --- a/src/intel/compiler/brw_reg.h +++

Re: [Mesa-dev] [PATCH] radeonsi: clean up primitive binning enablement

Reviewed-by: Bas Nieuwenhuizen On Sat, Nov 24, 2018 at 12:34 AM Marek Olšák wrote: > > From: Marek Olšák > > no change in behavior. > --- > src/gallium/drivers/radeonsi/si_pipe.c | 27 +++--- > 1 file changed, 16 insertions(+), 11 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH 6/6] mesa/main: fix incorrect detph-error

On Mon, 2018-11-26 at 13:16 +0100, Juan A. Suarez Romero wrote: > On Mon, 2018-11-26 at 13:13 +0100, Erik Faye-Lund wrote: > > On Mon, 2018-11-26 at 13:06 +0100, Juan A. Suarez Romero wrote: > > > On Thu, 2018-11-22 at 17:48 +0100, Erik Faye-Lund wrote: > > > > If glGetTexImage or glGetnTexImage

Re: [Mesa-dev] [PATCH] d3dadapter9: use snprintf(..., "%s", ...) instead of strncpy

On 25/11/2018 17:23, Axel Davy wrote: Reading https://developers.redhat.com/blog/2018/05/24/detecting-string-truncation-with-gcc-8/ I think the snprintf variant suffers from the same issue, and the compiler is just not yet able to detect it, and send the same warning (but it might do in

Re: [Mesa-dev] [PATCH 6/6] mesa/main: fix incorrect detph-error

On Mon, 2018-11-26 at 13:13 +0100, Erik Faye-Lund wrote: > On Mon, 2018-11-26 at 13:06 +0100, Juan A. Suarez Romero wrote: > > On Thu, 2018-11-22 at 17:48 +0100, Erik Faye-Lund wrote: > > > If glGetTexImage or glGetnTexImage is called with a level that > > > doesn't > > > exist, we get an error

Re: [Mesa-dev] [PATCH 6/6] mesa/main: fix incorrect detph-error

On Mon, 2018-11-26 at 13:06 +0100, Juan A. Suarez Romero wrote: > On Thu, 2018-11-22 at 17:48 +0100, Erik Faye-Lund wrote: > > If glGetTexImage or glGetnTexImage is called with a level that > > doesn't > > exist, we get an error message on this form: > > > > Mesa: User error: GL_INVALID_VALUE in

Re: [Mesa-dev] [PATCH 6/6] mesa/main: fix incorrect detph-error

On Thu, 2018-11-22 at 17:48 +0100, Erik Faye-Lund wrote: > If glGetTexImage or glGetnTexImage is called with a level that doesn't > exist, we get an error message on this form: > > Mesa: User error: GL_INVALID_VALUE in glGetTexImage(depth = 0) > > This is clearly nonsensical, because these APIs

Re: [Mesa-dev] [PATCH mesa 2/2] build: stop defining unused VERSION

Reviewed-by: Bas Nieuwenhuizen for both. On Mon, Nov 26, 2018 at 5:14 AM Eric Engestrom wrote: > > Scons and autotools don't define it, and as of last commit nothing > uses it. > > `VERSION` is also a generic enough name that something somewhere will > eventually clash, and we don't want to

Re: [Mesa-dev] [PATCH mesa] anv: correctly use vulkan 1.0 by default

Reviewed-by: Bas Nieuwenhuizen On Mon, Nov 26, 2018 at 5:14 AM Lionel Landwerlin wrote: > > On 23/11/2018 19:47, Eric Engestrom wrote: > > Per chapter 3.2 "Instances": > >> Providing a NULL VkInstanceCreateInfo::pApplicationInfo or providing > >> an apiVersion of 0 is equivalent to providing an

Re: [Mesa-dev] [PATCH] radv: only allocate HTILE if depth/stencil attachment usage is used

Reviewed-by: Bas Nieuwenhuizen On Fri, Nov 23, 2018 at 5:04 PM Samuel Pitoiset wrote: > > Apparently some games allocate depth buffers without rendering > to them, this will avoid wasting memory if that image usage > flag is not set. > > Signed-off-by: Samuel Pitoiset > --- >

[Mesa-dev] [PATCH] radv: Added framebuffer emission at subpass start

Framebuffers only emit at point of draw call. As secondary command buffers can be recorded without a given framebuffer, this is problematic when the recorded buffer is used within a primary buffer's render/sub pass meaning framebuffer state may never be emitted. Framebuffer state will now also be