Re: [Mesa-dev] [PATCH] nir/lower_tex: Add an assert() in nir_lower_txs_lod()

Thanks! Reviewed-by: Jason Ekstrand On Wed, Jun 19, 2019 at 8:09 AM Boris Brezillon < boris.brezil...@collabora.com> wrote: > We don't expect the output of a TXS instruction to be wider than a > vec3. Add an assert() to make sure this never happens. > > Suggested-by: Jason Ekstrand >

[Mesa-dev] [PATCH 5/8] radeonsi: don't set spi_ps_input_* for monolithic shaders

From: Marek Olšák The driver doesn't use these values and ac_rtld has assertions expecting the value of 0. --- src/gallium/drivers/radeonsi/si_shader.c | 39 1 file changed, 26 insertions(+), 13 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c

[Mesa-dev] [PATCH 2/8] amd/rtld: update the ELF representation of LDS symbols

From: Nicolai Hähnle The initial prototype used a processor-specific symbol type, but feedback suggests that an approach using processor-specific section name that encodes the alignment analogous to SHN_COMMON symbols is preferred. This patch keeps both variants around for now to reduce

[Mesa-dev] [PATCH 8/8] radeonsi: rename and re-document cache flush flags

From: Marek Olšák SMEM and VMEM caches are L0 on gfx10. --- src/gallium/drivers/radeonsi/si_compute.c | 2 +- .../drivers/radeonsi/si_compute_blit.c| 12 +++--- src/gallium/drivers/radeonsi/si_descriptors.c | 2 +- src/gallium/drivers/radeonsi/si_gfx_cs.c | 8 ++--

[Mesa-dev] [PATCH 6/8] radeonsi: flatten the switch for DPBB tunables

From: Marek Olšák --- .../drivers/radeonsi/si_state_binning.c| 18 -- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c index 6285ccc28c2..a6b1830b661 100644

[Mesa-dev] [PATCH 4/8] radeonsi: set the calling convention for inlined function calls

From: Marek Olšák otherwise the behavior is undefined --- src/amd/common/ac_llvm_build.c | 8 src/amd/common/ac_llvm_build.h | 3 +++ src/gallium/drivers/radeonsi/si_compute_prim_discard.c | 2 +- src/gallium/drivers/radeonsi/si_shader.c

[Mesa-dev] [PATCH 1/8] ac/surface: remove addrlib_family_rev_id

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 2 + src/amd/common/ac_gpu_info.h | 2 + src/amd/common/ac_surface.c | 111 +-- 3 files changed, 7 insertions(+), 108 deletions(-) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c

[Mesa-dev] [PATCH 3/8] radeonsi: refactor si_update_vgt_shader_config

From: Nicolai Hähnle We'll have to extend this at some point, and using a bitfield union in this way makes it easier to get the right index without excessive branching. --- src/gallium/drivers/radeonsi/si_pipe.h| 23 ++- .../drivers/radeonsi/si_state_shaders.c | 65

[Mesa-dev] [Bug 110673] amdgpu hevc encoding problems: segment fault and contents of garbage

https://bugs.freedesktop.org/show_bug.cgi?id=110673 zhoulei changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

Re: [Mesa-dev] [PATCH 1/2] nir/loop_analyze: used nir_alu_src to track loop limit

On 20/6/19 5:57 am, Jason Ekstrand wrote: On Wed, Jun 19, 2019 at 3:09 AM Timothy Arceri > wrote: This helps reduce the amount of abstraction in this pass and allows us to retain more information about the src such as any swizzles. Retaining the

Re: [Mesa-dev] [PATCH] llvmpipe: make remove_shader_variant static.

On Thu, Jun 20, 2019 at 06:47:25AM +1000, Dave Airlie wrote: > From: Dave Airlie > > this isn't used outside this file. > --- > src/gallium/drivers/llvmpipe/lp_state_fs.c | 2 +- > src/gallium/drivers/llvmpipe/lp_state_fs.h | 4 > 2 files changed, 1 insertion(+), 5 deletions(-) This patch

Re: [Mesa-dev] [PATCH 1/2] nir/loop_analyze: used nir_alu_src to track loop limit

On 20/6/19 5:57 am, Jason Ekstrand wrote: On Wed, Jun 19, 2019 at 3:09 AM Timothy Arceri > wrote: This helps reduce the amount of abstraction in this pass and allows us to retain more information about the src such as any swizzles. Retaining the

Re: [Mesa-dev] [PATCH 1/2] nir/loop_analyze: used nir_alu_src to track loop limit

On 19/6/19 11:55 pm, Brian Paul wrote: On 06/19/2019 02:08 AM, Timothy Arceri wrote: This helps reduce the amount of abstraction in this pass and allows us to retain more information about the src such as any swizzles. Retaining the swizzle information is required for a bugfix in the following

[Mesa-dev] [Bug 110673] amdgpu hevc encoding problems: segment fault and contents of garbage

https://bugs.freedesktop.org/show_bug.cgi?id=110673 --- Comment #7 from Boyuan Zhang --- (In reply to zhoulei from comment #6) > (In reply to Boyuan Zhang from comment #5) > > Hi Zhoulei, > > > > I fixed the second issue you reported (cbr/vbr corruption for hevc > > encoding). > > > > Please

[Mesa-dev] [Bug 110603] Blocky and black opacity/alpha using RADV on some games

https://bugs.freedesktop.org/show_bug.cgi?id=110603 --- Comment #6 from tivob...@hostguru.top --- I experienced a visually similar issue in witcher3 after updating my gentoo system with a RX 570. Notable changes: - installed mesa 19.1 (from 19.0.x, not sure which exact version) - updated wine to

[Mesa-dev] [PATCH] radeon/uvd: enable rate control for hevc encoding

From: Boyuan Zhang Set cu_qp_delta_enable_flag on when rate control is enabled, and set it off when rate control is disabled (e.g. constant qp). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673 Cc: mesa-sta...@lists.freedesktop.org V2: fix typo and add bugzilla info

[Mesa-dev] [PATCH] radeon/vcn: enable rate control for hevc encoding

From: Boyuan Zhang Set cu_qp_delta_enable_flag on when rate control is enabled, and set it off when rate control is disabled (e.g. constant qp). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673 Cc: mesa-sta...@lists.freedesktop.org V2: fix typo and add bugzilla info

[Mesa-dev] [PATCH] llvmpipe: make remove_shader_variant static.

From: Dave Airlie this isn't used outside this file. --- src/gallium/drivers/llvmpipe/lp_state_fs.c | 2 +- src/gallium/drivers/llvmpipe/lp_state_fs.h | 4 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs.c

Re: [Mesa-dev] [PATCH] android: virgl: fix libmesa_virgil_common build and dependencies

On Sat, Jun 15, 2019 at 07:39:02AM +0200, Mauro Rossi wrote: Fixes the following building errors and resolves Bug 110922 Fixes gallium_dri target missing symbols at linking. Tested in CI, android build test completes successfully. Feel free to add my tested-by. Thanks for the fix!

Re: [Mesa-dev] [PATCH 1/2] nir/loop_analyze: used nir_alu_src to track loop limit

On Wed, Jun 19, 2019 at 3:09 AM Timothy Arceri wrote: > This helps reduce the amount of abstraction in this pass and allows > us to retain more information about the src such as any swizzles. > Retaining the swizzle information is required for a bugfix in the > following patch. > > Fixes:

Re: [Mesa-dev] [PATCH] radeon/vcn: enable rate control for hevc encoding

Please tag the bugzilla link to the commit messages. With that, the set of patches are Acked-by: Leo Liu On 2019-06-17 3:07 p.m., boyuan.zh...@amd.com wrote: > From: Boyuan Zhang > > Set cu_qp_delta_enable_flag on when rate control is enabled, and it > off when no rate control is disabled

[Mesa-dev] [PATCH 10/10] panfrost: Remove other commented pointers

Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/pandecode/decode.c | 4 1 file changed, 4 deletions(-) diff --git a/src/gallium/drivers/panfrost/pandecode/decode.c b/src/gallium/drivers/panfrost/pandecode/decode.c index ce948f9ce02..5bc6dd84c60 100644 ---

[Mesa-dev] [PATCH 08/10] panfrost/decode: Remove memory comments

These do more harm than good at this point. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/pandecode/decode.c | 20 --- 1 file changed, 20 deletions(-) diff --git a/src/gallium/drivers/panfrost/pandecode/decode.c

[Mesa-dev] [PATCH 01/10] panfrost/decode: Identify "compute FBD"

There is fundamentally not a framebuffer associated with a compute job. Allocate a new structure for it so we don't mess up graphics when decoding. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/include/panfrost-job.h | 7 ++ .../drivers/panfrost/pandecode/decode.c | 22

[Mesa-dev] [PATCH 07/10] panfrost: Add missing 0x in invocation_count

Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/pandecode/decode.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/panfrost/pandecode/decode.c b/src/gallium/drivers/panfrost/pandecode/decode.c index 76baa06dda2..2c74d807d63 100644 ---

[Mesa-dev] [PATCH 09/10] panfrost/decode: Elide more zero fields

Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/pandecode/decode.c | 22 ++- 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/panfrost/pandecode/decode.c b/src/gallium/drivers/panfrost/pandecode/decode.c index

[Mesa-dev] [PATCH 06/10] panfrost/decode: Skip decode of fragment backend in non-fragment

This is all zero for anything but fragment shaders. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/pandecode/decode.c | 72 --- 1 file changed, 48 insertions(+), 24 deletions(-) diff --git a/src/gallium/drivers/panfrost/pandecode/decode.c

[Mesa-dev] [PATCH 03/10] panfrost/decode: Show int uniforms

Float is ambiguous. Signed-off-by: Alyssa Rosenzweig --- src/gallium/drivers/panfrost/pandecode/decode.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/panfrost/pandecode/decode.c b/src/gallium/drivers/panfrost/pandecode/decode.c index

[Mesa-dev] [PATCH 05/10] panfrost/decode: Clip mali_compute_fbd at 64-bytes

Looking at internal evidence (later fields including a literal other compute job inception-style, seeming memory corruption, no clear function, and the field after this being a pointer to *itself*), it looks like this is really a much smaller descriptor. Signed-off-by: Alyssa Rosenzweig ---

[Mesa-dev] [PATCH 02/10] panfrost/decode: Expand pointers in compute descriptor

Just as an aid. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/include/panfrost-job.h | 11 ++- .../drivers/panfrost/pandecode/decode.c | 30 +++ 2 files changed, 34 insertions(+), 7 deletions(-) diff --git

[Mesa-dev] [PATCH 04/10] panfrost/decode: Print COMPUTE uniforms as pointers

In OpenGL, uniforms generally represent fp32 vec4s (at least in highp mode). In OpenCL, they represent vec2s of 64-bit pointers. Signed-off-by: Alyssa Rosenzweig --- .../drivers/panfrost/pandecode/decode.c | 25 ++- 1 file changed, 24 insertions(+), 1 deletion(-) diff

[Mesa-dev] [PATCH 00/10] panfrost: Decode improvements for compute

This series includes a number of assorted improvements to the decode infrastructure to make compute shaders easier to read. Alyssa Rosenzweig (10): panfrost/decode: Identify "compute FBD" panfrost/decode: Expand pointers in compute descriptor panfrost/decode: Show int uniforms

Re: [Mesa-dev] [PATCH 9/9] panfrost: Enable sRGB

> Actually, I think this is the commit that introduced these regressions: > > panfrost: Figure out job requirements in pan_job.c ...Hmm. signature.asc Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

Re: [Mesa-dev] [PATCH 9/9] panfrost: Enable sRGB

On Wed, 19 Jun 2019 at 07:44, Tomeu Vizoso wrote: > > On Tue, 18 Jun 2019 at 17:00, Alyssa Rosenzweig > wrote: > > > > Now that sRGB formats are supported for both rendering and sampling, > > advertise support. > > > > Signed-off-by: Alyssa Rosenzweig > > Hi there, > > this patch seems to have

Re: [Mesa-dev] [PATCH 1/2] nir/loop_analyze: used nir_alu_src to track loop limit

On 06/19/2019 02:08 AM, Timothy Arceri wrote: This helps reduce the amount of abstraction in this pass and allows us to retain more information about the src such as any swizzles. Retaining the swizzle information is required for a bugfix in the following patch. Fixes: 6772a17acc8e ("nir: Add a

[Mesa-dev] [PATCH] nir/lower_tex: Add an assert() in nir_lower_txs_lod()

We don't expect the output of a TXS instruction to be wider than a vec3. Add an assert() to make sure this never happens. Suggested-by: Jason Ekstrand Signed-off-by: Boris Brezillon --- src/compiler/nir/nir_lower_tex.c | 1 + 1 file changed, 1 insertion(+) diff --git

Re: [Mesa-dev] [PATCH v2 1/5] nir/lower_tex: Add a way to lower TXS(non-0-LOD) instructions

Hi Jason, On Tue, 18 Jun 2019 09:45:56 -0500 Jason Ekstrand wrote: > On Tue, Jun 18, 2019 at 2:38 AM Boris Brezillon < > boris.brezil...@collabora.com> wrote: > > > The V3D driver has an open-coded solution for this, and we need the > > same thing for Panfrost, so let's add a generic way to

[Mesa-dev] [Bug 110939] src/egl/main/egldisplay.c: In function '_eglGetNativePlatform': error: '_EGL_PLATFORM_' undeclared

https://bugs.freedesktop.org/show_bug.cgi?id=110939 --- Comment #12 from Eric Engestrom --- FWIW the empty string thing is a know issue that will be fixed once we bump our requirement to meson 0.47; the MR has been around for a while: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/386

Re: [Mesa-dev] [PATCH 1/6] radv: initialize levels without DCC during layout transitions

On 6/19/19 11:03 AM, Bas Nieuwenhuizen wrote: Actually, retract r-b, please fix the legacy accesses on gfx9+ too. Yes, I will fix and send v2. On Wed, Jun 19, 2019, 11:02 AM Bas Nieuwenhuizen mailto:b...@basnieuwenhuizen.nl>> wrote: R-b On Tue, Jun 18, 2019, 4:12 PM Samuel

Re: [Mesa-dev] [PATCH] radv: disable viewport clamping even if FS doesn't write Z

R-b On Tue, Jun 18, 2019, 6:55 PM Samuel Pitoiset wrote: > This fixes new CTS dEQP-VK.pipeline.depth_range_unrestricted.*. > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_pipeline.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH 1/6] radv: initialize levels without DCC during layout transitions

R-b On Tue, Jun 18, 2019, 4:12 PM Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_cmd_buffer.c | 40 +++- > 1 file changed, 39 insertions(+), 1 deletion(-) > > diff --git a/src/amd/vulkan/radv_cmd_buffer.c >

Re: [Mesa-dev] [PATCH 1/6] radv: initialize levels without DCC during layout transitions

Actually, retract r-b, please fix the legacy accesses on gfx9+ too. On Wed, Jun 19, 2019, 11:02 AM Bas Nieuwenhuizen wrote: > R-b > > On Tue, Jun 18, 2019, 4:12 PM Samuel Pitoiset > wrote: > >> Signed-off-by: Samuel Pitoiset >> --- >> src/amd/vulkan/radv_cmd_buffer.c | 40

[Mesa-dev] [PATCH 1/6] gallium/util: Make u_debug_flush support persistent maps

From: Thomas Hellstrom Previously unsynchronized maps have been assumed to also be persistent, Now destinguish between persistent and unsynchronized map and also support PIPE_TRANSFER_PERSISTENT from ARB_buffer_storage. Signed-off-by: Thomas Hellstrom Reviewed-by: Brian Paul ---

[Mesa-dev] [PATCH 4/6] svga: Map vertex- index- and constant buffers ansynchronously when reading

From: Thomas Hellstrom With SWTNL and index translation we're mapping buffers for reading. These buffers are commonly upload_mgr buffers that might already be referenced by another submitted or unsubmitted GPU command. A synchronous map will then trigger a flush and sync, at least on Linux that

[Mesa-dev] [PATCH 3/6] svga: Fix index buffer uploads

From: Thomas Hellstrom In the case of SWTNL and index translation we were uploading index buffers and then reading out from them using the CPU. Furthermore, when translating indices we often cached the results with an upload_mgr buffer, causing the cached indexes to be immediately discarded on

[Mesa-dev] [PATCH 2/6] winsys/svga: Make it possible to specify coherent resources

From: Thomas Hellstrom Add a flag in the surface cache key and a winsys usage flag to specify coherent memory. Signed-off-by: Thomas Hellstrom Reviewed-by: Brian Paul --- src/gallium/drivers/svga/svga_screen_cache.c | 2 ++ src/gallium/drivers/svga/svga_screen_cache.h | 1 +

[Mesa-dev] [PATCH 5/6] gallium/util: Make it possible to disable persistent maps in the upload manager

From: Thomas Hellstrom For svga, the use of persistent / coherent maps is typically slightly slower than without them. It's probably a bit case-dependent and possible to tune, but for now, make sure we can disable those. Signed-off-by: Thomas Hellstrom Reviewed-by: Brian Paul ---

[Mesa-dev] [PATCH 6/6] svga: Support ARB_buffer_storage

From: Thomas Hellstrom This basically boils down to supporting persistent and coherent buffer storage. We chose to use coherent buffer storage for all persistent buffers even if it's not explicitly specified, since using glMemoryBarrier to obtain coherency would be particularly expensive in our

[Mesa-dev] [PATCH 2/2] nir/loop_analyze: handle swizzles on the loop limit

Fixes: 6772a17acc8e ("nir: Add a loop analysis pass") --- src/compiler/nir/nir_loop_analyze.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir_loop_analyze.c b/src/compiler/nir/nir_loop_analyze.c index 57d2d94cad2..79ed5bb2712 100644 ---

[Mesa-dev] [PATCH 1/2] nir/loop_analyze: used nir_alu_src to track loop limit

This helps reduce the amount of abstraction in this pass and allows us to retain more information about the src such as any swizzles. Retaining the swizzle information is required for a bugfix in the following patch. Fixes: 6772a17acc8e ("nir: Add a loop analysis pass") ---

[Mesa-dev] [Bug 110673] amdgpu hevc encoding problems: segment fault and contents of garbage

https://bugs.freedesktop.org/show_bug.cgi?id=110673 --- Comment #6 from zhoulei --- (In reply to Boyuan Zhang from comment #5) > Hi Zhoulei, > > I fixed the second issue you reported (cbr/vbr corruption for hevc encoding). > > Please give a try using this patch: >

Re: [Mesa-dev] [PATCH] radv: implement compressed FMASK texture reads with RADV_PERFTEST=tccompatcmask

Oops. No, r-b On Wed, Jun 19, 2019, 9:48 AM Samuel Pitoiset wrote: > > On 6/17/19 12:24 PM, Bas Nieuwenhuizen wrote: > > > > > On Thu, Jun 13, 2019, 3:42 PM Samuel Pitoiset > wrote: > >> This allows us to disable the FMASK decompress pass when >> transitioning from CB writes to shader reads.

Re: [Mesa-dev] [PATCH] radv: implement compressed FMASK texture reads with RADV_PERFTEST=tccompatcmask

On 6/17/19 12:24 PM, Bas Nieuwenhuizen wrote: On Thu, Jun 13, 2019, 3:42 PM Samuel Pitoiset mailto:samuel.pitoi...@gmail.com>> wrote: This allows us to disable the FMASK decompress pass when transitioning from CB writes to shader reads. This will likely be improved and

Re: [Mesa-dev] [PATCH 5/6] radv: do not fast clears if one level can't be fast cleared

On 6/19/19 1:38 AM, Bas Nieuwenhuizen wrote: On Tue, Jun 18, 2019 at 4:12 PM Samuel Pitoiset wrote: And fallback to slow color clears. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_clear.c | 14 ++ 1 file changed, 14 insertions(+) diff --git

[Mesa-dev] [Bug 110922] [regression][bisected] Android build test fails to include libmesa_winsys_virgl_common

https://bugs.freedesktop.org/show_bug.cgi?id=110922 --- Comment #1 from Tapani Pälli --- Fix posted: https://lists.freedesktop.org/archives/mesa-dev/2019-June/220233.html -- You are receiving this mail because: You are the QA Contact for the bug.___

Re: [Mesa-dev] [PATCH] android: virgl: fix libmesa_virgil_common build and dependencies

On 6/15/19 8:42 AM, Mauro Rossi wrote: Hi, there is a typo in the commit title, the library is libmesa_winsys_virgl_common I will correct it in the final commit Reviewed-by: Tapani Pälli Mauro On Sat, Jun 15, 2019 at 7:39 AM Mauro Rossi > wrote: