[Mesa-dev] [PATCH 11/14] i965: Move fs_visitor ra pass to new fs_visitor::allocate_registers()

This will be reused for the scalar VS pass. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_fs.cpp | 132 +++ src/mesa/drivers/dri/i965/brw_fs.h | 1 + 2 files changed, 71 insertions(+), 62 deletions(-) diff --git a/src/mesa/drivers/dri

[Mesa-dev] [PATCH 00/14] SIMD8 vertex shaders for BDW+

With Broadwell we have the option to run vertex shaders in scalar (SIMD8) mode which potentially gives us better throughput and more vertices per thread dispatch. This patch series implements this by repurposing our fs backend to also work for vertex shaders. Kristian Høgsberg (14): i965

Re: [Mesa-dev] [PATCH] i965: Rename intel_bufferobj_* functions to match GL and DD hooks.

gt; rearranging the jumble of words when searching for a function, > and it took a few tries to eventually land there. > > The new names match the word order of GL and the driver hooks; > FlushMappedBufferRange is simply brw_flush_mapped_buffer_range. > > Signed-off-by:

Re: [Mesa-dev] [PATCH 4/5] i965/fs: Use correct spill offsets

ll_offset + i * reg_size * REG_SIZE; I would split this functional change into its own commit and leave all the s/reg_size/REG_SIZE/ type changes in a different commit. Other than that, series Reviewed-by: Kristian Høgsberg >spill_inst->ir = inst->ir; >spill_inst->an

Re: [Mesa-dev] [PATCH 2/2] i965: Use BDW_MOCS_PTE for renderbuffers.

microbenchmark (spotted by Eero Tamminen). Improves performance > in GLBenchmark 2.7/EgyptHD by 7.44362% +/- 0.496939% (n=55) on a > Broadwell GT2. > > Signed-off-by: Kenneth Graunke > Reported-by: Eero Tamminen > Cc: mesa-sta...@lists.freedesktop.org That makes sense, good find f

Re: [Mesa-dev] [PATCH 4/4] i965: Use unsynchronized maps for the program cache on LLC platforms.

On Fri, Sep 26, 2014 at 2:21 PM, Kenneth Graunke wrote: > On Friday, September 26, 2014 09:22:31 AM Kristian Høgsberg wrote: >> On Fri, Aug 29, 2014 at 11:10:50PM -0700, Kenneth Graunke wrote: >> > There's no reason to stall on pwrite - the CPU always appends to the >>

Re: [Mesa-dev] [PATCH 2/4] i965: Issue performance warnings on MapBufferRange stalls.

On Fri, Sep 26, 2014 at 12:38 AM, Kenneth Graunke wrote: > On Friday, August 29, 2014 11:10:48 PM Kenneth Graunke wrote: >> This is easy: we just need to use brw_map_bo instead of mapping it >> directly. >> >> Signed-off-by: Kenneth Graunke >> --- >> src/mesa/drivers/dri/i965/intel_buffer_object

Re: [Mesa-dev] [PATCH 4/4] i965: Use unsynchronized maps for the program cache on LLC platforms.

+ memcpy(new_bo->virtual, cache->bo->virtual, cache->next_offset); Move the drm_intel_gem_bo_map_unsynchronized() and drm_intel_bo_unmap() calls into this block so they bracket the memcpy as for the subdata case below? Other than that, Reviewed-by: Kristian Høgsberg > +

Re: [Mesa-dev] [PATCH 3/4] i965: Issue performance warnings for program cache related stalls.

On Fri, Aug 29, 2014 at 11:10:49PM -0700, Kenneth Graunke wrote: > We don't really want extra buffer copying or stalls when mapping, > so it'd be nice to know when it's happening. > > Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg > --

Re: [Mesa-dev] [PATCH 2/4] i965: Issue performance warnings on MapBufferRange stalls.

On Fri, Aug 29, 2014 at 11:10:48PM -0700, Kenneth Graunke wrote: > This is easy: we just need to use brw_map_bo instead of mapping it > directly. > > Signed-off-by: Kenneth Graunke Reviwed-by: Kristian Høgsberg > --- > src/mesa/drivers/dri/i965/intel_buffer_objects.c | 7

Re: [Mesa-dev] [PATCH 15/16] i965/skl: Use new MOCS for SKL

On Wed, Sep 24, 2014 at 12:57 PM, Kenneth Graunke wrote: > On Wednesday, September 24, 2014 12:28:20 PM Kristian Høgsberg wrote: > >> On Skylake, the MOCS bits are an index into a table of 63 different, > >> configurable cache configurations. As for previous GENs, we only

Re: [Mesa-dev] [PATCH 02/16] i965/skl: Update 3DSTATE_SBE for Skylake.

On Wed, Sep 24, 2014 at 3:33 PM, Anuj Phogat wrote: > On Wed, Sep 24, 2014 at 12:28 PM, Kristian Høgsberg > wrote: >> From: Damien Lespiau >> >> This commands has seen the addition of 2 dwords that allow to specify >> which channels of which attributes need t

[Mesa-dev] Initial Skylake enabling

Here's a set of 16 patches to bring up mesa on Skylake (GEN 9). This is just initial enabling, there's more work to do. Most patches have been written/reviewed/signed-off by at least two developers and are ready to go. There are a few new patches from me in the set that haven't been reviewed yet:

[Mesa-dev] [PATCH 07/16] i965/skl: Refactor surface state allocation.

From: Kenneth Graunke We will need to allocate more DWords on Skylake. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 26 -- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/src/mesa

[Mesa-dev] [PATCH 04/16] i965/skl: Set mask bits in PIPELINE_SELECT on Skylake.

0x3. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_misc_state.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index e3980fc..99fcddc 1

[Mesa-dev] [PATCH 05/16] i965/skl: Update stencil reference handling for Skylake.

From: Kenneth Graunke Skylake uploads the stencil reference values in DW3 of the 3DSTATE_WM_DEPTH_STENCIL packet, rather than in COLOR_CALC_STATE. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_defines.h | 5 + src/mesa/drivers

[Mesa-dev] [PATCH 11/16] i915/skl: Init instructions compaction tables for SKL

They are the same as for BDW, so just add a case for SKL to the init switch. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_eu_compact.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 14/16] i965/skl: Implement workaround for VF Invalidate issue

From: Jordan Justen Signed-off-by: Jordan Justen Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index

[Mesa-dev] [PATCH 10/16] i965/skl: Add fast clear resolve rect multipliers for SKL

SKL updates the resolve rectangle scaling factors again. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 09/16] i965/skl: Always emit 3DSTATE_BINDING_TABLE_POINTERS_* on Skylake.

From: Kenneth Graunke On SKL, 3DSTATE_CONSTANT_* command is not committed until we give the corresponding 3DSTATE_BINDING_TABLE_POINTERS_* command. If we fail to do so, the constant buffers wont be read and push constants will be wrong. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian

[Mesa-dev] [PATCH 13/16] i965/skl: Update Viewport Z Clip Test Enable bits for Skylake.

From: Kenneth Graunke Skylake has separate controls for enabling the Z Clip Test for the near and far planes. For now, maintain the legacy behavior by setting both. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_defines.h | 2 ++ src/mesa

[Mesa-dev] [PATCH 08/16] i965/skl: Allocate 16 DWords for SURFACE_STATE on Skylake.

From: Kenneth Graunke Otherwise they overlap and horrible things happen. All the new DWords are for fast color clear values, which we don't do yet. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 2 +- 1 file chang

[Mesa-dev] [PATCH 01/16] i965/skl: Add Skylake PCI IDs

Signed-off-by: Kristian Høgsberg --- include/pci_ids/i965_pci_ids.h | 15 +++ src/mesa/drivers/dri/i965/brw_device_info.c | 29 + 2 files changed, 44 insertions(+) diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h

[Mesa-dev] [PATCH 06/16] i965/skl: Emit extra zeros in STATE_BASE_ADDRESS on Skylake.

From: Kenneth Graunke Skylake introduces a new base address for a feature we don't yet expose. Setting these to 0 should be safe. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/gen8_misc_state.c | 13 +++-- 1 file changed, 11 inser

[Mesa-dev] [PATCH 15/16] i965/skl: Use new MOCS for SKL

for the Skylake MOCS values. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_defines.h| 6 ++ src/mesa/drivers/dri/i965/gen8_depth_state.c | 10 ++ src/mesa/drivers/dri/i965/gen8_draw_upload.c | 8 +--- src/mesa/drivers/dri/i965/gen8_misc_state.c

[Mesa-dev] [PATCH 03/16] i965/skl: Set max OpenGL version the same as gen7/8

From: Jordan Justen Signed-off-by: Jordan Justen Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/intel_screen.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 41964ec..62e42aa 100644

[Mesa-dev] [PATCH 12/16] i965/skl: Emit extra zeros in 3DSTATE_DS on Skylake.

From: Kenneth Graunke Skylake's 3DSTATE_DS packet has a few more fields; we don't support domain shaders yet though. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/gen8_disable.c | 15 +-- 1 file changed, 5 insertions(+), 10

[Mesa-dev] [PATCH 02/16] i965/skl: Update 3DSTATE_SBE for Skylake.

: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_defines.h | 6 ++ src/mesa/drivers/dri/i965/gen8_sf_state.c | 30 -- 2 files changed, 34 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h

[Mesa-dev] [PATCH 16/16] i965/bdw+: Remove depth stall workaround gen8 and up

As of BDW, this workaround is no longer necessary: "WM HW will internally manage the draining pipe and flushing of the caches when this commands is issued. The PIPE_CONTROL restrictions are removed." Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/gen8_depth_state.c |

[Mesa-dev] [PATCH] i915: Restructure debug flags

) and DEBUG_REGION (0x400) used to be. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/intel_debug.c | 60 - src/mesa/drivers/dri/i965/intel_debug.h | 60 - 2 files changed, 60 insertions(+), 60 deletions(-) diff --git a

Re: [Mesa-dev] [PATCH 01/12] i965/fs: Manually generate the meta fast-clear shader

t; operations. >> >> This commit replaces the optimization pass with a function that just >> generates the shader we want. This is a) less code, b) less fragile than >> the optimization pass, and c) generates a more efficient shader. >> >> Signed-off-by: Jason E

Re: [Mesa-dev] Mesa 10.3 release plan

On Wed, Sep 10, 2014 at 2:39 PM, Emil Velikov wrote: > On 10/09/14 18:16, Kristian Høgsberg wrote: >> On Wed, Sep 10, 2014 at 5:45 AM, Emil Velikov >> wrote: >>> Hello all, >>> >>> The original plan from Ian was to have four release candidates prior to

Re: [Mesa-dev] Mesa 10.3 release plan

On Wed, Sep 10, 2014 at 5:45 AM, Emil Velikov wrote: > Hello all, > > The original plan from Ian was to have four release candidates prior to the > final release. From what I can see there has been no serious amount of patches > nominated for 10.3-rc4, so I'm planning to keep with the plan and rel

[Mesa-dev] [PATCH] i965: Adjust fast-clear resolve rect for BDW

The scale factors for the resolve rectangle change for BDW and we have to look at bdw->gen now to figure out how big it should be. Fixes: https://bugs.freedesktop.org/attachment.cgi?id=105777 Cc: "10.3" Signed-off-by: Kristian Høgsberg Reviewed-by: Kenneth Graunke --- src/mes

Re: [Mesa-dev] SandyBridge issue likely related to fast color clears using meta operations

On Wed, Sep 3, 2014 at 10:00 PM, Jordan Justen wrote: > On 2014-09-03 10:41:02, Kenneth Graunke wrote: >> On Tuesday, September 02, 2014 06:16:01 PM Samuel Iglesias Gonsálvez wrote: >> > Hello, >> > >> > Two weeks ago, Iago and myself sent a batch of patches that added >> > geometry shader support

[Mesa-dev] [PATCH] meta: Make MESA_META_DRAW_BUFFERS restore properly

gl_framebuffer and then set them on restore using _mesa_drawbuffers(). It's not clear how this breaks the benchmark in 82796, but fixing meta to not leak the state change fixes the regression. No piglit regressions. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=82796 Signed-off-by: Kri

[Mesa-dev] [PATCH] i965: Add blorp fast clear back

the meta path work in all cases. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/Makefile.sources | 1 + src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 615 src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 13 + 3 files changed, 629 insertions

Re: [Mesa-dev] [PATCH 2/3] mesa: Use a recursive mutex for the texture lock.

On Tue, Aug 19, 2014 at 7:03 AM, Dave Airlie wrote: >> This avoids problems with things like meta operations calling functions >> that want to take the lock while the lock is already held. Basically, >> the point is to guard against API reentrancy across threads...not to >> guard against ourselve

Re: [Mesa-dev] [PATCH 1/3] i965: Flush the RC and TC before doing a fast clear resolve

Kristian > Reviewed-by: Chris Forbes > > On Tue, Aug 19, 2014 at 12:20 PM, Kristian Høgsberg > wrote: >> The docs say "When performing a render target resolve, PIPE_CONTROL with end >> of pipe sync must be delivered.", which doesn't actually tell us whether we

[Mesa-dev] [PATCH 1/3] i965: Flush the RC and TC before doing a fast clear resolve

various steam games. Missing flush spotted by Ken. Reviewed-by: Kenneth Graunke Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.

[Mesa-dev] [PATCH 3/3] i965, meta: Stop unlocking the texture to try and prevent deadlocks.

From: Kenneth Graunke Unlocking the texture is not safe: another thread could come in and grab it. Now that we use a recursive mutex, this should work. This also fixes texture lock deadlocks in the new meta fast clear path. Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg Cc

[Mesa-dev] [PATCH 2/3] mesa: Use a recursive mutex for the texture lock.

Reviewed-by: Kristian Høgsberg Cc: Brian Paul --- src/mesa/main/shared.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/shared.c b/src/mesa/main/shared.c index 0189dd2..7ef932f 100644 --- a/src/mesa/main/shared.c +++ b/src/mesa/main/shared.c @@ -113,7 +113,7

Re: [Mesa-dev] [PATCH 12/12] i965: Implement fast color clears using meta operations

doesn't make it clear whether it's before or after. A RC flush before doing the resolve certainly makes sense, since you'd expect the resolve operation to have to read back from the MCS. Kristian > > On Tue, Aug 12, 2014 at 5:45 PM, Kristian Høgsberg > wrote: > >

Re: [Mesa-dev] [PATCH 7/7] mapi: Inline shared-glapi/tests/Makefile.

OGRAMS += glapi-test > > -glapi_test_SOURCES = check_table.cpp > +glapi_test_SOURCES = glapi/tests/check_table.cpp Move this change to previous commit and 6 and 7 are Reviewed-by: Kristian Høgsberg > glapi_test_CPPFLAGS = \ > $(AM_CPPFLAGS) \ > -I$(top_srcdir)/src

Re: [Mesa-dev] [PATCH 5/7] mapi: Inline glapi/Makefile.

> \ > > GLAPI = $(top_srcdir)/src/mapi/glapi > include Makefile.sources > +include glapi/Makefile.sources > include glapi/gen/glapi_gen.mk It might make sense to also pull glapi/Makefile.sources into Makefile.sources. Reviewed-by: Kristian Høgsberg

Re: [Mesa-dev] [PATCH 4/7] mapi: Inline es2api/Makefile.

insertions(+), 71 deletions(-) > delete mode 100644 src/mapi/es2api/Makefile.am Reviewed-by: Kristian Høgsberg > > diff --git a/configure.ac b/configure.ac > index 7ded9e2..d94cc6f 100644 > --- a/configure.ac > +++ b/configure.ac > @@ -2237,7 +2237,6 @@ AC_CONFIG_FILES([Makef

Re: [Mesa-dev] [PATCH 3/7] mapi: Inline es1api/Makefile.

insertions(+), 66 deletions(-) > delete mode 100644 src/mapi/es1api/Makefile.am Reviewed-by: Kristian Høgsberg > > diff --git a/configure.ac b/configure.ac > index 97d5394..7ded9e2 100644 > --- a/configure.ac > +++ b/configure.ac > @@ -2236,7 +2236,6 @@ AC_CONFIG_FILES([Make

Re: [Mesa-dev] [PATCH 2/7] mapi: Inline shared-glapi/Makefile.

On Fri, Aug 15, 2014 at 10:47:06AM -0700, Matt Turner wrote: > --- > configure.ac | 1 - > src/mapi/Makefile.am | 44 > --- > src/mapi/shared-glapi/Makefile.am | 34 -- > src/mesa/Makefile.sources

Re: [Mesa-dev] [PATCH 1/7] build: Let install-lib-links.mk handle .la files in subdirectories.

ubdirectory. > > This patch fixes this and puts .libs/ in the right place. It's quite a mouthful, but should do the right thing. Reviewed-by: Kristian Høgsberg > --- > install-lib-links.mk | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/install

Re: [Mesa-dev] [PATCH] egl: don't exit process on initialization failure

ut it was never the intention to exit immediately. The only way the dri2_bind_extension can return EGL_FALSE is after calling _eglLog with _EGL_FATAL, so I clearly didn't realize _EGL_FATAL calls exit when I wrote it. Reviewed-by: Kristian Høgsberg > -ilia > >> src/egl/drivers/dri2

Re: [Mesa-dev] [PATCH 10/12] mesa: Use _mesa_lock_context_textures in _mesa_GetTexParameterfv()

On Wed, Aug 13, 2014 at 01:30:52PM -0700, Kenneth Graunke wrote: > On Monday, August 11, 2014 05:29:40 PM Kristian Høgsberg wrote: > > GetTexParamterfv() doesnt change texture state, so instead of > > _mesa_lock_texture() we can use _mesa_lock_context_textures(), > > which

Re: [Mesa-dev] [PATCH] i965/fs: Drop "do dual source blending" generator parameter.

flag. Hooray for fewer boolean args. Reviewed-by: Kristian Høgsberg > Signed-off-by: Kenneth Graunke > --- > src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 2 +- > src/mesa/drivers/dri/i965/brw_fs.cpp| 2 +- > src/mesa/drivers/dri/i965/brw_fs.h | 2

Re: [Mesa-dev] [PATCH 2/2] meta: Use instanced rendering for layered clears.

On Wed, Aug 13, 2014 at 09:42:50PM -0700, Kenneth Graunke wrote: > Layered rendering is part of OpenGL 3.2; GL_ARB_draw_instanced is part > of OpenGL 3.1. As such, all drivers supporting layered rendering > already support gl_InstanceID. > > Signed-off-by: Kenneth Graunke Review

Re: [Mesa-dev] [PATCH 1/2] mesa: Expose vbo_exec_DrawArraysInstanced as _mesa_DrawArraysInstanced.

On Wed, Aug 13, 2014 at 09:42:49PM -0700, Kenneth Graunke wrote: > So we can use it in meta.c. > > Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg > --- > src/mesa/main/varray.h| 4 > src/mesa/vbo/vbo_exec_array.c | 6 ++ > 2 files c

Re: [Mesa-dev] [PATCH 01/12] i965: Assign PS kernel start pointers when we decide which kernels to use

On Mon, Aug 11, 2014 at 10:48:49PM -0700, Kenneth Graunke wrote: > On Monday, August 11, 2014 05:29:31 PM Kristian Høgsberg wrote: > > Right now we decide which kernels to use and the GRF start offsets in > > one place and emit the kernel pointers later. The logic of how to map &

Re: [Mesa-dev] [PATCH 12/12] i965: Implement fast color clears using meta operations

On Mon, Aug 11, 2014 at 08:46:23PM -0400, Ilia Mirkin wrote: > On Mon, Aug 11, 2014 at 8:29 PM, Kristian Høgsberg wrote: > > diff --git a/src/mesa/drivers/dri/i965/intel_tex_copy.c > > b/src/mesa/drivers/dri/i965/intel_tex_copy.c > > index 97f1569..2456080 100644 > >

Re: [Mesa-dev] [PATCH 04/12] i965: Add a mechanism for sending native primitives into the driver

On Mon, Aug 11, 2014 at 08:21:29PM -0700, Ben Widawsky wrote: > On Mon, Aug 11, 2014 at 05:29:34PM -0700, Kristian Høgsberg wrote: > > The brw_draw_prims() function is the draw entry point into the driver, > > and takes struct _mesa_prim for input. We want to be able to feed > &

Re: [Mesa-dev] [PATCH 02/12] i965: Add an option to not generate the SIMD8 fragment shader

On Mon, Aug 11, 2014 at 08:08:33PM -0700, Ben Widawsky wrote: > On Mon, Aug 11, 2014 at 05:29:32PM -0700, Kristian Høgsberg wrote: > > For now, this can only be triggered with a new 'no8' INTEL_DEBUG option > > and a new context flag. We'll use the context flag lat

Re: [Mesa-dev] [PATCH 01/12] i965: Assign PS kernel start pointers when we decide which kernels to use

On Mon, Aug 11, 2014 at 07:53:11PM -0700, Ben Widawsky wrote: > On Mon, Aug 11, 2014 at 05:29:31PM -0700, Kristian Høgsberg wrote: > > Right now we decide which kernels to use and the GRF start offsets in > > one place and emit the kernel pointers later. The logic of how to map &

[Mesa-dev] [PATCH 09/12] i965: Move pre-draw resolve buffers to dd::UpdateState

of a begin/end sequence. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_context.c | 27 +- src/mesa/drivers/dri/i965/brw_draw.c| 40 - 2 files changed, 26 insertions(+), 41 deletions(-) diff --git a/src/mesa/drivers/dri

[Mesa-dev] [PATCH 03/12] i965: Add context flag to disable the viewport transform

This lets us disable the viewport transform, which will be useful for emitting 3DPRIM_RECTLIST. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_context.c | 1 + src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/gen6_sf_state.c | 5 +++-- src/mesa

[Mesa-dev] [PATCH 11/12] meta: Export _mesa_meta_drawbuffers_from_bitfield()

We'll use this in the i965 fast clear implementation. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/common/meta.c | 6 +++--- src/mesa/drivers/common/meta.h | 3 +++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/c

[Mesa-dev] [PATCH 10/12] mesa: Use _mesa_lock_context_textures in _mesa_GetTexParameterfv()

ge allows us to reliably unlock the context textures in the dd::UpdateState callback as is necessary for meta color resolves. Signed-off-by: Kristian Høgsberg --- src/mesa/main/texparam.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mesa/main/texparam.c

[Mesa-dev] [PATCH 12/12] i965: Implement fast color clears using meta operations

completely and improves on a few cases. Layered clears are now done using instanced rendering and multiple render-target clears use a MRT shader with rep16 writes. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/Makefile.sources | 2 +- src/mesa/drivers/dri/i965/brw_blorp.h

[Mesa-dev] [PATCH 07/12] i965: Provide a context flag to let us enable fast clear

GEN7+ has the fast clear functionality, which lets us clear the color buffers using the MCS and a scaled down rectangle. To enable this we have to set the appropriate bits in the 3DSTATE_PS package. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa

[Mesa-dev] [PATCH 05/12] i965: Disable clipping when rendering 3DPRIM_RECTLIST primitives

The clipper doesn't support clipping 3DPRIM_RECTLIST primitives and must be turned off when we use them. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/gen6_clip_state.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri

[Mesa-dev] [PATCH 04/12] i965: Add a mechanism for sending native primitives into the driver

-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_context.h | 2 +- src/mesa/drivers/dri/i965/brw_defines.h | 7 +++ src/mesa/drivers/dri/i965/brw_draw.c| 15 --- src/mesa/drivers/dri/i965/brw_vec4_gs.c | 3 ++- 4 files changed, 22 insertions(+), 5 deletions

[Mesa-dev] [PATCH 01/12] i965: Assign PS kernel start pointers when we decide which kernels to use

. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/gen6_wm_state.c | 16 src/mesa/drivers/dri/i965/gen7_wm_state.c | 18 ++ src/mesa/drivers/dri/i965/gen8_ps_state.c | 14 -- 3 files changed, 26 insertions(+), 22 deletions(-) diff --git a/src

[Mesa-dev] [PATCH 06/12] i965: Add optimization pass to let us use the replicate data message

tiple render targets. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/brw_defines.h | 1 + src/mesa/drivers/dri/i965/brw_fs.cpp| 56 + src/mesa/drivers/dri/i965/brw_fs.h

[Mesa-dev] [PATCH 08/12] i965: Rename intelValidateState to intel_update_state

This matches the name of the dd hook. Also convert a couple of nearby dd implementations to lowercase + underscore as is now the standard. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_context.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git

[Mesa-dev] [PATCH 00/12] i965: Fast clear using meta

This patch series implements the fast clear feature using meta operations. This series consists of a series of patches that add bits and pieces of infrastructure to control the custom state and the final patch uses all those to implement color fast clear and resolve. The big ugly problem with doin

[Mesa-dev] [PATCH 02/12] i965: Add an option to not generate the SIMD8 fragment shader

For now, this can only be triggered with a new 'no8' INTEL_DEBUG option and a new context flag. We'll use the context flag later, but introducing it now lets us bisect to this commit if it breaks something. Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_c

Re: [Mesa-dev] [PATCH v2] gbm: Replace GBM_DRIVERS_PATH with LIBGL_DRIVERS_PATH

On Thu, Jul 24, 2014 at 1:43 PM, Kristian Høgsberg wrote: > On Thu, Jul 24, 2014 at 1:32 PM, Emil Velikov > wrote: >> On 22/07/14 19:43, Dylan Baker wrote: >>> GBM_DRIVERS_PATH is not documented, and only used to set the location of >>> gbm drivers, while

Re: [Mesa-dev] [PATCH v2] gbm: Replace GBM_DRIVERS_PATH with LIBGL_DRIVERS_PATH

On Thu, Jul 24, 2014 at 1:32 PM, Emil Velikov wrote: > On 22/07/14 19:43, Dylan Baker wrote: >> GBM_DRIVERS_PATH is not documented, and only used to set the location of >> gbm drivers, while LIBGL_DRIVERS_PATH is used for everything else, and >> is documented. >> >> Generally this split leads to c

Re: [Mesa-dev] [PATCH 0/6] Add support for BPTC texture compression

On Thu, Jul 24, 2014 at 8:55 AM, Neil Roberts wrote: > Ilia Mirkin writes: > >> Just a thought -- if online compression is highly unexpected, perhaps >> it'd be reasonably to make a *horrid* compressor that doesn't rely on >> any external libraries? I don't know how complex the BPTC format is, >>

Re: [Mesa-dev] [PATCH v2] gbm: Replace GBM_DRIVERS_PATH with LIBGL_DRIVERS_PATH

search_paths = getenv("GBM_DRIVERS_PATH"); > + search_paths = getenv("LIBGL_DRIVERS_PATH"); > + > + /* fallback path for compatability, GBM_DRIVERS_PATH should be compatibility I don't even know that we ever need to drop GBM_DRIVERS_PATH, it's pre

Re: [Mesa-dev] [PATCH] gbm: Replace GBM_DRIVERS_PATH with LIBGL_DRIVERS_PATH

On Sun, Jul 20, 2014 at 11:36 PM, Eric Anholt wrote: > Emil Velikov writes: > >> On 18/07/14 17:27, Kenneth Graunke wrote: >>> On Friday, July 18, 2014 07:41:57 AM Dylan Baker wrote: Currently mesa searches for two different environment variables, LIBGL_DRIVERS_PATH and GBM_DRIVERS_PATH

Re: [Mesa-dev] [PATCH] i965: Add an option to not generate the SIMD8 fragment shader

On Mon, Jul 14, 2014 at 9:17 AM, Kenneth Graunke wrote: > On Friday, July 11, 2014 11:26:30 AM Kristian Høgsberg wrote: >> For now, this can only be triggered with a new 'no8' INTEL_DEBUG option >> >> Signed-off-by: Kristian Høgsberg >> --- >> src

Re: [Mesa-dev] [PATCH] i965: Add an option to not generate the SIMD8 fragment shader

On Fri, Jul 11, 2014 at 11:35 AM, Matt Turner wrote: > On Fri, Jul 11, 2014 at 11:26 AM, Kristian Høgsberg > wrote: >> For now, this can only be triggered with a new 'no8' INTEL_DEBUG option >> >> Signed-off-by: Kristian Høgsberg >> --- >>

[Mesa-dev] [PATCH] i965: Add an option to not generate the SIMD8 fragment shader

For now, this can only be triggered with a new 'no8' INTEL_DEBUG option Signed-off-by: Kristian Høgsberg --- src/mesa/drivers/dri/i965/brw_context.h | 2 ++ src/mesa/drivers/dri/i965/brw_fs.cpp | 14 -- src/mesa/drivers/dri/i965/gen7_wm_state.c | 4 ++-- src/me

Re: [Mesa-dev] i965: overwriting parts of a register and optimization passes

On Wed, Jul 9, 2014 at 8:19 AM, Kenneth Graunke wrote: > On Tuesday, July 08, 2014 11:19:38 AM Iago Toral wrote: > >> Hi, > >> > >> I have some code that first initializes a register and then overwrites a > >> specific subregister. However, after the optimization passes in > >> brw_vec4.cpp the in

Re: [Mesa-dev] [PATCH] i965: Extend compute-to-mrf pass to understand blocks of MOVs

On Mon, Jul 7, 2014 at 11:07 PM, Kristian Høgsberg wrote: > On Mon, Jun 30, 2014 at 3:14 PM, Matt Turner wrote: >> On Fri, Jun 27, 2014 at 12:00 PM, Kristian Høgsberg >> wrote: >>> From: Kristian Høgsberg >> >> With your email address fixed, > > Don

Re: [Mesa-dev] [PATCH] i965: Extend compute-to-mrf pass to understand blocks of MOVs

On Mon, Jun 30, 2014 at 3:14 PM, Matt Turner wrote: > On Fri, Jun 27, 2014 at 12:00 PM, Kristian Høgsberg > wrote: >> From: Kristian Høgsberg > > With your email address fixed, Done, thanks for the review. I realized that this also applies to MRT shaders where we write the

Re: [Mesa-dev] [PATCH 1/2] i965: Don't enable SOL statistics during meta operations.

On Tue, Jul 1, 2014 at 5:25 PM, Kenneth Graunke wrote: > The GL_TRANSFORM_FEEDBACK_PRIMITIVES_WRITTEN counter is not supposed to > increment during glGenerateMipmap(). I don't think either counter is > supposed to increment during most meta operations, so simply turn off > statistics during those

Re: [Mesa-dev] [PATCH 1/4] glsl/glcpp: Alphabetize lists of start conditions

eed to fix one or more >>* of the preceding patterns to match that input. */ >> >> -. { >> +. { >> glcpp_error(yylloc, yyextra, "Internal compiler error: Unexpected > character: %s", yytext); >> } >> >&g

Re: [Mesa-dev] [PATCH 23/23] i965/disasm: Fix INTEL_DEBUG=fs on Broadwell for ARB_fp applications.

On Sat, Jun 28, 2014 at 09:34:02PM -0700, Kenneth Graunke wrote: > Apparently INTEL_DEBUG=fs has crashed on Broadwell for anything using > ARB_fragment_program since commit 9cee3ff5. We need to NULL-check the > right field. > > Signed-off-by: Kenneth Graunke > Cc: "10.2&q

Re: [Mesa-dev] [PATCH 22/23] i965/disasm: Delete gen8_disasm.c.

sasm.c | 1026 > -- > src/mesa/drivers/dri/i965/gen8_instruction.h |4 - > 3 files changed, 1031 deletions(-) > delete mode 100644 src/mesa/drivers/dri/i965/gen8_disasm.c Reviewed-by: Kristian Høgsberg > diff --git a/src/mesa/drivers/dri/i965/Makefile.

Re: [Mesa-dev] [PATCH 21/23] i965/disasm: Stop using gen8_disassemble in favor of brw_disassemble.

On Sat, Jun 28, 2014 at 09:34:00PM -0700, Kenneth Graunke wrote: > At this point, brw_disassemble can do everything gen8_disassemble can > do - and, thanks to the new brw_inst API, it supports all generations. Reviewed-by: Kristian Høgsberg > Signed-off-by: Kenneth Graunke > ---

Re: [Mesa-dev] [PATCH 20/23] i965/disasm: Improve render target write message disassembly.

PI, we can also stop duplicating code on a > per-generation basis. This is awesome, I've wanted that for a while, thanks. Reviewed-by: Kristian Høgsberg > Signed-off-by: Kenneth Graunke > --- > src/mesa/drivers/dri/i965/brw_disasm.c | 77 > +

Re: [Mesa-dev] [PATCH 18/23] i965/disasm: Fix typo in RT UNORM write message.

On Sat, Jun 28, 2014 at 09:33:57PM -0700, Kenneth Graunke wrote: > The name of this message is "Render Target UNORM Write" (Sandybridge > PRM, Volume 4 Part 1, Page 210). Drop the bogus 'c'. > > Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg &g

Re: [Mesa-dev] [PATCH 19/23] i965/disasm: Rename msg_target to SFID.

the modern documentation. > > Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg > --- > src/mesa/drivers/dri/i965/brw_disasm.c | 20 > 1 file changed, 8 insertions(+), 12 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c &g

Re: [Mesa-dev] [PATCH 17/23] i965/disasm: Use Gen6+ SFID case labels.

On Sat, Jun 28, 2014 at 09:33:56PM -0700, Kenneth Graunke wrote: > Most developers will recognize the Gen6+ SFID names more quickly than > the Gen4-5 ones. Given that they're the same values, just use the new > names. > > Signed-off-by: Kenneth Graunke Reviewed-b

Re: [Mesa-dev] [PATCH 16/23] i965/disasm: "Handle" Gen8+ HF/DF immediate cases.

d > simply assert fail. > > Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg > --- > src/mesa/drivers/dri/i965/brw_disasm.c | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c > b/src/mesa/drivers/dri/

Re: [Mesa-dev] [PATCH 15/23] i965/disasm: Cut piles of duplicate swizzle printing.

On Sat, Jun 28, 2014 at 09:33:54PM -0700, Kenneth Graunke wrote: > Making a helper function saves us from cut and pasting this four times. Very nice, Reviewed-by: Kristian Høgsberg > Signed-off-by: Kenneth Graunke > --- > src/mesa/drivers/dri/i965/brw_di

Re: [Mesa-dev] [PATCH 14/23] i965/disasm: Properly decode negate source modifiers on Broadwell.

On Sat, Jun 28, 2014 at 09:33:53PM -0700, Kenneth Graunke wrote: > This is a port of Abdiel's 6f9f916b9b042a294813ab0542390846a38739da > to brw_disasm.c. Reviewed-by: Kristian Høgsberg > Signed-off-by: Kenneth Graunke > --- > src/mesa/drivers/dri/i9

Re: [Mesa-dev] [PATCH 13/23] i965/disasm: Improve disassembly of atomic messages on Haswell+.

; > + /* fallthrough */ > +case HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2: > +case HSW_DATAPORT_DC_PORT1_TYPED_ATOMIC_OP_SIMD4X2: > case HSW_DATAPORT_DC_PORT1_ATOMIC_COUNTER_OP_SIMD4X2: I was wondering if we could print

Re: [Mesa-dev] [PATCH 12/23] i965/disasm: Actually disassemble Gen7+ URB opcodes.

8+ */ > + [7] = "SIMD8 write", /* Gen8+ */ > + [8] = "SIMD8 read", /* Gen8+ */ > + /* [9-15] - reserved */ > +}; Do we have defines for these opcodes? They stand out a bit now that all the rest are using opcode names in the array initializer. Eit

Re: [Mesa-dev] [PATCH 11/23] i965/disasm: Decode Broadwell's invm/rsqrtm math functions.

On Sat, Jun 28, 2014 at 09:33:50PM -0700, Kenneth Graunke wrote: > We don't use these yet, but we may as well disassemble them. > > Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg > --- > src/mesa/drivers/dri/i965/brw_disasm.c | 2 ++ > 1 file changed, 2

Re: [Mesa-dev] [PATCH 09/23] i965/disasm: Properly disassemble all32h/any32h align1 predicates.

On Sat, Jun 28, 2014 at 09:33:48PM -0700, Kenneth Graunke wrote: > While we're adding things, use symbolic constants rather than magic > numbers. > > Signed-off-by: Kenneth Graunke Reviewed-by: Kristian Høgsberg > --- > src/mesa/drivers/dri

Re: [Mesa-dev] [PATCH 10/23] i965/disasm: Properly disassemble the "atomic" ThreadCtrl value.

On Sat, Jun 28, 2014 at 09:33:49PM -0700, Kenneth Graunke wrote: > Signed-off-by: Kenneth Graunke > --- > src/mesa/drivers/dri/i965/brw_disasm.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) Double checked the spec, looks right. Reviewed-by: Kristian Høgsberg &g

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