On May 16, 2018, at 9:25 AM, Alexandre
mailto:alexandre.gauthier-foic...@inria.fr>>
wrote:
Thank you for your answer.
I understand I can control the number of threads and prevent them to be
assigned to actual hardware threads.
Preventing oversubscription of the hardware threads is challenging
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Dec 12, 2017, at 5:37 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
Environment variable KNOB_MAX_WORKER_THREADS allows the user to override
default thread creation and thread binding. Previous commit to adjust
linux
I agree that we’re probably dropping into fallback paths in a variety of
locations as there are a number of width==256 tests in the gallivm code. Right
now I’m working through piglit regressions versus avx2 in our driver, and the
rounding tests weren't passing.
Thanks.
> On Nov 1, 2017, at 2:
Ping. This is useful for those building their own llvm.
> On Oct 3, 2017, at 3:23 PM, Rowley, Timothy O
> wrote:
>
> Assert-enabled builds of llvm add _DEBUG to the LLVM_CFLAGS.
>
> This was causing a crash with swr running the ParaView
> waveletcontour.py test, due t
Ok, made the following changes - want a full v2 commit, or ok to do this on
push?
--- a/src/gallium/drivers/swr/swr_shader.cpp
+++ b/src/gallium/drivers/swr/swr_shader.cpp
@@ -533,12 +533,12 @@ BuilderSWR::CompileGS(struct swr_context *ctx,
swr_jit_gs_key &key)
pGS->inputVertStride = pGS->nu
I have a bit of a preference for Eric’s version.
-Tim
On Sep 18, 2017, at 7:10 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
On 18 September 2017 at 11:48, Eric Engestrom
mailto:eric.engest...@imgtec.com>> wrote:
On Monday, 2017-09-18 11:29:21 +0100, Emil Velikov wrote:
From: Bernh
On Jul 31, 2017, at 3:51 PM, Chuck Atkins
mailto:chuck.atk...@kitware.com>> wrote:
Hi Tim,
If the Cray flags are for wrapper scripts, why do we need specific flags for
that instead of using the underlying compiler flags?
Sort answer: It's the "Cray" way of doing things.
Long answer: The targ
On Jul 31, 2017, at 3:18 PM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
Hi Tim,
What's the goal behind the split. Please add a couple of words in the
commit message.
Will do.
On 31 July 2017 at 20:40, Tim Rowley
mailto:timothy.o.row...@intel.com>> wrote:
---
src/gallium/drivers/s
> On Jul 31, 2017, at 3:56 PM, Emil Velikov wrote:
>
> Hi Tim,
>
> Some of the inline functions seem unused.
> Very quick search showed the following:
>
> InterpolateComponent
> _simd128_abs_ps
> _simd_abs_ps
The intent of simdlib is a general purpose vector library, so some
functions/method
If the Cray flags are for wrapper scripts, why do we need specific flags for
that instead of using the underlying compiler flags?
I’m guessing you intend this for the 17.2 branch as well?
-Tim
> On Jul 31, 2017, at 2:53 PM, Chuck Atkins wrote:
>
> Note that the Cray flags (-target-cpu=) need
> On Jul 23, 2017, at 11:08 AM, George Kyriazis
> wrote:
>
> The shader that is used to copy vertex data out of the vs/gs shaders to
> the user-specified buffer (streamout os SO shader) was not using the
> correct offsets.
>
> Adjust the offsets that are used just for the SO shader:
> - Make s
Reviewed-by: Tim Rowley
> On Jul 21, 2017, at 1:05 PM, Emil Velikov wrote:
>
> From: Emil Velikov
>
> The variable name was missing a leading LD_, which resulted in the
> backend binaries having unresolved symbols.
>
> With the link addressed with earlier patches, we can correct the typo.
>
Reviewed-by: Tim Rowley
> On Jul 21, 2017, at 1:05 PM, Emil Velikov wrote:
>
> From: Emil Velikov
>
> Seems like the backends have been using pthreads since day one, yet
> we've been missing the link.
>
> With later commit we'll fix a typo, hence the libraries will be build
> with -Wl,no-und
Reviewed-by: Tim Rowley
> On Jul 21, 2017, at 1:05 PM, Emil Velikov wrote:
>
> From: Emil Velikov
>
> Analogous to previous commit but for the KNL/SKX backends.
>
> Cc: Bruce Cherniak
> Cc: Tim Rowley
> Cc: Laurent Carlier
> Fixes: 1cb5a6061ce ("configure/swr: add KNL and SKX architecture
Couple things about the patch: should PTHREAD_CFLAGS be added to
COMMON_CXXFLAGS to avoid needing to modify the section for each architecture?
The KNL and SKX sections should have similar changes.
I’ve tested that the scons binaries work on linux, and George tests them on
windows.
-Tim
> On
There weren’t any direct users of the avx512 features yet, but probably worth
proposing for stable pickup.
Thanks.
-Tim
> On Jul 19, 2017, at 2:40 PM, Roland Scheidegger wrote:
>
> Makes sense to me.
> Probably should go into stable?
>
> Reviewed-by: Roland Scheidegger
>
> Am 19.07.2017 um
On Jul 17, 2017, at 11:51 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
On 17 July 2017 at 15:08, Tim Rowley
mailto:timothy.o.row...@intel.com>> wrote:
Not built by default.
---
configure.ac | 16 ++
src/gallium/drivers/swr/Makefile.am| 38 ++
On Jul 17, 2017, at 11:42 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
On 17 July 2017 at 15:08, Tim Rowley
mailto:timothy.o.row...@intel.com>> wrote:
Allow configuration of the SWR architecture depend libraries
we build for with --with-swr-archs. Maintains current behavior
by def
Reviewed-by: Tim Rowley
> On Jul 17, 2017, at 9:34 AM, Emil Velikov wrote:
>
> From: Emil Velikov
>
> The last user of the function was removed with earlier commit.
>
> Fixes: 50842e8a931 ("swr: replace gallium->swr format enum conversion")
> Cc: Tim Rowley
> Signed-off-by: Emil Velikov
>
Reviewed-by: Tim Rowley
> On Jul 12, 2017, at 3:04 PM, Bruce Cherniak wrote:
>
> If size of client memory copy is too large, don't copy. The draw will
> access user-buffer directly and then block. This is faster and more
> efficient than queuing many large client draws.
>
> Applications that
> On Jul 11, 2017, at 8:20 PM, Bruce Cherniak wrote:
>
> If size of client memory copy is too large, don't copy. The draw will
> access user-buffer directly and then block. This is faster and more
> efficient than queuing many large client draws.
>
> Applications that use large draws from clie
On Jul 10, 2017, at 8:24 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
Hi Tim,
On 7 July 2017 at 22:25, Tim Rowley
mailto:timothy.o.row...@intel.com>> wrote:
swr used to build and link the rasterizer to the driver, and to support
multiple architectures we needed to have multiple ve
On Jul 6, 2017, at 5:39 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
On 5 July 2017 at 19:28, Rowley, Timothy O
mailto:timothy.o.row...@intel.com>> wrote:
On Jul 4, 2017, at 12:01 PM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
From: Emil Velikov
> On Jul 4, 2017, at 12:01 PM, Emil Velikov wrote:
>
> From: Emil Velikov
>
> With ealier commit we relaxed the requirement from C++14 to C++11.
> Update the build script so that it
>
> Cc: Tim Rowley Fixes: 0b80b025021 ("swr: relax c++ requirement from c++14 to c++11")
> Signed-off-by: Emil
Reviewed-by: Tim Rowley
> On Jun 29, 2017, at 2:41 PM, Bruce Cherniak wrote:
>
> In swr_update_derived, for consistency, index buffer validation should
> be using the p_draw_info copy "info" rather than referencing
> p_draw_info.
>
> No functional change.
> ---
> src/gallium/drivers/swr/swr_st
> On Jun 28, 2017, at 3:56 AM, Emil Velikov wrote:
>
> On 26 June 2017 at 17:14, Rowley, Timothy O
> wrote:
>>
>> On Jun 26, 2017, at 7:57 AM, Emil Velikov wrote:
>
>>>> +.INTERMEDIATE: backend.intermediate
>>>>
>>> I have
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Jun 28, 2017, at 1:42 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
Deferred deletion (via "fence_work") has obsoleted the need to allocate
all client vertex buffer scratch space in a single chunk. Scratch
allocations
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Jun 27, 2017, at 5:49 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
Vertex buffer state doesn't need to be validated on every call,
only on dirty _NEW_VERTEX or indexed draws.
Unconditional validation was introduced a
> On Jun 26, 2017, at 8:11 AM, Emil Velikov wrote:
>
> Hi Tim,
>
> On 22 June 2017 at 22:13, Tim Rowley wrote:
>> Switch from a macro-based simd intrinsics layer to a more C++
>> implementation, which also adds AVX512 optimizations to 128-bit
>> and 256-bit SIMD.
>
>> + rasterizer/commo
On Jun 26, 2017, at 8:02 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
On 22 June 2017 at 22:13, Tim Rowley
mailto:timothy.o.row...@intel.com>> wrote:
Hardcode split to four files currently. Decreases swr build
time on KNL by over 50%.
Out of curiosity what is KNL?
KNL is the Inte
On Jun 26, 2017, at 7:57 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
Hi Tim,
On 22 June 2017 at 22:13, Tim Rowley
mailto:timothy.o.row...@intel.com>> wrote:
Hardcode split to four files currently. Decreases swr build
time on a quad-core by ~10%.
---
src/gallium/drivers/swr/Makef
> On Jun 26, 2017, at 7:41 AM, Emil Velikov wrote:
> On 22 June 2017 at 22:12, Tim Rowley wrote:
>> Highlights include splitting the heavily templated files into multiple
>> chunks to speed compile (2x for a large machine), and switching the
>> simd intrinsic usage from a macro-based header to a
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Jun 26, 2017, at 10:26 AM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
Fix regression of "no rendering" on simple apps like glxgears by
setting an explicit full surface clear_rect when scissor is not
enabled.
This regre
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Jun 20, 2017, at 11:42 AM, George Kyriazis
mailto:george.kyria...@intel.com>> wrote:
Consider the following RT attachment order:
1. Attach surfaces attachments 0 & 1, and render with them
2. Detach 0 & 1
3. Re-attach 0 & 1 to differ
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Jun 20, 2017, at 12:53 PM, George Kyriazis
mailto:george.kyria...@intel.com>> wrote:
Inline function SWR_MULTISAMPLE_POS::PrecalcSampleData() was missing
definition. Include definition in core/state_funcs.h.
Fixes windows build.
-
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Jun 15, 2017, at 11:24 AM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
The swr driver uses vertex_buffer->stride to determine the number
of elements in a VBO. A recent change to the state-tracker made it
possible for VBO
With this patch series applied, the build fails for me on ubuntu 16.04.
Tree configured thusly:
../mesa/configure --with-platforms=x11 --disable-gbm --disable-egl
--disable-dri --disable-xvmc --disable-vdpau --disable-omx --disable-va
--with-gallium-drivers=swrast,swr
LLVM_CONFIG=/home/torowle
Thanks for doing this; I would have been hunting for the dist-hook: magic for a
while.
Tested “make dist” on llvm-3.9.0 (works) and llvm-4.0/llvm-svn (fails, expected
desired behavior).
Built result of llvm-3.9.0 “make dist” with llvm-4.0 and llvm-svn and it
compiles/works.
Reviewed-by: Tim R
On May 19, 2017, at 10:26 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
On 19 May 2017 at 13:11, Chuck Atkins
mailto:chuck.atk...@kitware.com>> wrote:
Would it be feasible for packaging purposes to generate multiple headers,
i.e. gen_builder._llvm38.hpp, gen_builder_llvm39.hpp,
gen_
On May 17, 2017, at 12:08 PM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
On 10 May 2017 at 03:51, Chuck Atkins
mailto:chuck.atk...@kitware.com>> wrote:
I just tried to build 17.0.4-rc4 from the tarball with swr enabled and got
errors about my python not having mako:
make[5]: Enterin
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On May 4, 2017, at 7:33 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
v3: list piglit tests fixed by this patch. Fixed typo Tim pointed out.
v2: Reword commit message to more closely adhere to community
guidelines.
This
> On Apr 27, 2017, at 6:22 PM, Bruce Cherniak wrote:
>
> v2: Reword commit message to more closely adhere to community
> guidelines.
>
> This patch moves msaa resolve down into core/StoreTiles where the
> surface format conversion routines are available. The previous
> "experimental" resolve w
Additionally I don’t think this should go into stable - without the
corresponding rasterizer commit (which feels like a risky change post -rc1) it
is of limited use.
On Apr 25, 2017, at 6:58 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
This will cause asserts on piglit and dEQP runs in
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Apr 13, 2017, at 2:17 PM, George Kyriazis
mailto:george.kyria...@intel.com>> wrote:
Make swr compile for both linux and windows.
---
src/gallium/drivers/swr/SConscript| 7 +--
src/gallium/targets/libgl-xlib/SConscript | 2
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Apr 12, 2017, at 6:53 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
Removed unnecessary and probably wrong PIPE_BIND_SCANOUT and PIPE_BIND_SHARED
flags in favor of check on single PIPE_BIND_DISPLAY_TARGET flag.
Refere
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Apr 12, 2017, at 6:43 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
The context now contains SIMD vectors which must be aligned (specifically
samplePositions in the rastState in the derived state). Failure to align
ca
On Apr 13, 2017, at 4:26 AM, Nicolai Hähnle
mailto:nhaeh...@gmail.com>> wrote:
On 11.04.2017 18:53, Tim Rowley wrote:
---
src/gallium/drivers/swr/swr_screen.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/swr/swr_screen.cpp
b/src/gallium/drivers/swr/swr_screen.cpp
ind
On Apr 12, 2017, at 9:11 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
From: Emil Velikov
mailto:emil.veli...@collabora.com>>
Earlier commit bumped the requirement for the SWR driver.
Cc: Tim Rowley mailto:timothy.o.row...@intel.com>>
Fixes: 3c52a7316a1 ("swr: [configure.ac/scons]
Commit comment should not include “[rasterizer codegen]”, as it doesn’t modify
that code.
With that fixed, Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Mar 28, 2017, at 4:44 PM, George Kyriazis
mailto:george.kyria...@intel.com>> wrote:
Fix codegen build break that was introd
eed to investigate more. Fix in a separate checkin later?
George
On Mar 27, 2017, at 8:38 PM, Rowley, Timothy O
mailto:timothy.o.row...@intel.com>> wrote:
On closer review of 10/10, I don’t like the approach taken here.
You’ve added a —template argument to gen_backends.py, making it different fr
On closer review of 10/10, I don’t like the approach taken here.
You’ve added a —template argument to gen_backends.py, making it different from
the rest of the scripts and actually running it with different parameters on
automake and scons. Can’t you get scons to have the necessary dependency u
On Mar 27, 2017, at 5:06 AM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
On 25 March 2017 at 12:00, Tim Rowley
mailto:timothy.o.row...@intel.com>> wrote:
Move common codegen functions into gen_common.py.
---
src/gallium/drivers/swr/Makefile.am| 22 +--
.../drivers/swr/
> On Mar 20, 2017, at 1:42 PM, Emil Velikov wrote:
>
> On 16 March 2017 at 19:09, Tim Rowley wrote:
>> Hightlights include: lots of simd16 work, assert rework, and autogen
>> changes (scripts centralized, one file added, two removed).
>>
>> v2:
>> * adjust scons build system along with automak
On Mar 15, 2017, at 9:59 PM, Emil Velikov
mailto:emil.l.veli...@gmail.com>> wrote:
Hi Tim,
On 16 March 2017 at 00:12, Tim Rowley
mailto:timothy.o.row...@intel.com>> wrote:
Hightlights include: lots of simd16 work, assert rework, and autogen
changes (scripts centralized, one file added, two rem
> On Mar 3, 2017, at 5:55 AM, Emil Velikov wrote:
>
> On 3 March 2017 at 01:16, Tim Rowley wrote:
>> GS implementation uses the masked.{gather,store} intrinsics,
>> introduced in llvm-3.9.0.
>
> Please mention in the commit message that the SCons build already
> requires 3.9 or later.
> Can yo
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Mar 1, 2017, at 10:58 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
Recent change to st/mesa state update logic caused major regressions to
swr validation code.
swr uses the same validation logic (swr_update_derived)
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Feb 25, 2017, at 9:17 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
---
docs/features.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/features.txt b/docs/features.txt
index d9528e9..c42581a
> On Feb 9, 2017, at 8:50 AM, Emil Velikov wrote:
>
> On 7 December 2016 at 23:58, Tim Rowley wrote:
>> ---
>> .../drivers/swr/rasterizer/common/formats.cpp | 104
>> ++---
>> .../drivers/swr/rasterizer/common/formats.h| 7 +-
>> .../drivers/swr/rasterizer/core/for
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Feb 3, 2017, at 11:35 AM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
Removed unused Clip() and FRUSTUM_CLIP_MASK define.
---
src/gallium/drivers/swr/rasterizer/core/clip.cpp | 22 --
src/gallium/drive
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Feb 4, 2017, at 5:55 PM, Vinson Lee
mailto:v...@freedesktop.org>> wrote:
Tested-by: Vinson Lee mailto:v...@freedesktop.org>>
On Thu, Feb 2, 2017 at 12:42 PM, Cherniak, Bruce
mailto:bruce.chern...@intel.com>> wrote:
I followed up wi
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99119
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Dec 22, 2016, at 6:06 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
ICC doesn't like the use of nullptr (std::nullptr_t) argument in
p_atomic_set. GCC and c
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Dec 8, 2016, at 8:21 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Large points become pairs of triangles when rasterized, so we must feed
it three clip distances, one for each vertex.
The clip distance is not subject to spr
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Dec 8, 2016, at 8:21 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Clip distances need to be perspective-divided. This fixes all the
interpolation-*-{distance,vertex} piglits.
Signed-off-by: Ilia Mirkin mailto:imir...@alum.m
> On Nov 24, 2016, at 2:29 PM, Ilia Mirkin wrote:
>
> Clip distances need to be perspective-divided. This fixes all the
> interpolation-*-{distance,vertex} piglits.
>
> Also take this opportunity to fix clip distances for points rasterized
> as triangles - the clip distance is not subject to sp
Interesting. My testing was done using piglit on an avx512 capable processor,
where I didn’t see any regressions.
llvmpipe’s “make check” also passes for me with this change on avx2 and avx512
machines.
Was this the only regression you saw?
-Tim
> On Dec 6, 2016, at 12:27 AM, Michel Dänzer
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Dec 1, 2016, at 7:08 PM, Bruce Cherniak
mailto:bruce.chern...@intel.com>> wrote:
The active_query count was incorrect for query types that don't require
a begin_query. Removed the unnecessary assert.
---
src/gallium/drivers/swr/swr
Should have parens on the zsbuf test line to match your corresponding change
for cbuf attachments.
With that change, Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Dec 2, 2016, at 1:18 PM, George Kyriazis
mailto:george.kyria...@intel.com>> wrote:
Include propagation of compari
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 29, 2016, at 8:23 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
The buffer_size does not take the offset into account. Just add the
offset into the pointer which lines up the structures much better.
Signed-off-by: Ilia M
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 29, 2016, at 8:23 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/swr_context.cpp | 10 +-
1 file changed, 9 insertions(+), 1 delet
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 29, 2016, at 8:23 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
The number has to be less than or equal to the max, not just less than.
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 29, 2016, at 8:23 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
The components count the number of individual values, not the number of
slots.
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/driv
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 29, 2016, at 8:23 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
There is no support for resuming streamout. Furthermore, this also
controls glDrawTransformFeedback functionality which requires the same
ability to query ho
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 29, 2016, at 8:05 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
We now support clearing these, and actually rendering to multiple layers
would require GS support, which will fail in much more spectacular ways
for now. Onc
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 16, 2016, at 9:04 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Since we don't pass a renderTargetArrayIndex in, and the current hot
tile may be for a different index, we may end up loading the RTAI=0 into
the hot tile fo
Not seeing this assert fire on our tests either.
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 29, 2016, at 8:04 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
I've been running this for a little while and
On Nov 27, 2016, at 11:13 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
On Thu, Nov 24, 2016 at 6:11 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Instead of (incorrectly) biasing the snorm value to make it look like a
unorm, just use signed integer math.
This fixes arb_color_buf
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/swr_screen.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/ga
I’ve verified the same entries are in the list before/after.
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/swr_screen
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Everything is in place for these.
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/swr_screen.cpp | 2 +-
1 file changed,
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/swr_state.cpp | 13 +
1 file changed, 1 insertion(+), 12 dele
Ouch, that must have been a pain to reorganize - thanks. Visual inspection
says the caps are the same before and after, and testing shows it still passing
the same tests.
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
mailto:imir...@alum.
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 22, 2016, at 7:37 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/swr_draw.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
di
This patch is showing some regressions on internal testing. As we talked about
on irc, it appears to be a combination of crashes (probably missing table
entries) and possibly wrong clear values. Will need to back to you later about
the errors, but for now we need to hold off on this patch.
-T
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 19, 2016, at 9:48 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp | 13 -
1 file changed, 8 ins
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 19, 2016, at 9:48 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp | 10 --
1 file changed, 8 insert
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 19, 2016, at 9:48 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/rasterizer/memory/ClearTile.cpp | 2 ++
1 file changed, 2 insertions(+)
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 25, 2016, at 7:35 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/rasterizer/core/api.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletio
Mirkin
mailto:imir...@alum.mit.edu>> wrote:
On Wed, Nov 23, 2016 at 3:02 PM, Rowley, Timothy O
mailto:timothy.o.row...@intel.com>> wrote:
This code seems to assume that all attached buffers have the same start layer,
and that start will be zero. Maybe it should construct the clearMask insi
This code seems to assume that all attached buffers have the same start layer,
and that start will be zero. Maybe it should construct the clearMask inside
the layer loop, which would also be a bit clearer than the code you added to
drop bits out of the mask?
-Tim
> On Nov 17, 2016, at 6:51 PM
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 17, 2016, at 6:51 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
When switching render target array indexes (as might happen in a GS, or
in a future change, with layered clears), if the previous state is
HOTTILE_CLEAR, we
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 17, 2016, at 6:51 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Currently clears only operate on the 0th array index (ignoring surface
layout parameters). Instead normalize to take a RTAI like all the
load/store tile logi
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 21, 2016, at 11:52 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/swr_shader.cpp | 6 --
1 file changed, 4 insertions(+), 2 deletions(
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 21, 2016, at 11:52 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
This fixes gl-coord-replace-doesnt-eliminate-frag-tex-coords
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
---
src/gallium/drivers/swr/swr_shade
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 21, 2016, at 11:52 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
Fixes a few things:
- sprite coords only apply to generic varyings, and are a bitmask
- back color only applies in 2-sided lighting mode
- handle some odd s
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 21, 2016, at 11:52 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
We were previously not marking the "regular" flat outputs as flat when
flatshading was enabled.
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
--
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 21, 2016, at 11:52 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
The way that dual-source blending is described for GLES2 is very odd,
and we end up with a shader that both has this property set *and* has a
color1 value t
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 20, 2016, at 12:20 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
This may ultimately be possible to support, but for now it's not hooked
up and the swr core only supports this output from GS.
This normally wouldn't matte
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 20, 2016, at 10:32 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
The former calculations were for min/max y. The width/height don't take
translate into account.
Signed-off-by: Ilia Mirkin mailto:imir...@alum.mit.edu>>
--
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 19, 2016, at 10:11 AM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
This is the same value that llvmpipe uses. Since swr uses the same
sampler logic, makes sense for this value to also be the same. Most
applications don't ca
Reviewed-by: Tim Rowley
mailto:timothy.o.row...@intel.com>>
On Nov 17, 2016, at 10:56 PM, Ilia Mirkin
mailto:imir...@alum.mit.edu>> wrote:
There's no guarantee that mip width/height will be a multiple of the
compressed block size. Doing a divide by the block size first yields
different results
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