on all gen4 platforms:
conformance/textures/texture-size-cube-maps.html
NOTE: This is a candidate for stable release branches.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_tex_layout.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dr
candidate for stable release branches.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/intel/intel_fbo.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c
b/src/mesa/drivers/dri/intel/intel_fbo.c
index 185602a..000c3db 100644
n all enabled tex coord units need do
CoordReplace (Eric)
v3: move the sprite point validate code at I915InvalidateState (Eric)
v4: sprite point enable bit update based on _NEW_PROGRAM, too
add relative _NEW-state comments to show what state is being used(Eric)
Signed-off-by: Yuanha
On Wed, Mar 28, 2012 at 01:21:18PM -0700, Eric Anholt wrote:
> On Sat, 17 Mar 2012 10:58:27 +0800, Liu Aleaxander
> wrote:
> > On Sat, Mar 17, 2012 at 1:57 AM, Eric Anholt wrote:
> > > On Mon, 12 Mar 2012 16:04:00 +0800, Yuan
Fix 'set but not used' warnings; gl_version, gl_versions_profiles and
glx_extensions variables are used just only HAVE_XCB_GLX_CREATE_CONTEXT
is defined. Thus those warnings are shown when that macro isn't defined.
Signed-off-by: Yuanhan Liu
---
src/glx/clientinfo.c |2 ++
j,
The above change will make the map_refcount un-blanced since you removed
the increase to the successfully mapped region, here is a patch to fix
this issue:
>From 3ce3f93d3378fd31df6dca24230edb52407cb9d8 Mon Sep 17 00:00:00 2001
From: Yuanhan Liu
Date: Tue, 27 Mar 2012 15:41:52 +0800
Subject: [PAT
> + if (pdraw == NULL) {
> + ErrorMessageF("failed to create drawable\n");
> + return NULL;
> + }
> +
Looks good to me, except the minor indent issue.
Otherwise,
Reviewed-by: Yuanhan Liu
> if (__glxHashInsert(priv->drawHash, glxDra
On Tue, Mar 20, 2012 at 10:36:24AM -0700, Eric Anholt wrote:
> On Mon, 19 Mar 2012 09:38:03 +0800, Yuanhan Liu
> wrote:
> > On Fri, Mar 16, 2012 at 04:26:43PM -0700, Eric Anholt wrote:
> > > ---
> > > src/mesa/drivers/dri/intel/intel_screen.c | 23
On Fri, Mar 16, 2012 at 11:13:23AM -0700, Eric Anholt wrote:
> On Thu, 15 Mar 2012 14:42:53 +0800, Yuanhan Liu
> wrote:
> > There are two mipmap layout modes: below and right. And we currently just
> > use _below_ mode. And in some cases, like height is greater than width,
>
lit max-texture-size test.
Reviewed-by: Yuanhan Liu
> ---
> src/gallium/drivers/softpipe/sp_limits.h |1 +
> src/gallium/drivers/softpipe/sp_screen.c |2 +-
> 2 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/src/gallium/drivers/softpipe/sp_limits.h
On Fri, Mar 16, 2012 at 04:26:43PM -0700, Eric Anholt wrote:
> ---
> src/mesa/drivers/dri/intel/intel_screen.c | 23 ---
> 1 files changed, 4 insertions(+), 19 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
> b/src/mesa/drivers/dri/intel/intel_scree
creen.c | 32
>
> 3 files changed, 37 insertions(+), 0 deletions(-)
Reviewed-by: Yuanhan Liu
>
> diff --git a/src/mesa/drivers/dri/intel/intel_context.c
> b/src/mesa/drivers/dri/intel/intel_context.c
> index 7b2bdad..ff721fb 100644
> --- a/src/me
On Thu, Mar 15, 2012 at 08:32:34PM -0700, Jakob Bornecrantz wrote:
> - Original Message -
> > On Thu, Mar 15, 2012 at 01:22:10PM +0800, Yuanhan Liu wrote:
> > > On Tue, Mar 13, 2012 at 07:29:02AM -0700, Jakob Bornecrantz wrote:
> > > > - Original Message
On Thu, Mar 15, 2012 at 01:22:10PM +0800, Yuanhan Liu wrote:
> On Tue, Mar 13, 2012 at 07:29:02AM -0700, Jakob Bornecrantz wrote:
> > - Original Message -
> > > On Mon, Mar 12, 2012 at 05:05:08PM -0700, Jakob Bornecrantz wrote:
> > > > Hi all
> > >
pineview in a hardware way(no fallback). Since when
rendering with 1x2048 texture using below mode would make the draw
offset exceed the max allowed size, but will not when using right mode.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i915/i915_reg.h |1 +
src/mesa/drivers
ev/2012-February/019167.html
>
> I meant 8.0.2, sorry for any confusion.
Thanks.
BTW, I have some commites which should be inclued in the next
release(aka 8.0.2 here). Should I do cherry-pick myself? (Usually, Ian
will do that for me before).
Thanks,
Yuanhan Liu
__
ou mean 8.1? 8.0.1 has been relased for a while, see
http://lists.freedesktop.org/archives/mesa-dev/2012-February/019167.html
Thanks,
Yuanhan Liu
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
On Mon, Mar 12, 2012 at 12:30:20PM -0700, Eric Anholt wrote:
> On Mon, 12 Mar 2012 16:04:01 +0800, Yuanhan Liu
> wrote:
> > Signed-off-by: Yuanhan Liu
>
> Is there a reason for this change? What test does it fix?
No big reason and it doesn't fix anyting so far. I
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i915/i915_state.c |8 +++-
src/mesa/drivers/dri/i915/i915_vtbl.c |9 +
2 files changed, 16 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i915_state.c
b/src/mesa/drivers/dri/i915/i915_state.c
index
place(Eric).
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i915/i915_context.h |1 +
src/mesa/drivers/dri/i915/i915_state.c | 13 +---
src/mesa/drivers/dri/i915/intel_tris.c | 52 ++
3 files changed, 54 insertions(+), 12 deletions(-)
diff --git
On Mon, Mar 12, 2012 at 10:14:06AM +0800, Yuanhan Liu wrote:
> On Fri, Mar 09, 2012 at 10:35:33AM -0800, Eric Anholt wrote:
> > On Thu, 8 Mar 2012 19:21:23 +0800, Yuanhan Liu
> > wrote:
> > > From ddd1a9d8f0d82c2f5fcb78a471608a005a6a077c Mon Sep 17 00:00:00 2001
On Fri, Mar 09, 2012 at 10:35:33AM -0800, Eric Anholt wrote:
> On Thu, 8 Mar 2012 19:21:23 +0800, Yuanhan Liu
> wrote:
> > From ddd1a9d8f0d82c2f5fcb78a471608a005a6a077c Mon Sep 17 00:00:00 2001
> > From: Yuanhan Liu
> > Date: Thu, 8 Mar 2012 18:48:54 +0800
> &
On Thu, Mar 08, 2012 at 02:30:30PM +0800, Yuanhan Liu wrote:
> The current code would use tex coord to implement varying inputs. If
> point sprite is enabled(always enabled in chrome and firefox), the tex
> coord would be replaced with the value (x, y, 0, 1) where x and y vary
> from
On Fri, Mar 02, 2012 at 01:52:00PM +0800, Yuanhan Liu wrote:
> On Thu, Mar 01, 2012 at 04:04:59PM +0800, Yuanhan Liu wrote:
> > On Wed, Feb 29, 2012 at 11:44:59AM -0800, Eric Anholt wrote:
> > > On Wed, 29 Feb 2012 15:11:06 +0800, Yuanhan Liu
> > > wrote:
> > &
g
inputs.
This would _really_ fix the following webglc case on pineview this time:
https://cvs.khronos.org/svn/repos/registry/trunk/public/webgl/conformance-suites/1.0.1/conformance/rendering/point-size.html
NOTE: This is a candidate for stable release branches.
Signed-off-by: Yuanhan Liu
---
src/m
me a little bit?
(I will try to understand that by reading more, of course).
BTW, any thoughts on handling varying inputs better(I mean, don't use
texture coord)?
You can use the program I attached to reproduce this issue on pineview.
Thanks,
Yuanhan Liu
#include
#include
#include
#i
On Tue, Mar 06, 2012 at 08:25:10AM -0800, Eric Anholt wrote:
> On Mon, 27 Feb 2012 15:46:32 +0800, Yuanhan Liu
> wrote:
> > diff --git a/src/mesa/drivers/dri/i965/brw_sf.c
> > b/src/mesa/drivers/dri/i965/brw_sf.c
> > index 6e63583..7950c47 100644
> > --- a/src/
We have to do fallback when the 'Clipped Drawing Rectangle X/Y Max'
exceed the hardware's limit no matter the drawing rectangle offset
changed or not.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46665
NOTE: This is a candidate for stable release branches.
Signed-off-
On Thu, Mar 01, 2012 at 04:04:59PM +0800, Yuanhan Liu wrote:
> On Wed, Feb 29, 2012 at 11:44:59AM -0800, Eric Anholt wrote:
> > On Wed, 29 Feb 2012 15:11:06 +0800, Yuanhan Liu
> > wrote:
> > > According to 3DSTATE_MAP_STATE at page of 104 in Bspec
> > > vol3d 3D
On Thu, Mar 01, 2012 at 09:54:46AM -0800, Eric Anholt wrote:
> On Thu, 23 Feb 2012 14:19:19 +0800, Yuanhan Liu
> wrote:
> > The current code would ignore the point size specified by gl_PointSize
> > builtin variable in vertex shader on Pineview. This patch servers
On Wed, Feb 29, 2012 at 11:44:59AM -0800, Eric Anholt wrote:
> On Wed, 29 Feb 2012 15:11:06 +0800, Yuanhan Liu
> wrote:
> > According to 3DSTATE_MAP_STATE at page of 104 in Bspec
> > vol3d 3D Instructions:
> > [DevGDG and DevAlv]: Must be a power of 2 for cube maps
>
7;ll commit this myself.
Hi Jose,
Please go ahead :) and thanks.
>
> Jose
>
> - Original Message -
> > On Mon, Sep 19, 2011 at 06:25:54PM +0800, Yuanhan Liu wrote:
> > > If I understand correctly, the new GL3 buffer object queries
> > > parameters,
: This is a candidate for stable release branches.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i915/i915_texstate.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c
b/src/mesa/drivers/dri/i915/i915_texstate.c
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i915/i915_texstate.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c
b/src/mesa/drivers/dri/i915/i915_texstate.c
index 9022548..0e500e2 100644
--- a/src/mesa/drivers/dri/i915
ping..
comments?
Thanks,
Yuanhan Liu
On Thu, Feb 23, 2012 at 02:19:19PM +0800, Yuanhan Liu wrote:
> The current code would ignore the point size specified by gl_PointSize
> builtin variable in vertex shader on Pineview. This patch servers as
> fixing that.
>
> This
Hi Brian,
comments?
Thanks,
Yuanhan Liu
On Thu, Feb 23, 2012 at 02:19:18PM +0800, Yuanhan Liu wrote:
> We may specify the point size in a glsl vertex shader.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46311
> piglit: glsl-vs-point-size
>
> NOTE: This is a ca
Ping..
Comments?
Thanks,
Yuanhan Liu
On Mon, Feb 27, 2012 at 03:46:32PM +0800, Yuanhan Liu wrote:
> This patch add the support of gl_PointCoord gl builtin variable for
> platform gen4 and gen5(ILK).
>
> Unlike gen6+, we don't have a hardware support of gl_PointCoord, mean
reedesktop.org/show_bug.cgi?id=45975
Piglit: glsl-fs-pointcoord and fbo-gl_pointcoord
NOTE: This is a candidate for stable release branches.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_context.h |6 ++
src/mesa/drivers/dri/i965/brw_fs.cpp|9 +
src/
On Thu, Feb 23, 2012 at 02:37:06PM +0800, Yuanhan Liu wrote:
> On Tue, Feb 21, 2012 at 11:59:17AM -0800, Eric Anholt wrote:
> > On Sun, 19 Feb 2012 13:31:33 +0800, Liu Aleaxander
> > wrote:
> > > On Sun, Feb 19, 2012 at 8:54 AM, Eric Anholt wrote:
> > > > On
_entry_size in the SF is the size of what the SF outputs and is what
> determines how much space is allocated by brw_urb.c
Thanks for the info.
Well, I was trying to figure out why this patch doesn't work when the
urb read lenght per each attribute is set to 2 at calculate_urb_setup(),
b
/rendering/point-size.html
piglit: glsl-vs-point-size
NOTE: This is a candidate for stable release branches.
v2: pick Eric's nice tip for fixing this issue in hardware rendering.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i915/i915_fragprog.c |4
1 files changed, 4 inser
We may specify the point size in a glsl vertex shader.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46311
piglit: glsl-vs-point-size
NOTE: This is a candidate for stable release branches.
Signed-off-by: Yuanhan Liu
---
src/mesa/tnl/t_context.c |3 +--
1 files changed, 1
> version 2.0 requirement is removed).
>
> It looks like to do this right in hardware, you just need to emit
> _TNL_ATTRIB_PSZ with S4_VFMT_POINT_WIDTH in i915ValidateFragmentProgram
> just before COLOR0.
I tried it and it worked. This is so *cool*!
Thanks for the nice tip. Will m
NOTE: This is a candidate for stable release branches.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 27 +
src/mesa/drivers/dri/i965/brw_fs.h |1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |2 +
src/mesa/drivers/dri/i965/brw
or(destTex->TexFormat) !=
> + _mesa_is_integer_format(format)) {
> + _mesa_error(ctx, GL_INVALID_OPERATION,
> + "glTexSubImage%d(integer/non-integer format mismatch)",
^
I guess you missed on
candidate for stable release branches.
v2: add the simliar logic to ivb, too (comments from Ian)
simplify the logic operation (comments from Brian)
v3: pick a better comment from Eric
use != for the logic instead of ^ (comments from Ian)
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri
On Thu, Jan 19, 2012 at 10:32:30AM -0700, Brian Paul wrote:
> On 01/19/2012 10:17 AM, Ian Romanick wrote:
> >On 01/18/2012 06:30 PM, Yuanhan Liu wrote:
> >>When rendering to FBO, rendering is inverted. At the same time, we
> >>would
> >>also make sure the poi
On Thu, Jan 19, 2012 at 09:51:32AM -0800, Eric Anholt wrote:
> On Thu, 19 Jan 2012 10:30:53 +0800, Yuanhan Liu
> wrote:
> > When rendering to FBO, rendering is inverted. At the same time, we would
> > also make sure the point sprite origin is inverted. Or, we will get an
&
candidate for stable release branches.
v2: add the simliar logic to ivb, too (comments from Ian)
simplify the logic operation (comments from Brian)
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_defines.h |1 +
src/mesa/drivers/dri/i965/gen6_sf_state.c | 15
On Wed, Jan 18, 2012 at 11:53:20AM -0800, Ian Romanick wrote:
> On 01/18/2012 02:23 AM, Yuanhan Liu wrote:
> >When rendering to FBO, rendering is inverted. At the same time, we would
> >also make sure the point sprite origin is inverted. Or, we will get an
> >inverted res
On Wed, Jan 18, 2012 at 12:13:28PM -0800, Ian Romanick wrote:
> On 01/18/2012 02:21 AM, Yuanhan Liu wrote:
> >On Wed, Jan 18, 2012 at 06:23:52PM +0800, Yuanhan Liu wrote:
> >>When rendering to FBO, rendering is inverted. At the same time, we would
> >>also make sure
On Wed, Jan 18, 2012 at 06:23:52PM +0800, Yuanhan Liu wrote:
> When rendering to FBO, rendering is inverted. At the same time, we would
> also make sure the point sprite origin is inverted. Or, we will get an
> inverted result correspoinding to rendering to the default winsys FBO.
>
: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_defines.h |1 +
src/mesa/drivers/dri/i965/gen6_sf_state.c | 19 +--
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 4d90a99
On Tue, Jan 10, 2012 at 08:43:18PM -0700, Brian Paul wrote:
> On Tue, Jan 3, 2012 at 8:59 PM, Yuanhan Liu
> wrote:
> > On Wed, Jan 04, 2012 at 11:20:07AM +0800, Yuanhan Liu wrote:
> >> On Tue, Jan 03, 2012 at 08:25:31PM +0100, Roland Scheidegger wrote:
> >> > Ah
On Wed, Jan 04, 2012 at 07:23:24PM +0100, Roland Scheidegger wrote:
> Am 04.01.2012 04:59, schrieb Yuanhan Liu:
> > On Wed, Jan 04, 2012 at 11:20:07AM +0800, Yuanhan Liu wrote:
> >> On Tue, Jan 03, 2012 at 08:25:31PM +0100, Roland Scheidegger wrote:
> >>> Ah index
On Wed, Jan 04, 2012 at 02:55:44PM -0700, Brian Paul wrote:
> We were wastefully mapping the whole source/dest buffers before.
> ---
> src/mesa/main/bufferobj.c | 12 ++--
> 1 files changed, 6 insertions(+), 6 deletions(-)
Looks good to me.
Reviewed-by: Yuanhan Liu
>
On Wed, Jan 04, 2012 at 11:20:07AM +0800, Yuanhan Liu wrote:
> On Tue, Jan 03, 2012 at 08:25:31PM +0100, Roland Scheidegger wrote:
> > Ah index scanning...
> > I don't like that this will map/unmap the ib once for each prim,
> Me either :)
>
> > though
> >
while, we may do some combine to reduce some
map/unmap.
> actually map the ib, you lose anyway). Hopefully won't hit that
> performance hog often...
> A comment inline.
>
>
> Am 31.12.2011 07:32, schrieb Yuanhan Liu:
[snip]...
> > + for (i = 0; i < nr_prims; i
|2 +-
> src/mesa/state_tracker/st_manager.c|2 +-
> 14 files changed, 22 insertions(+), 23 deletions(-)
Reviewed-by: Yuanhan Liu
>
> diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c
> b/src/mesa/drivers/dri/intel/intel_tex_image.c
> inde
sue.
As when nr_prims = 1, we can pass 1 to paramter nr_prims, thus I made
vbo_get_minmax_index() static.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_draw.c |2 +-
src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c |3 +-
src/mesa/main/api_validate.c
On Thu, Dec 29, 2011 at 09:10:03AM +0100, Michel Dänzer wrote:
> On Don, 2011-12-29 at 10:03 +0800, Yuanhan Liu wrote:
> > On Wed, Dec 28, 2011 at 12:07:08PM -0800, Eric Anholt wrote:
> > > On Wed, 28 Dec 2011 13:54:43 +0800, Yuanhan Liu
> > > wrote:
> >
On Wed, Dec 28, 2011 at 12:07:08PM -0800, Eric Anholt wrote:
> On Wed, 28 Dec 2011 13:54:43 +0800, Yuanhan Liu
> wrote:
> > The current code would just calculate min/max_index for the first prim
> > unconditionally, which is wrong if nr_prims > 1.
> >
> > Th
On Tue, Dec 27, 2011 at 11:15:42AM -0800, Eric Anholt wrote:
> On Sun, 25 Dec 2011 12:26:25 +0800, Liu Aleaxander
> wrote:
> > On Sun, Dec 25, 2011 at 8:03 AM, Eric Anholt wrote:
> > > On Thu, 22 Dec 2011 18:55:50 +0800, Yuanhan Liu
> > > wrote:
> > >&
ses.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_draw.c | 18 --
1 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index 621195d..3d0cc7c 100644
--- a/src/mesa/drivers/dri/i
introduce vbo_sizeof_ib_type() function to return the index data type
size. I see some place use switch(ib->type) to get the index data type,
which is sort of duplicate.
Signed-off-by: Yuanhan Liu
---
src/mesa/state_tracker/st_draw.c | 15 +
src/mesa/state_trac
On Thu, Dec 22, 2011 at 07:51:46PM -0800, Kenneth Graunke wrote:
> On 12/22/2011 07:04 PM, Yuanhan Liu wrote:
> > On Thu, Dec 22, 2011 at 02:33:03PM -0800, Kenneth Graunke wrote:
> >> On 12/21/2011 01:33 AM, Yuanhan Liu wrote:
> [snip]
> >>> -#define BRW_E
On Thu, Dec 22, 2011 at 11:09:12AM -0800, Kenneth Graunke wrote:
> On 12/21/2011 01:33 AM, Yuanhan Liu wrote:
> [snip]
> > + int emit_endif = 1;
>
> Please use bool and true/false rather than int.
Yes, right. Will fix it.
>
> > /* In single program flow mode,
On Thu, Dec 22, 2011 at 02:33:03PM -0800, Kenneth Graunke wrote:
> On 12/21/2011 01:33 AM, Yuanhan Liu wrote:
> > Here is the final patch to enable dynamic eu instruction store size:
> > increase the brw eu instruction store size dynamically instead of just
> > allocating
On Thu, Dec 22, 2011 at 02:37:58PM -0800, Kenneth Graunke wrote:
> On 12/21/2011 01:33 AM, Yuanhan Liu wrote:
> > Hi, this is a new series of patches for dynamic eu instruction store
> > size. The first 4 is from Eric. I just grabed it to make it rebase to
> > current repo
For the case that index data is stored in element array buffer object,
and user called glMultiDrawElements, count the min/max_index before
calling vbo->draw_prims. vbo_get_minmax_index() isn't friendly to this
case. So do it while building the prim info.
Signed-off-by: Yuanhan Liu
---
On Wed, Dec 21, 2011 at 05:57:35AM -0800, Eric Anholt wrote:
> On Wed, 21 Dec 2011 17:33:41 +0800, Yuanhan Liu
> wrote:
> > If dynamic instruction store size is enabled, while after the brw_JMPI()
> > and before the brw_land_fwd_jump() function, the eu instruction store
> &g
it to 1'.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.c |7 +++
src/mesa/drivers/dri/i965/brw_eu.h |7 ---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 12 +++-
3 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/src/mesa/d
A single next_insn may change the base address of instruction store
memory(p->store), so call it first before referencing the instruction
store pointer from an index.
This the final prepare work to enable the dynamic store size.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i
-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.h |8 +---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 17 -
src/mesa/drivers/dri/i965/brw_sf_emit.c |2 +-
src/mesa/drivers/dri/i965/brw_wm_emit.c |2 +-
4 files changed, 15 insertions(+), 14 deletions(-)
d
ory address.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.c |3 +--
src/mesa/drivers/dri/i965/brw_eu.h |4 +++-
src/mesa/drivers/dri/i965/brw_eu_emit.c | 22 +++---
3 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/src/m
From: Eric Anholt
The codegen backends all had this same tracking, so just do it at the
EU level.
Reviewed-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.c |1 +
src/mesa/drivers/dri/i965/brw_eu.h | 10 --
src/mesa/drivers/dri/i965/brw_eu_emit.c
From: Eric Anholt
The EU code itself can just do this work, since all the consumers were
duplicating it.
Reviewed-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 36 +-
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 33 +++-
src
From: Eric Anholt
This is a similar cleanup to what we did for brw_IF(), brw_ELSE(),
brw_ENDIF() handling.
Reviewed-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_clip_line.c |5 +--
src/mesa/drivers/dri/i965/brw_clip_tri.c | 15 +---
src/mesa/drivers/dri/i965
From: Eric Anholt
The branch distances get patched up later at the WHILE instruction.
Reviewed-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu_emit.c |3 +--
src/mesa/drivers/dri/i965/brw_fs_emit.cpp |2 +-
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp |2 +-
src/mesa
oglc test cases, and found
no regression. (Sandybridge only).
Thanks,
Yuanhan Liu
--
Eric Anholt (4):
i965: Drop unused do_insn argument from gen6_CONT().
i965: Don't make consumers of brw_DO()/brw_WHILE() track loop start
i965: Don't make consumers of brw_WHILE do pre-gen6
On Fri, Dec 02, 2011 at 11:25:55AM -0800, Eric Anholt wrote:
> On Thu, 1 Dec 2011 18:26:50 +0800, Yuanhan Liu
> wrote:
> >
> > Actually the first 5 patches are all prepare work for patch 6.
> >
> > I checked those patches will all intel oglc testcases,
it to 1'.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.c |7 +++
src/mesa/drivers/dri/i965/brw_eu.h |7 ---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 22 +++---
3 files changed, 30 insertions(+), 6 deletions(-)
diff --git
-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.h |8 +---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 17 -
src/mesa/drivers/dri/i965/brw_sf_emit.c |2 +-
src/mesa/drivers/dri/i965/brw_wm_emit.c |2 +-
4 files changed, 15 insertions(+), 14 deletions(-)
d
the loop_stack to
store the instruction index instead.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_clip_line.c |2 +-
src/mesa/drivers/dri/i965/brw_clip_tri.c |6 ++--
src/mesa/drivers/dri/i965/brw_clip_unfilled.c |4 +-
src/mesa/drivers/dri/i965/brw_e
the instruction memory address.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.c |3 +--
src/mesa/drivers/dri/i965/brw_eu.h |4 +++-
src/mesa/drivers/dri/i965/brw_eu_emit.c | 16
3 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/src/m
The reason to add a help function instead of just use 'insn - p->store'
instead is that this help function includes an assert.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.h |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/src/mes
andle some special
cases here, like brw_DO/JMPI, to let them return the instruction
index.
--
Yuanhan Liu (5):
i965: Add a help function brw_insn_index to get the instruction index
i965: prepare work for dynamic instruction store size on
IF/ELSE/ENDIF
i965: prepare work for dynamic instr
Here is the final patch to increase the brw eu instruction store size
dynamically instead of just allocating it statically with a constant
limit. This would fix something like 'GL_MAX_PROGRAM_INSTRUCTIONS_ARB
was 16384 while the driver would limit it to 1'.
Signed-off-by: Y
This is a prepare work of let us increase the instruction store size
dynamically by reralloc.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.h |3 +--
src/mesa/drivers/dri/i965/brw_eu_emit.c |4 ++--
src/mesa/drivers/dri/i965/brw_sf_emit.c |8
src/mesa
Let if_stack just store the instruction pointer(an index). This is
somehow more flexible than store the instruction memory address.
This is a prepare work of let us increase the instruction store size
dynamically by reralloc.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.c
Let all the while loop stack just store the instruction index. This is
somehow more flexible than store the instruction memory address.
This is a prepare work of let us increase the instruction store size
dynamically by reralloc.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.h |2 +-
src/mesa/drivers/dri/i965/brw_eu_emit.c |2 +-
src/mesa/drivers/dri/i965/brw_fs_emit.cpp |2 +-
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp |2 +-
src/mesa/drivers/dri/i965/brw_vs_emit.c
Let all the brw_OPCODE functions return an instruction index instead,
and use brw_insn_of(p, index) macro to reference the instruction stored
at p->store[].
This is a prepare work of let us increase the instruction store size
dynamically by reralloc.
Signed-off-by: Yuanhan Liu
---
src/m
Actually the first 5 patches are all prepare work for patch 6.
I checked those patches will all intel oglc testcases, and found no regressions.
What's better, it fixed something.
Yuanhan Liu (6):
i965: let all the brw_OPCODE functions return an instruction index
instead
i965: r
On Tue, Nov 29, 2011 at 10:40:46AM -0800, Eric Anholt wrote:
> On Tue, 29 Nov 2011 16:08:39 +0800, Yuanhan Liu
> wrote:
> > Increase the brw eu instruction store size dynamically instead of just
> > allocating it statically with a constant limit. This would fix
On Tue, Nov 29, 2011 at 10:35:42AM -0800, Eric Anholt wrote:
> On Tue, 29 Nov 2011 16:08:38 +0800, Yuanhan Liu
> wrote:
> > Let if_stack just store the instruction pointer(an index). This is
> > somehow more flexible than store the instruction memory address.
>
> I'
Increase the brw eu instruction store size dynamically instead of just
allocating it statically with a constant limit. This would fix something
that 'GL_MAX_PROGRAM_INSTRUCTIONS_ARB was 16384 while the driver would
limit it to 1'.
Signed-off-by: Yuanhan Liu
---
src/mesa/driver
Let if_stack just store the instruction pointer(an index). This is
somehow more flexible than store the instruction memory address.
This patch is mainly for the next patch.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.c |3 +--
src/mesa/drivers/dri/i965/brw_eu.h
I didn't find anywhere use it anymore, remove it.
Signed-off-by: Yuanhan Liu
---
src/mesa/drivers/dri/i965/brw_eu.h |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index dcb1fc9..8a446eb 1
Silence the compile warning
Signed-off-by: Yuanhan Liu
---
src/glx/drisw_glx.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/src/glx/drisw_glx.c b/src/glx/drisw_glx.c
index a150c61..7ba491b 100644
--- a/src/glx/drisw_glx.c
+++ b/src/glx/drisw_glx.c
@@ -304,7 +304,6
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