Re: [Mesa-dev] [PATCH 1/9] nir: Fix constant evaluation of bfm.

2016-01-12 Thread Iago Toral
Reviewed-by: Iago Toral Quiroga On Mon, 2016-01-11 at 14:48 -0800, Matt Turner wrote: > NIR's bfm, like Intel/AMD's hardware instructions and GLSL IR's > ir_binop_bfm takes as src0 and as src1. > --- > src/glsl/nir/nir_opcodes.py | 2 +- > 1 file changed, 1 insertion(+), 1

Re: [Mesa-dev] [PATCH 1/9] nir: Fix constant evaluation of bfm.

2016-01-12 Thread Connor Abbott
On Mon, Jan 11, 2016 at 6:52 PM, Ian Romanick wrote: > On 01/11/2016 02:48 PM, Matt Turner wrote: >> NIR's bfm, like Intel/AMD's hardware instructions and GLSL IR's >> ir_binop_bfm takes as src0 and as src1. > > All the questions... > > Is the ordering of the operands

[Mesa-dev] [PATCH 1/9] nir: Fix constant evaluation of bfm.

2016-01-11 Thread Matt Turner
NIR's bfm, like Intel/AMD's hardware instructions and GLSL IR's ir_binop_bfm takes as src0 and as src1. --- src/glsl/nir/nir_opcodes.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/glsl/nir/nir_opcodes.py b/src/glsl/nir/nir_opcodes.py index d31507f..398ae50 100644 ---

Re: [Mesa-dev] [PATCH 1/9] nir: Fix constant evaluation of bfm.

2016-01-11 Thread Matt Turner
On Mon, Jan 11, 2016 at 3:52 PM, Ian Romanick wrote: > On 01/11/2016 02:48 PM, Matt Turner wrote: >> NIR's bfm, like Intel/AMD's hardware instructions and GLSL IR's >> ir_binop_bfm takes as src0 and as src1. > > All the questions... > > Is the ordering of the operands

Re: [Mesa-dev] [PATCH 1/9] nir: Fix constant evaluation of bfm.

2016-01-11 Thread Ian Romanick
On 01/11/2016 02:48 PM, Matt Turner wrote: > NIR's bfm, like Intel/AMD's hardware instructions and GLSL IR's > ir_binop_bfm takes as src0 and as src1. All the questions... Is the ordering of the operands documented anywhere? I was only able to deduce this by looking at glsl_to_nir.cpp (and