[Mesa-dev] [PATCH] radv: reset the window scissor with no clear state.

2019-07-17 Thread Dave Airlie
From: Dave Airlie IF we don't have clear state (which gfx10 doesn't currently) we will fix to reset the scissor. AMDVLK will leave it set to something else. Marek also has this fix for radeonsi pending. --- src/amd/vulkan/si_cmd_buffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

[Mesa-dev] [PATCH] radv: fix crash in shader tracing.

2019-07-17 Thread Dave Airlie
From: Dave Airlie Enabling tracing, and then having a vmfault, can leads to a segfault before we print out the traces, as if a meta shader is executing and we don't have the NIR for it. Just pass the stage and give back a default. Fixes: 9b9ccee4d64 ("radv: take LDS into account for compute

[Mesa-dev] [Bug 111107] 726a31df705b causes pipeline creation to use up to 5x more memory (which is not freed on pipeline destruction)

2019-07-17 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=07 Timothy Arceri changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

Re: [Mesa-dev] [PATCH 4/4] radv/gfx10: do not always execute a barrier before the second shader

2019-07-17 Thread Bas Nieuwenhuizen
On Wed, Jul 17, 2019 at 3:44 PM Samuel Pitoiset wrote: > > With NGG, empty waves may still be required to export data. > > This fixes dEQP-VK.ycbcr.format.*_unorm.geometry_*. > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_nir_to_llvm.c | 31 ++- > 1

Re: [Mesa-dev] [PATCH 3/4] radv/gfx10: set BREAK_WAVE_AT_EOI if TES or GS enable the primitive ID

2019-07-17 Thread Bas Nieuwenhuizen
On Wed, Jul 17, 2019 at 3:44 PM Samuel Pitoiset wrote: > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_pipeline.c | 8 > 1 file changed, 8 insertions(+) > > diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c > index de933937f03..8b6e62a75f5

Re: [Mesa-dev] [PATCH 1/4] radv: move emitting VGT_GS_MODE into the HW VS path

2019-07-17 Thread Bas Nieuwenhuizen
On Thu, Jul 18, 2019 at 2:05 AM Bas Nieuwenhuizen wrote: > > On Wed, Jul 17, 2019 at 3:44 PM Samuel Pitoiset > wrote: > > > > It's useless for NGG anyways. > > > > Signed-off-by: Samuel Pitoiset > > --- > > src/amd/vulkan/radv_pipeline.c | 43 ++ > > 1 file

Re: [Mesa-dev] [PATCH 1/4] radv: move emitting VGT_GS_MODE into the HW VS path

2019-07-17 Thread Bas Nieuwenhuizen
On Wed, Jul 17, 2019 at 3:44 PM Samuel Pitoiset wrote: > > It's useless for NGG anyways. > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_pipeline.c | 43 ++ > 1 file changed, 33 insertions(+), 10 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH] radv: fix VGT_GS_MODE if VS uses the primitive ID

2019-07-17 Thread Bas Nieuwenhuizen
r-b On Wed, Jul 17, 2019 at 10:54 AM Samuel Pitoiset wrote: > > Found by inspection. > > Cc: > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_pipeline.c | 10 +- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/src/amd/vulkan/radv_pipeline.c

[Mesa-dev] [AppVeyor] mesa master #11927 failed

2019-07-17 Thread AppVeyor
Build mesa 11927 failed Commit 9689407c54 by Eric Anholt on 7/17/2019 7:56 PM: freedreno/a6xx: Drop the WFI in the program update stateobj.\n\nRob Clark thinks this was likely a workaround for our const buffer\nupdate bugs, and now that it's passing tests, we

Re: [Mesa-dev] [PATCH] virgl: Set meta data for textures from handle.

2019-07-17 Thread Chia-I Wu
On Wed, Jul 17, 2019 at 3:59 PM Lepton Wu wrote: > > OK, actually struct winsys_handle is an obscure structure for virgl > driver so we can't access whandle->stride here... > So maybe just leave this CL as it is? That is fair. R-b'ed and pushed. > > On Wed, Jul 17, 2019 at 1:12 PM Chia-I Wu

[Mesa-dev] [AppVeyor] mesa master #11925 failed

2019-07-17 Thread AppVeyor
Build mesa 11925 failed Commit f1a8967344 by Bas Nieuwenhuizen on 7/17/2019 12:58 AM: radv: Only save the descriptor set if we have one.\n\nAfter reset, if valid does not contain the relevant bit the descriptor\ncan be != NULL but still not be valid.\n\nCC:

Re: [Mesa-dev] [PATCH] virgl: Set meta data for textures from handle.

2019-07-17 Thread Lepton Wu
OK, actually struct winsys_handle is an obscure structure for virgl driver so we can't access whandle->stride here... So maybe just leave this CL as it is? On Wed, Jul 17, 2019 at 1:12 PM Chia-I Wu wrote: > > On Wed, Jul 17, 2019 at 12:45 PM Lepton Wu wrote: > > metadata->stride[0] is

Re: [Mesa-dev] [PATCH] radv/gfx10: set the pgm rsrc3/4 regs using index sh reg set

2019-07-17 Thread Bas Nieuwenhuizen
r-b On Tue, Jul 16, 2019 at 7:28 AM Dave Airlie wrote: > > From: Dave Airlie > > This is ported from AMDVLK, it's probably not requires unless > we want to use "real time queues", but it might be nice to just have > in place. > --- > src/amd/common/sid.h | 1 + >

[Mesa-dev] [Bug 111150] [BRW] WRC 5 asserts with gallium nine and iris.

2019-07-17 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=50 --- Comment #4 from Nanley Chery --- (In reply to Illia Iorin from comment #2) > Yes, tilling is X-tiled. I created a merge request for this issue here: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1371 Please let me know if it

[Mesa-dev] [Bug 111150] [BRW] WRC 5 asserts with gallium nine and iris.

2019-07-17 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=50 Nanley Chery changed: What|Removed |Added CC||matias.nicolas...@gmail.com --- Comment

Re: [Mesa-dev] [PATCH] virgl: Set meta data for textures from handle.

2019-07-17 Thread Chia-I Wu
On Wed, Jul 17, 2019 at 12:45 PM Lepton Wu wrote: > metadata->stride[0] is calculated from > util_format_get_stride(pt->format, pt->width0); > So basically you are asking to check if > util_format_get_stride(pt->format, pt->width0) == whandle->stride > Should this be something done by framework?

[Mesa-dev] [AppVeyor] mesa master #11921 failed

2019-07-17 Thread AppVeyor
Build mesa 11921 failed Commit f92290a8d9 by Andreas Bergmeier on 7/14/2019 8:23 PM: broadcom: Move v3d_get_device_info to common\n\nIn common we can use implementation for Vulkan. Configure your notification preferences

Re: [Mesa-dev] [PATCH] virgl: Set meta data for textures from handle.

2019-07-17 Thread Lepton Wu
metadata->stride[0] is calculated from util_format_get_stride(pt->format, pt->width0); So basically you are asking to check if util_format_get_stride(pt->format, pt->width0) == whandle->stride Should this be something done by framework? On Wed, Jul 17, 2019 at 12:25 PM Chia-I Wu wrote: > > On

Re: [Mesa-dev] [PATCH] virgl: Set meta data for textures from handle.

2019-07-17 Thread Chia-I Wu
On Wed, Jul 17, 2019 at 11:44 AM Lepton Wu wrote: > > On Wed, Jul 17, 2019 at 11:26 AM Chia-I Wu wrote: > > > > On Wed, Jul 17, 2019 at 10:14 AM Erik Faye-Lund > > wrote: > > > > > > On Wed, 2019-07-17 at 10:02 -0700, Lepton Wu wrote: > > > > The set of meta data was removed by commit 8083464.

[Mesa-dev] [Bug 111020] [RADV][DXVK] GPU lockup on Risk of Rain 2

2019-07-17 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=111020 MayeulC changed: What|Removed |Added Version|unspecified |19.1 -- You are receiving this mail

Re: [Mesa-dev] [PATCH] virgl: Set meta data for textures from handle.

2019-07-17 Thread Lepton Wu
On Wed, Jul 17, 2019 at 11:26 AM Chia-I Wu wrote: > > On Wed, Jul 17, 2019 at 10:14 AM Erik Faye-Lund > wrote: > > > > On Wed, 2019-07-17 at 10:02 -0700, Lepton Wu wrote: > > > The set of meta data was removed by commit 8083464. It broke lots of > > > dEQP tests when running with pbuffer surface

Re: [Mesa-dev] [PATCH 1/2] radv/gfx10: always build the GS copy shader but uses it on-demand

2019-07-17 Thread Marek Olšák
I think Vulkan doesn't need to use legacy GS, because gs_invocations doesn't multiply the max_out_vertices limit in Vulkan, but it does multiply it in GL. Marek On Tue, Jul 16, 2019 at 10:39 AM Samuel Pitoiset wrote: > It should be possible to build it on-demand too but it requires > more

Re: [Mesa-dev] [PATCH] virgl: Set meta data for textures from handle.

2019-07-17 Thread Chia-I Wu
On Wed, Jul 17, 2019 at 10:14 AM Erik Faye-Lund wrote: > > On Wed, 2019-07-17 at 10:02 -0700, Lepton Wu wrote: > > The set of meta data was removed by commit 8083464. It broke lots of > > dEQP tests when running with pbuffer surface type. > > > > Fixes: 80834640137 ("virgl: remove dead code") > >

Re: [Mesa-dev] [PATCH] virgl: Set meta data for textures from handle.

2019-07-17 Thread Erik Faye-Lund
On Wed, 2019-07-17 at 10:02 -0700, Lepton Wu wrote: > The set of meta data was removed by commit 8083464. It broke lots of > dEQP tests when running with pbuffer surface type. > > Fixes: 80834640137 ("virgl: remove dead code") > Signed-off-by: Lepton Wu > --- >

[Mesa-dev] [PATCH] virgl: Set meta data for textures from handle.

2019-07-17 Thread Lepton Wu
The set of meta data was removed by commit 8083464. It broke lots of dEQP tests when running with pbuffer surface type. Fixes: 80834640137 ("virgl: remove dead code") Signed-off-by: Lepton Wu --- src/gallium/drivers/virgl/virgl_resource.c | 1 + 1 file changed, 1 insertion(+) diff --git

[Mesa-dev] [AppVeyor] mesa master #11917 failed

2019-07-17 Thread AppVeyor
Build mesa 11917 failed Commit a301250ece by Alyssa Rosenzweig on 7/16/2019 6:36 PM: panfrost: Merge varyings_mem into transient buffers\n\nTheoretically we would like these split since varyings can have\nspecially optimized flags (no map, coherent local). For

[Mesa-dev] [Bug 111141] [REGRESSION] [BISECTED] [DXVK] 1-bit booleans and Elite Dangerous shader mis-optimization

2019-07-17 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=41 --- Comment #7 from Denis --- Created attachment 144810 --> https://bugs.freedesktop.org/attachment.cgi?id=144810=edit intel_hd620_picture hi, looks like this issue is not actual for intel gpu. Tested on HD 620 (KBL). Picture attached (my

[Mesa-dev] [PATCH 4/4] radv/gfx10: do not always execute a barrier before the second shader

2019-07-17 Thread Samuel Pitoiset
With NGG, empty waves may still be required to export data. This fixes dEQP-VK.ycbcr.format.*_unorm.geometry_*. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_nir_to_llvm.c | 31 ++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 1/4] radv: move emitting VGT_GS_MODE into the HW VS path

2019-07-17 Thread Samuel Pitoiset
It's useless for NGG anyways. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 43 ++ 1 file changed, 33 insertions(+), 10 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index fdeb31c453e..686fd371f0f

[Mesa-dev] [PATCH 3/4] radv/gfx10: set BREAK_WAVE_AT_EOI if TES or GS enable the primitive ID

2019-07-17 Thread Samuel Pitoiset
Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 8 1 file changed, 8 insertions(+) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index de933937f03..8b6e62a75f5 100644 --- a/src/amd/vulkan/radv_pipeline.c +++

[Mesa-dev] [PATCH 2/4] radv: move emitting VGT_PRIMITIVEID_EN into the HW VS and NGG paths

2019-07-17 Thread Samuel Pitoiset
Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 42 -- 1 file changed, 15 insertions(+), 27 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 686fd371f0f..de933937f03 100644 ---

[Mesa-dev] [Bug 111150] [BRW] WRC 5 asserts with gallium nine and iris.

2019-07-17 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=50 --- Comment #2 from Illia Iorin --- Yes, tilling is X-tiled. This flush fixes the assertion failure but it didn't fix the game being stuck. I’ll try to make a trace. -- You are receiving this mail because: You are the QA Contact for the bug.

[Mesa-dev] [PATCH] radv: fix VGT_GS_MODE if VS uses the primitive ID

2019-07-17 Thread Samuel Pitoiset
Found by inspection. Cc: Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pipeline.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index a3323ae8135..f6cb3611c9d 100644 ---

Re: [Mesa-dev] [PATCH] radv: fix gathering clip/cull distance masks for GS

2019-07-17 Thread Samuel Pitoiset
On 7/17/19 10:25 AM, Juan A. Suarez Romero wrote: On Tue, 2019-07-16 at 08:37 +0200, Samuel Pitoiset wrote: For NGG, the driver relies on the VS outinfo struct. This fixes dEQP-VK.clipping.user_defined.clip_*_vert_tess_geom_* Should this be included in 19.1 stable branch? No, it's GFX10

Re: [Mesa-dev] [PATCH] radv: fix gathering clip/cull distance masks for GS

2019-07-17 Thread Juan A. Suarez Romero
On Tue, 2019-07-16 at 08:37 +0200, Samuel Pitoiset wrote: > For NGG, the driver relies on the VS outinfo struct. > > This fixes > dEQP-VK.clipping.user_defined.clip_*_vert_tess_geom_* > Should this be included in 19.1 stable branch? > Signed-off-by: Samuel Pitoiset > --- >

[Mesa-dev] [Bug 111151] vkGetRandROutputDisplayEXT returns VK_SUCCESS on failure

2019-07-17 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=51 Lionel Landwerlin changed: What|Removed |Added Resolution|--- |NOTABUG Status|NEW

Re: [Mesa-dev] [PATCH] radv: use correct register setter for ngg hw addr

2019-07-17 Thread Samuel Pitoiset
Reviewed-by: Samuel Pitoiset On 7/17/19 6:59 AM, Dave Airlie wrote: From: Dave Airlie this shouldn't matter, but it's good to be correct. --- src/amd/vulkan/radv_pipeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pipeline.c