Some texturing ops are about to have nonconstant offset support; the
offset in the header in these cases should be zero.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965
The commit message is wrong -- there is no requirement for the offset
to be dynamically uniform, either in the spec or in the i965
implementation in later patches.
On Tue, Oct 8, 2013 at 10:34 PM, Chris Forbes wrote:
> Prior to ARB_gpu_shader5 / GLSL 4.0, the offset is required to be
Sorry, that was a bit sloppy on my part..
Reviewed-by: Chris Forbes
On Wed, Oct 9, 2013 at 10:00 AM, Eric Anholt wrote:
> ---
> src/mesa/drivers/dri/i965/gen7_wm_state.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c
>
... in which support for shadow samplers is added.
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ARB_gpu_shader5's textureGather*() functions which take shadow samplers
have a separate `refz` parameter rather than adding it to the
coordinate.
Signed-off-by: Chris Forbes
---
src/glsl/builtin_functions.cpp | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
Signed-off-by: Chris Forbes
---
src/glsl/builtin_functions.cpp | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index ef8b7bb..deedddb 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl/builtin_functions.cpp
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_defines.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index f1ea736..c0caba6 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src
gather4_c's argument layout is straightforward -- refz just goes on the
end.
gather4_po_c's layout however -- the array index is replaced with refz.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 12 ++--
src/mesa/driver
Note that gather4_po_c's parameters are too long for SIMD16. It might be
worth emitting 2xSIMD8 messages in this case at some point.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 15 ---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 +
The 1D array case doesn't actually exist -- there is no 1D texture
support for gather.
For 2D arrays, the array index lands in the `r` slot of the message.
On Fri, Oct 11, 2013 at 9:25 AM, Eric Anholt wrote:
> Chris Forbes writes:
>
>> Note that gather4_po_c's param
You're right, that looks completely bogus.
I only have compiler tests and eyeballs for the shadow variants at
this point -- I'll sort that out :)
-- Chris
On Fri, Oct 11, 2013 at 9:33 AM, Eric Anholt wrote:
> Chris Forbes writes:
>
>> gather4_c's argument layout
Yes; fortunately we don't have to support offset and shadow together on them.
On Fri, Oct 11, 2013 at 10:13 AM, Eric Anholt wrote:
> Chris Forbes writes:
>
>> The 1D array case doesn't actually exist -- there is no 1D texture
>> support for gather.
>>
>>
Great to see this enabled!
For the series:
Reviewed-by: Chris Forbes
On Fri, Oct 11, 2013 at 7:12 PM, Kenneth Graunke wrote:
> On 10/10/2013 09:33 PM, Dave Airlie wrote:
>> On Fri, Oct 11, 2013 at 2:27 PM, Paul Berry wrote:
>>> It's been a long and rocky road, but geo
>As a follow-on, maybe fold _textureCubeArrayShadow() into this function
now that it has support for a separate comparitor parameter?
Yeah, I'll take a look at that.
On Fri, Oct 11, 2013 at 7:56 PM, Kenneth Graunke wrote:
> On 10/10/2013 12:21 AM, Chris Forbes wrote:
>>
This series adds support for textureGatherOffsets, by splitting it
into four textureGatherOffset operations and collecting the w component of each
result.
This is necessary because the hardware has no message that can do this directly.
___
mesa-dev mai
This is needed for textureGatherOffsets()
Signed-off-by: Chris Forbes
---
src/glsl/builtin_functions.cpp | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index deedddb..1b23677 100644
--- a/src/glsl
Signed-off-by: Chris Forbes
---
src/glsl/builtin_functions.cpp | 30 ++
1 file changed, 30 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 1b23677..45fff4c 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl
We don't have a message that does 4 independent offsets; a lowering
pass needs to lower it to 4 normal gather4s before reaching this
point.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 +++
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 3 +++
2
Rewrites textureGatherOffsets(s, p, offsets) into
gvec4(
textureGatherOffset(s, p, offsets[0]).w,
textureGatherOffset(s, p, offsets[1]).w,
textureGatherOffset(s, p, offsets[2]).w,
textureGatherOffset(s, p, offsets[3]).w
)
Signed-off-by: Chris Forbes
---
src
to replace
the existing txf coord+offset hacks.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_context.h| 1 +
.../dri/i965/brw_lower_unnormalized_offset.cpp | 84 ++
src/mesa/d
This generalizes the new ir_tg4 coord+offset lowering pass to support
ir_txf in all its flavors, and removes the various copies of the lowering in
the backend visitors.
Passes all the texelFetch* piglits.
Do people think this is a good idea?
___
mesa-
ir_txf expects an ivec* coordinate, and may be larger than ivec2;
shuffle things around so that this will work.
Signed-off-by: Chris Forbes
---
.../dri/i965/brw_lower_unnormalized_offset.cpp | 51 ++
1 file changed, 42 insertions(+), 9 deletions(-)
diff --git a/src/mesa
Just let it be handled by the lowering pass.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 60 +++---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 25 ++-
2 files changed, 18 insertions(+), 67 deletions(-)
diff --git a/src/mesa
Eek -- that's not quite true. It doesn't regress any piglits; it
doesn't fix the two that were failing already though.
On Sun, Oct 13, 2013 at 1:04 AM, Chris Forbes wrote:
> This generalizes the new ir_tg4 coord+offset lowering pass to support
> ir_txf in all its flavors, an
This series fixes some regressions introduced by the send-from-grf merge.
Possibly none of them show up with piglit master, but they cause extreme
breakage in my gs5-gather piglit branch.
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Gather unconditionally uses a header, but in some cases the
texture_offset value will be zero.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965
Previously this was float, which caused the copy from g0 to mangle
everything.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa
This series adds new textureGatherOffset overloads, and support for
nonconstant offsets.
V2: - Update for general churn + send-from-grf
- Reinstate assert on nonconstant offset if ARB_gpu_shader5 not supported.
This ought not to actually get hit as the GLSL frontend insists on a
co
- gsampler2DRect
- optional `comp` parameter
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/glsl/builtin_functions.cpp | 16
1 file changed, 16 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index d40888d..aa40876
Prior to ARB_gpu_shader5 / GLSL 4.0, the offset is required to be
a constant expression.
With that extension, it is relaxed to be an arbitrary expression.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/glsl/builtin_functions.cpp | 61
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 61c4bf5..19500d1 100644
--- a/src/mesa/drivers/dri
The generator code ends up clearer this way than if we had to sniff
via the message length. Implemented via the gather4_po message in
hardware, which is present in Gen7 and later.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_defines.h | 1
Some texturing ops are about to have nonconstant offset support; the
offset in the header in these cases should be zero.
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_shader.cpp | 9
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 46 +---
1 file changed, 42 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 3fde443..fe4741d
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index bd9c9e9..d6c565a 100644
--- a
Adds infrastructure for separate reference Z in texturing functions,
and support for shadow comparitors with textureGather*.
V2: - General churn, send-from-grf rebase, etc
- Make it actually work (Thanks Eric for pointing out that it didnt)
___
mesa
ARB_gpu_shader5's textureGather*() functions which take shadow samplers
have a separate `refz` parameter rather than adding it to the
coordinate.
Signed-off-by: Chris Forbes
Reviewed-by: Eric Anholt
Reviewed-by: Kenneth Graunke
---
src/glsl/builtin_functions.cpp | 20 +++---
Signed-off-by: Chris Forbes
Reviewed-by: Eric Anholt
Reviewed-by: Kenneth Graunke
---
src/glsl/builtin_functions.cpp | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index ef8b7bb..deedddb 100644
--- a/src/glsl
Signed-off-by: Chris Forbes
Reviewed-by: Eric Anholt
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_defines.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index f1ea736..c0caba6 100644
gather4_c's argument layout is straightforward -- refz just goes on the
end.
gather4_po_c's layout however -- the array index is replaced with refz.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 12 ++--
src/mesa/driver
Note that gather4_po_c's parameters are too long for SIMD16. It might be
worth emitting 2xSIMD8 messages in this case at some point.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 15 ---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 +
Adds support for textureGatherOffsets() [which takes an array of texel offsets].
This isn't directly supported on i965, so we lower it to 4x
textureGatherOffset().
V2: - Rebase, etc.
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This is needed for textureGatherOffsets()
Signed-off-by: Chris Forbes
---
src/glsl/builtin_functions.cpp | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index deedddb..1b23677 100644
--- a/src/glsl
Signed-off-by: Chris Forbes
---
src/glsl/builtin_functions.cpp | 30 ++
1 file changed, 30 insertions(+)
diff --git a/src/glsl/builtin_functions.cpp b/src/glsl/builtin_functions.cpp
index 1b23677..45fff4c 100644
--- a/src/glsl/builtin_functions.cpp
+++ b/src/glsl
We don't have a message that does 4 independent offsets; a lowering
pass needs to lower it to 4 normal gather4s before reaching this
point.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 3 +++
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 3 +++
2
Rewrites textureGatherOffsets(s, p, offsets) into
gvec4(
textureGatherOffset(s, p, offsets[0]).w,
textureGatherOffset(s, p, offsets[1]).w,
textureGatherOffset(s, p, offsets[2]).w,
textureGatherOffset(s, p, offsets[3]).w
)
Signed-off-by: Chris Forbes
---
src
This is the fifth (and final) piece of ARB_gpu_shader5 textureGather* support.
It turns out that unnormalized texcoords and texture offsets don't mix.
This series adds yet another lowering pass, so that *sampler2DRect work
with gather.
2-3/3 expand the lowering pass to cover integer coordinates t
to replace
the existing txf coord+offset hacks.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_context.h| 1 +
.../dri/i965/brw_lower_unnormalized_offset.cpp | 84 ++
src/mesa/d
ir_txf expects an ivec* coordinate, and may be larger than ivec2;
shuffle things around so that this will work.
Signed-off-by: Chris Forbes
---
.../dri/i965/brw_lower_unnormalized_offset.cpp | 51 ++
1 file changed, 42 insertions(+), 9 deletions(-)
diff --git a/src/mesa
Just let it be handled by the lowering pass.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 56 ++
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 25 ++--
2 files changed, 16 insertions(+), 65 deletions(-)
diff --git a/src
OK, so this needs to lose the retype() on both sides.
On Tue, Oct 15, 2013 at 6:44 AM, Eric Anholt wrote:
> Chris Forbes writes:
>
>> Previously this was float, which caused the copy from g0 to mangle
>> everything.
>
> If we face a choice of types for a raw mov
Gather unconditionally uses a header, but in some cases the
texture_offset value will be zero.
V2: Don't introduce a bogus conversion.
Signed-off-by: Chris Forbes
Reviewed-by: Eric Anholt
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 14 +++---
1 file changed, 11 inser
Previously one side could be UD while the other was float.
V2: Prefer float; apparently IVB can dispatch float ops faster. (Thanks
Eric)
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src
In Gen4/5 the render target writes lack an extra parameter for "RT0 alpha",
which should be compared to the alpha test value. Instead, each render target
is alpha tested independently, which is not what we want for GL.
This series moves the alpha test into the fragment shader for these gens if
mul
We have to do this in the shader instead, since these gens lack an
independent RT0 alpha value in their render target write messages.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_cc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri
The same setup is required here as when the user-provided shader
explicitly uses KIL or discard.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_wm.c | 12
src/mesa/drivers/dri/i965/brw_wm.h | 2 ++
2 files changed, 14 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c
b/src/mesa/drivers/dri/i965/brw_wm.c
index 0fda490..557ab7a 100644
--- a/src/mesa
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 3 ++
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 54
3 files changed, 58 insertions(+)
diff --git a/src/mesa/drivers/dri/i965
Obvious improvement would be to provide the reference value as a
uniform instead of forcing recompiles, but builtin uniforms are crazy
so I thought I'd get it working first.
-- Chris
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On Tue, Oct 29, 2013 at 10:48 AM, Eric Anholt wrote:
> Chris Forbes writes:
>
>> Signed-off-by: Chris Forbes
>
> This function should probably have a comment:
>
> /**
> * Alpha test support for when we compile it into the shader instead
> * of using the no
Vedran,
Just to add a bit more context -- programming a strange viewport
causes us to turn off guardband clipping. I haven't measured the
impact on dota2, but when it was initially enabled it was a nice win
for some other games.
-- Chris
On Thu, Oct 31, 2013 at 3:38 AM, Chad Versace
wrote:
> On
That is indeed insane :)
Reviewed-by: Chris Forbes
On Thu, Oct 31, 2013 at 12:17 PM, Kenneth Graunke wrote:
> Previously, the write of each 32-bit half might land in separate batch
> buffers, which is insane.
>
> Signed-off-by: Kenneth Graunke
> ---
> src/mes
This series adds support for ARB_[multi_]draw_indirect on IVB and later.
Patches 1-2 are updated versions of Christoph's initial ARB_draw_indirect
patches, adjusted only to resolve rebase issues, etc.
Patches 3-7 are the meat of the implementation; the indirect buffer is
referenced from the batch
From: Christoph Bumiller
Split from patch implementing ARB_draw_indirect.
v2: Const-qualify the struct gl_buffer_object *indirect argument.
v3: Fix up some more draw calls for new argument.
v4: Fix up rebase conflicts in i965.
---
src/mesa/drivers/dri/i965/brw_draw.c | 3 ++-
src/
.
The spec doesn't say anything about them, but all the direct drawing
commands that support instancing do the same.
v3:
Initialize DrawIndirectBuffer with NullBufferObj.
Only hook up the Draw functions in vtxfmt.c if API_OPENGL_CORE
instead of _mesa_is_desktop_gl.
Fix index bounds.
v4: [
first dword of the 3DPRIMITIVE command itself.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_draw.c | 64 ++--
1 file changed, 62 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_context.h | 10 +
src/mesa/drivers/dri/i965/brw_draw_upload.c | 32
src/mesa/drivers/dri/i965/brw_state.h| 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++
4 files changed
---
src/mesa/drivers/dri/i965/brw_draw.c | 2 +-
src/mesa/drivers/dri/i965/brw_draw.h | 3 ++-
src/mesa/drivers/dri/i965/brw_primitive_restart.c | 5 +++--
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/driv
---
src/mesa/drivers/dri/i965/brw_primitive_restart.c | 2 +-
src/mesa/vbo/vbo.h| 3 ++-
src/mesa/vbo/vbo_exec_array.c | 2 +-
src/mesa/vbo/vbo_primitive_restart.c | 3 ++-
4 files changed, 6 insertions(+), 4 deletions(-)
diff --git
- MMIO registers for draw parameters
- New bit in 3DPRIMITIVE command to enable indirection
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/intel_reg.h | 8
2 files changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri
.. and mark them off on the extensions list as done.
V2: Enable only if pipelined register writes work.
Signed-off-by: Chris Forbes
---
docs/GL3.txt | 4 ++--
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
2 files changed, 3 insertions(+), 2 deletions
Signed-off-by: Chris Forbes
---
src/mesa/vbo/vbo_primitive_restart.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/src/mesa/vbo/vbo_primitive_restart.c
b/src/mesa/vbo/vbo_primitive_restart.c
index 48d04e1..ffe0c41 100644
--- a/src/mesa/vbo
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_draw.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index e6c3508..9f8ad45 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
Signed-off-by: Chris Forbes
---
src/mesa/vbo/vbo.h| 3 ++-
src/mesa/vbo/vbo_exec_array.c | 5 +
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mesa/vbo/vbo.h b/src/mesa/vbo/vbo.h
index 113374a..942b34a 100644
--- a/src/mesa/vbo/vbo.h
+++ b/src/mesa/vbo/vbo.h
Is this broken the same way on all of IVB|HSW|BYT?
On Tue, Nov 5, 2013 at 11:24 AM, Paul Berry wrote:
> i965/gen7 hardware doesn't perform alpha blending correctly when
> compressed (CMS) multisampled buffers are in use. Therefore, we need
> to detect when alpha blending is used on a compressed
> So, you can create a GL_LUMINANCE view of a GL_LUMINANCE texture. Hmm...
My understanding is you can't actually, since views can only be
created from immutable-format textures, and GL_LUMINANCE is not a
sized internalformat, so it can't be used with TexStorage?
_
Unfortunate :(
Is the bad behavior from violating this restriction observable?
In any case, Reviewed-by: Chris Forbes
On Wed, Nov 6, 2013 at 7:43 AM, Eric Anholt wrote:
> Paul Berry writes:
>
>> Hardware docs say we can only use SIMD8 dispatch in this condition.
>
> Review
You also need to update teximagemultisample (in teximage.c) which
handles TexStorageMultisample* to do similar things.
-- Chris
On Wed, Nov 6, 2013 at 11:59 AM, Courtney Goeltzenleuchter
wrote:
> TexStorage now updates texture object state needed by
> ARB_texture_view extension.
>
> Set appropri
The only interesting targets in teximagemultisample are
GL_TEXTURE_2D_MULTISAMPLE and GL_TEXTURE_2D_MULTISAMPLE_ARRAY.
On Thu, Nov 7, 2013 at 8:55 AM, Courtney Goeltzenleuchter
wrote:
> TexStorage and TexStorageMultisample updates texture object
> state needed by ARB_texture_view extension.
>
> S
com> wrote:
> Correct and I check_multisample_target checks for that.
> And we never get to this code if using a PROXY target.
> Or did I miss something?
>
>
> On Wed, Nov 6, 2013 at 1:14 PM, Chris Forbes wrote:
>
>> The only interesting targets in teximagemultisample
ement after. Yeah, that could make sense as
>> a helper wouldn't it. I'll look at that.
>>
>>
>> On Wed, Nov 6, 2013 at 1:42 PM, Chris Forbes wrote:
>>
>>> Your change to teximagemultisample just has a bunch of spurious stuff
>>> for other t
Patches 1-4, 6 are:
Reviewed-by: Chris Forbes
With the changes discussed for teximagemultisample and pulling the
view parameter setting out into a helper function, patch 5 is also:
Reviewed-by: Chris Forbes
On Wed, Nov 6, 2013 at 11:59 AM, Courtney Goeltzenleuchter
wrote:
> The follow
I'm hoping I don't need the save_ stuff at all, if I only enable this
in core contexts. Is that OK?
On Thu, Nov 7, 2013 at 1:44 PM, Paul Berry wrote:
> On 4 November 2013 06:57, Brian Paul wrote:
>>
>> On 11/04/2013 02:09 AM, Chris Forbes wrote:
>>
This series adds ARB_draw_indirect and ARB_multi_draw_indirect for i965 Gen7+.
Big changes from V1:
- Split up the old 2/11 into some more sensible pieces
- Discarded all the unused dlist stuff; this was a carryover from when draws
were handled by the vtxfmt vtable rather than in the main dispa
From: Christoph Bumiller
Split from patch implementing ARB_draw_indirect.
v2: Const-qualify the struct gl_buffer_object *indirect argument.
v3: Fix up some more draw calls for new argument.
v4: Fix up rebase conflicts in i965.
---
src/mesa/drivers/dri/i965/brw_draw.c | 3 ++-
src/
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_draw.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
index e6c3508..9f8ad45 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
Signed-off-by: Chris Forbes
---
src/mesa/vbo/vbo.h| 3 ++-
src/mesa/vbo/vbo_exec_array.c | 5 +
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/mesa/vbo/vbo.h b/src/mesa/vbo/vbo.h
index 113374a..942b34a 100644
--- a/src/mesa/vbo/vbo.h
+++ b/src/mesa/vbo/vbo.h
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes
---
src/mesa/vbo/vbo_exec_array.c | 216 ++
1 file changed, 216 insertions(+)
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mes
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes
---
src/mapi/glapi/gen/ARB_draw_indirect.xml | 45
src/mapi/glapi/gen/Makefile.am | 1 +
src/mapi/glapi/gen/gl_API.xml| 4 ++-
src
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes
---
src/mesa/main/bufferobj.c| 14 ++
src/mesa/main/get.c | 4
src/mesa/main/get_hash_params.py | 2 ++
src/mesa/main/mtypes.h | 2
- MMIO registers for draw parameters
- New bit in 3DPRIMITIVE command to enable indirection
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/intel_reg.h | 8
2 files changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_context.h | 10 +
src/mesa/drivers/dri/i965/brw_draw_upload.c | 32
src/mesa/drivers/dri/i965/brw_state.h| 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++
4 files changed
---
src/mesa/drivers/dri/i965/brw_primitive_restart.c | 2 +-
src/mesa/vbo/vbo.h| 3 ++-
src/mesa/vbo/vbo_exec_array.c | 2 +-
src/mesa/vbo/vbo_primitive_restart.c | 3 ++-
4 files changed, 6 insertions(+), 4 deletions(-)
diff --git
V2: Check for mapping failure (thanks Brian)
Signed-off-by: Chris Forbes
---
src/mesa/vbo/vbo_primitive_restart.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/src/mesa/vbo/vbo_primitive_restart.c
b/src/mesa/vbo/vbo_primitive_restart.c
index 48d04e1
---
src/mesa/drivers/dri/i965/brw_draw.c | 2 +-
src/mesa/drivers/dri/i965/brw_draw.h | 3 ++-
src/mesa/drivers/dri/i965/brw_primitive_restart.c | 5 +++--
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/driv
first dword of the 3DPRIMITIVE command itself.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_draw.c | 64 ++--
1 file changed, 62 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c
b/src/mesa/drivers/dri/i965/brw_draw.c
.. and mark them off on the extensions list as done.
V2: Enable only if pipelined register writes work.
V3: Also update relnotes
Signed-off-by: Chris Forbes
Reviewed-by: Ian Romanick
---
docs/GL3.txt | 4 ++--
docs/relnotes/10.0.html | 1
We will reuse the same extension flag for ARB_multi_draw_indirect since
it can always be supported by looping.
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes
---
src/mesa/main/extensions.c | 2 ++
src/mesa/main/get.c| 1 +
Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series.
Signed-off-by: Chris Forbes
---
src/mesa/main/api_validate.c | 163 +++
src/mesa/main/api_validate.h | 26 +++
2 files changed, 189 insertions(+)
diff --git a/src/mesa
Ever since this had appeared as part of GL4.4 I'd been curious
about whether this extension was going to Just Work, or be a
workaround-party like ARB_vertex_type_2_10_10_10_rev.
Today my curiousity got the better of me, and it turns out it
just works.
Tested and enabled on Gen6+ -- theoretically
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