On Wed, Jun 11, 2014 at 7:49 PM, Iago Toral Quiroga wrote:
> @@ -509,6 +509,8 @@ struct ast_type_qualifier {
> /** \name Layout qualifiers for GL_ARB_gpu_shader5 */
> /** \{ */
> unsigned invocations:1;
> + unsigned streamId:1; /* Has streamId value assigned
This would appear to prohibit the use of multiple streams in separable
programs entirely. I don't think that's the right thing.
On Wed, Jun 11, 2014 at 7:49 PM, Iago Toral Quiroga wrote:
> Outputs that are linked to inputs in the next stage must be output to stream
> 0,
> otherwise we should fai
I think you need to set this if *any* geometry shader in the program
tries to use a nonzero stream. Currently it looks like the last shader
wins.
On Wed, Jun 11, 2014 at 7:49 PM, Iago Toral Quiroga wrote:
> On Intel hardware when a geometry shader outputs GL_POINTS primitives we
> only need to em
This is pretty weird.
We should be able to generate a normal builtin function body here
which consists of just the ir_emit_vertex, passing the stream
parameter to it. This would then get inlined like any other function
leaving a bare ir_emit_vertex / ir_end_primitive with a constant
operand. If on
On Wed, Jun 11, 2014 at 7:49 PM, Iago Toral Quiroga wrote:
> ---
> src/mesa/main/context.c | 2 +-
> src/mesa/main/mtypes.h | 1 +
> src/mesa/main/queryobj.c | 1 +
> 3 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
> index 8eb4
On Wed, Jun 11, 2014 at 7:49 PM, Iago Toral Quiroga wrote:
> It should be possible to query the number of primitives written to each
> individual stream by a geometry shader in a single draw call. For that
> we need to have up to MAX_VERTEX_STREAM separate query objects.
> ---
> src/mesa/main/mty
I sent comments on patches 1, 3, 5, 9, 11, 16, 18
Patches 2, 4, 6-8, 10, 12-15, 17 are:
Reviewed-by: Chris Forbes
You should also include a patch to docs/GL3.txt marking off this
subfeature for i965 :)
Do you have a bunch of piglits which exercise all the tricky corners
of this? I see a few
consumer, then input_var must be NULL too, in which case the
> linker_error would never take place.
>
> If input_var is not NULL then there has to be a consumer stage, and in
> that case we should check that we can link both stages, right?
>
> Iago
>
> On Wed, 2014-06-11 at 2
er (as
they are a single qualifier in the spec prior to
ARB_shading_language_420pack)
Signed-off-by: Chris Forbes
---
src/glsl/glsl_parser.yy | 36
1 file changed, 8 insertions(+), 28 deletions(-)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.y
* spec/glsl-1.50/compiler/layout-fs-no-output.frag
* spec/glsl-1.50/compiler/layout-vs-no-input.vert
* spec/glsl-1.50/compiler/layout-vs-no-output.vert
Signed-off-by: Chris Forbes
---
src/glsl/ast_to_hir.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/glsl/ast_to_hir.cpp b
gt; > this->return_deref);
>> > }
>> >
>> > In our case, there is only one instruction here: ir_emit_vertex, and
>> > when cloning it we are also cloning its reference to the stream
>> > variable, but this is *different* from the para
Fixes the piglit test:
spec/glsl-1.50/compiler/interface-blocks-structs-defined-within-block-instanced.vert
Signed-off-by: Chris Forbes
---
src/glsl/ast_to_hir.cpp | 8
1 file changed, 8 insertions(+)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 8facf1b
Ping.
This has been broken for ages, and at least tesseract is carrying
hacks to work around it (extra color buffer containing depth values,
in their g-buffer). Getting rid of that wins us about 15%.
-- Chris
On Sat, Feb 8, 2014 at 3:54 PM, Chris Forbes wrote:
> Previously, we would prog
at 7:04 PM, Iago Toral wrote:
> Hi Chris,
>
> On Sat, 2014-06-14 at 08:34 +1200, Chris Forbes wrote:
>> Right, this happens because ir_emit_vertex doesn't take a proper
>> operand, so it can't keep it alive.
>>
>> What I think you want to do is change the s
Sounds good to me.
On Thu, Jun 19, 2014 at 7:23 PM, Iago Toral wrote:
> On Wed, 2014-06-18 at 13:05 -0700, Ian Romanick wrote:
>> On 06/18/2014 02:51 AM, Iago Toral Quiroga wrote:
>> > On Intel hardware when a geometry shader outputs GL_POINTS primitives we
>> > only need to emit vertex control b
(but maybe in a separate patch)
On Thu, Jun 19, 2014 at 7:53 PM, Chris Forbes wrote:
> Sounds good to me.
>
> On Thu, Jun 19, 2014 at 7:23 PM, Iago Toral wrote:
>> On Wed, 2014-06-18 at 13:05 -0700, Ian Romanick wrote:
>>> On 06/18/2014 02:51 AM, Iago Toral Quiro
This looks like it's adding a pile of uniform scanning overhead even
to draws which don't need the feature. Can we stash the index we need
earlier?
On Sat, Jun 21, 2014 at 1:01 PM, Ian Romanick wrote:
> From: Ian Romanick
>
> Signed-off-by: Ian Romanick
> Cc: "10.2"
> ---
> src/mesa/drivers/d
This will be broken for indirect draws too, and possibly
performance-crippling to fix there, since we don't have the baseVertex
value available to shove into a uniform.
On Sun, Jun 22, 2014 at 3:36 AM, Roland Scheidegger wrote:
> Am 21.06.2014 03:00, schrieb Ian Romanick:
>> This patch series fix
so the system values are kinda
> required there.
>
> Marek
>
> On Sun, Jun 22, 2014 at 12:27 AM, Chris Forbes wrote:
>> This will be broken for indirect draws too, and possibly
>> performance-crippling to fix there, since we don't have the baseVertex
>> value
Reviewed-by: Chris Forbes
Have you got a case where this makes a noticeable difference to performance?
On Mon, Jun 23, 2014 at 5:27 PM, Kenneth Graunke wrote:
> On i965, enabling and disabling the GS is not free: you have to do a
> full pipeline stall, reconfigure the URB and push co
It looks like you can have the SOL stage increment that counter even
when not doing any actual streamout, which should give you the correct
semantics.
See the definition of 3DSTATE_STREAMOUT in the Haswell PRM, Volume 2b. You want:
- dw1.31 SO Function Enable = 1
- dw1.25 SO Statistics Enable = 1
I sent comments on patch 18 - I think it can be made to work correctly
when not doing real SO.
It seems everyone allows EmitStreamVertex(0), so I think you should
follow suit. It would be nice to get the spec clarified to explicitly
allow this.
Patches 11, 12 and 21 are:
Reviewed-by: Chris
than filtered by dw1.27-28 Render Stream Select.
On Tue, Jun 24, 2014 at 9:53 PM, Chris Forbes wrote:
> It looks like you can have the SOL stage increment that counter even
> when not doing any actual streamout, which should give you the correct
> semantics.
>
> See the definition of
As an alternative -- we know if we have this scenario at link time --
could we perhaps just not do anything in EmitStreamVertex if there are
no varyings captured to that stream?
On Thu, Jun 26, 2014 at 10:26 PM, Iago Toral wrote:
> Hello,
>
> while testing various scenarios for multi-stream suppo
od thing to do.
>
> Iago
>
> On Fri, 2014-06-27 at 08:08 +1200, Chris Forbes wrote:
>> As an alternative -- we know if we have this scenario at link time --
>> could we perhaps just not do anything in EmitStreamVertex if there are
>> no varyings captured
If another layout qualifier appeared to the left of `invocations` in the
GS input layout declaration, the invocation count would be dropped on
the floor.
Fixes the piglit test:
spec/ARB_transform_feedback3/arb_transform_feedback3-ext_interleaved_two_bufs_gs_max
Signed-off-by: Chris Forbes
Cc
Reviewed-by: Chris Forbes
On Thu, Jun 26, 2014 at 6:24 PM, Iago Toral Quiroga wrote:
> So far we have been using CL_INVOCATION_COUNT to resolve this query but this
> is no good with streams, as only stream 0 reaches the clipping stage. Instead
> we will use SO_PRIM_STORAGE_NEEDED which
Ilia,
That bikeshed is already done :)
I just send an r-b for v3 of patch 18, which is the last patch that lacked one.
I think this is all good to land now.
-- Chris
On Sat, Jun 28, 2014 at 5:11 AM, Ilia Mirkin wrote:
> Iago,
>
> Not sure where you are with these patches... I guess some updat
Also fixes
spec/ARB_gpu_shader5/execution/invocations-conflicting
Apparently my baseline... wasnt.
On Sat, Jun 28, 2014 at 11:18 AM, Ilia Mirkin wrote:
> On Fri, Jun 27, 2014 at 5:21 AM, Chris Forbes wrote:
>> If another layout qualifier appeared to the left of `invocations` in
On Sat, Jun 28, 2014 at 10:19 AM, Jason Ekstrand wrote:
> @@ -653,135 +613,6 @@ _swrast_texture_span( struct gl_context *ctx, SWspan
> *span )
[snip]
> -
> - /*
> -* Must do all texture sampling before combining in order to
> -* accomodate GL_ARB_texture_env_crossbar.
> -*/
> -
On Tue, Jul 1, 2014 at 9:40 AM, Matt Turner wrote:
>
> /** Fixed brw_reg. */
> @@ -452,7 +452,7 @@ fs_reg::equals(const fs_reg &r) const
> memcmp(&fixed_hw_reg, &r.fixed_hw_reg,
>sizeof(fixed_hw_reg)) == 0 &&
> stride == r.stride &&
> - imm.u
Assuming this causes no piglit regressions,
Reviewed-by: Chris Forbes
Can we get some piglits which demonstrate these problems? oglconform
is too secret.
On Wed, Jul 2, 2014 at 10:54 PM, Popov, Pavel E wrote:
> Hi Chris,
>
> Could you review this patch?
>
> Probably a better s
These were looking in the wrong field.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index cd5bc9f..3f00e4d 100644
- Don't try to disassemble send's src1 as a descriptor if it's not an
immediate.
- In the same case, show src1 as an operand (makes it easier to see
bogus register regions, etc -- the hardware is very fussy)
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw
We'd otherwise go looking into virtual_grf_sizes for things that aren't
in there at all.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_vec4.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
b/src/mesa/d
I think you want to move the memset after the !annotation->ann bail
out. Currently, if that allocation were to fail (and we care enough to
check...) , you'll segfault.
On Wed, Jul 9, 2014 at 3:44 PM, Matt Turner wrote:
> Otherwise we'd compare uninitialized pointers with NULL and dereference,
> l
After a bunch of experiments with lowering schemes, I've come full circle, back
to pretty much the same design as the RFC patches sent out some time ago.
This series adds support for the ir_*_interpolate_at_* expression types in the
i965 driver. The corresponding glsl parts have already landed.
The backend will have to do a message send, so we want to keep these in
one piece, just like texture ops.
Signed-off-by: Chris Forbes
---
.../dri/i965/brw_fs_channel_expressions.cpp| 25 ++
1 file changed, 25 insertions(+)
diff --git a/src/mesa/drivers/dri/i965
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_eu.h | 10
src/mesa/drivers/dri/i965/brw_eu_emit.c | 43 +
2 files changed, 53 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index
These got lost in the big brw_inst shakeup.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_defines.h | 5 +
src/mesa/drivers/dri/i965/brw_inst.h| 11 +++
2 files changed, 16 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers
SIMD8-only for now.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 135 ++-
2 files changed, 134 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src
V3: Rework for brw_inst changes
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_disasm.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index f37da19..d7362c1 100644
--- a/src
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_defines.h| 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 2 ++
src/mesa/drivers/dri/i965/brw_fs.h | 4
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 19 +++
src/mesa/drivers/dri
Yeah, I can inline brw_set_pixel_interpolator_query_message into its one caller.
On Sat, Jul 12, 2014 at 6:56 PM, Kenneth Graunke wrote:
> On Saturday, July 12, 2014 03:20:12 PM Chris Forbes wrote:
>> Signed-off-by: Chris Forbes
>> ---
>> src/mesa/drivers/dri/i9
Signed-off-by: Chris Forbes
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_eu.h | 10 ++
src/mesa/drivers/dri/i965/brw_eu_emit.c | 28
2 files changed, 38 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers
The backend will have to do a message send, so we want to keep these in
one piece, just like texture ops.
Signed-off-by: Chris Forbes
Reviewed-by: Kenneth Graunke
---
.../dri/i965/brw_fs_channel_expressions.cpp| 25 ++
1 file changed, 25 insertions(+)
diff --git a
V5: - Split into separate opcodes
- Pass message data in src1 immediate
- Put noperspective bit in fs_inst rather than adding any junk to
backend_instruction
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_defines.h| 4 +++
src/mesa/drivers/dri/i965
V3: Rework for brw_inst changes
Signed-off-by: Chris Forbes
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_disasm.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index
These got lost in the big brw_inst shakeup.
Signed-off-by: Chris Forbes
Reviewed-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_defines.h | 5 +
src/mesa/drivers/dri/i965/brw_inst.h| 11 +++
2 files changed, 16 insertions(+)
diff --git a/src/mesa/drivers/dri/i965
Here's a new version of the series incorporating the review feedback from
earlier today.
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SIMD8-only for now.
V5: - Fix style complaints
- Move prototype to be with other oddball emit functions
- Use unreachable() instead of assert() where possible
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +
src/mesa/drivers/dri/i965
Signed-off-by: Chris Forbes
---
src/glsl/lower_ubo_reference.cpp | 50
1 file changed, 30 insertions(+), 20 deletions(-)
diff --git a/src/glsl/lower_ubo_reference.cpp b/src/glsl/lower_ubo_reference.cpp
index c49ae34..80edd93 100644
--- a/src/glsl
Previously this was a block index with special semantics for -1.
With ARB_gpu_shader5, this need not be a compile-time constant, so
allow any rvalue here and convert the -1 to a NULL pointer.
Signed-off-by: Chris Forbes
---
src/glsl/lower_ubo_reference.cpp | 15 ---
1 file changed
This series adds various relaxations and extra plumbing to allow indexing
arrays of uniform blocks with dynamically uniform expressions rather than
only constant expressions.
Covers only the GLSL part -- there are still a few loose ends in the
corresponding i965 patches, so I'll send that support
Without doing a lot more work, we have no idea which indices may
be used at runtime, so just mark them all.
Signed-off-by: Chris Forbes
---
src/glsl/link_uniform_block_active_visitor.cpp | 51 --
1 file changed, 32 insertions(+), 19 deletions(-)
diff --git a/src/glsl
Instead of falling back to just the block name (which we won't find),
look for the first element of the block array. We'll deal with the rest
in the backend by arranging for the blocks to be laid out contiguously.
Signed-off-by: Chris Forbes
---
src/glsl/lower_ubo_referenc
Signed-off-by: Chris Forbes
---
src/glsl/ast_array_index.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/glsl/ast_array_index.cpp b/src/glsl/ast_array_index.cpp
index f3b060e..50f9987 100644
--- a/src/glsl/ast_array_index.cpp
+++ b/src/glsl/ast_array_index.cpp
Signed-off-by: Chris Forbes
---
src/glsl/ir_validate.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
index 42142da..74ae318 100644
--- a/src/glsl/ir_validate.cpp
+++ b/src/glsl/ir_validate.cpp
@@ -495,7 +495,6 @@ ir_validate::visit_leave
Accidentally replied privately only, sorry.
-- Forwarded message --
From: Chris Forbes
Date: Tue, Jul 15, 2014 at 10:27 PM
Subject: Re: [Mesa-dev] [PATCH 2/6] glsl: Mark entire UBO array active
if indexed with non-constant.
To: Ilia Mirkin
On Tue, Jul 15, 2014 at 10:20 PM
Indeed, will fix.
On Tue, Jul 15, 2014 at 10:24 PM, Ilia Mirkin wrote:
> On Sat, Jul 12, 2014 at 9:51 PM, Chris Forbes wrote:
>> Previously this was a block index with special semantics for -1.
>> With ARB_gpu_shader5, this need not be a compile-time constant, so
>> allo
Oh dear. This hunk should have been squashed together with the change
to it later. By itself, it doesn't get us anywhere.
On Tue, Jul 15, 2014 at 10:26 PM, Ilia Mirkin wrote:
> On Sat, Jul 12, 2014 at 9:51 PM, Chris Forbes wrote:
>> Instead of falling back to just the block name (
It's still "started" though -- there's a partial implementation in master.
On Wed, Jul 23, 2014 at 10:30 AM, Dave Airlie wrote:
> It appears Paul isn't working on this.
>
> Signed-off-by: Dave Airlie
> ---
> docs/GL3.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/d
These are
Reviewed-by: Chris Forbes
On Fri, Jul 25, 2014 at 11:04 AM, Jordan Justen wrote:
> On Thu, Jul 24, 2014 at 3:56 PM, Ilia Mirkin wrote:
>> On Thu, Jul 24, 2014 at 6:44 PM, Jordan Justen
>> wrote:
>>> This fixes piglit's arb_compute_shader-minmax test.
Glad to see this madness disappear :)
Reviewed-by: Chris Forbes
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branches.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index fc7ae58..15d1c6a 100644
--- a/src/mesa/drivers/dri/i965
This series adds support for GLSL 1.30 / EXT_gpu_shader4's 'flat' and
'noperspective' varying interpolation qualifiers on Gen4/5.
Based on Olivier Galibert's series from July 2012, with some simplifications
(that series contained a number of fixes for other bugs which have been
addressed in master
The program keys are updated accordingly, but the values are not used
yet.
[V1-2]: Signed-off-by: Olivier Galibert
V3: Updated for vue_map changes, intel -> brw merge, etc. (Chris Forbes)
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_clip.c|
/archives/mesa-dev/2012-July/024335.html
- http://lists.freedesktop.org/archives/mesa-dev/2012-July/024339.html
With this patch, all the GLSL 1.3 interpolation tests that do not clip
(spec/glsl-1.30/execution/interpolation/*-none.shader_test) pass.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri
[V1-2]: Signed-off-by: Olivier Galibert
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_clip.c | 13 +--
src/mesa/drivers/dri/i965/brw_clip.h | 6 ++--
src/mesa/drivers/dri/i965/brw_clip_line.c | 6 ++--
src/mesa/drivers/dri/i965/brw_clip_tri.c
d-off-by: Olivier Galibert
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_clip.c | 8 ++
src/mesa/drivers/dri/i965/brw_clip.h | 1 +
src/mesa/drivers/dri/i965/brw_clip_util.c | 120 +++---
3 files changed, 119 insertions(+), 10 deletions(-)
This patch ensures that integers will pass through unscathed. Doing
(useless) computations on them is risky, especially when their bit
patterns correspond to values like inf or nan.
[V1-2]: Signed-off-by: Olivier Galibert
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965
There's no reason to restrict to 6 planes on CTG and ILK -- no bugs to
work around which require the top clip flag.
This is another tiny step toward GLSL 1.30 support.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_clip_tri.c | 4 ++--
src/mesa/drivers/dri/i965/brw_cont
Hmmn, that #define does need to change -- the worst-case does get
slightly worse.
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Does indeed fix 65236 -- will put the bugzilla reference in the commit.
-- Chris
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+ for (i=0; i < c->vue_map.num_slots; i++) {
+ if (c->key.interpolation_mode[i] == INTERP_QUALIFIER_FLAT) {
+ printf("flatshaded: %d @ %d\n", i,
+ brw_vue_slot_to_offset(i));
Oops, that wasn't supposed to still be in there!
_
For the series:
Reviewed-by: Chris Forbes
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Signed-off-by: Chris Forbes
---
docs/GL3.txt | 14 ++
1 file changed, 14 insertions(+)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index f2152a3..64986ea 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -156,5 +156,19 @@ ARB_texture_view not
started
The program keys are updated accordingly, but the values are not used
yet.
[V1-2]: Signed-off-by: Olivier Galibert
V3: Updated for vue_map changes, intel -> brw merge, etc. (Chris Forbes)
V4: Compute interpolation map as a new state atom rather than tacking it
on the front of the clip se
candidate for stable branches.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 3eb43a8..1d86b33 100644
reserved in any earlier spec, so you want
KEYWORD_WITH_ALT(400, 0, 400, 0, yyextra->
With that fixed,
Reviewed-by: Chris Forbes
-- Chris
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What are other implementations doing?
IIRC, GL3-class NV hardware passes the current piglit tests.
On Sat, Jul 27, 2013 at 9:20 AM, Kenneth Graunke wrote:
> Hello all,
>
> I've been looking at https://bugs.freedesktop.org/show_bug.cgi?id=59150 and
> could use your opinion.
>
> OpenGL defines two
+ if (att->Zoffset > texImage->Depth)
Shouldn't this be >=, same as in your later array patch?
-- Chris
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Fixes broken filter and lod selection for vertex texturing.
(txs/txf only worked properly because they ignore the sampler state
completely)
Signed-off-by: Chris Forbes
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/drivers/dri/i965/brw_vs_state.c | 27 +--
1 file
CTG is still broken even with this patch -- but ILK is fixed.
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This was never visible before due to the bogus sampler state pointer.
Fixes remaining vertex texturing breakage on Gen4.
Signed-off-by: Chris Forbes
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion
On Wed, Jul 31, 2013 at 8:53 AM, Paul Berry wrote:
>Can you point me to some VS code that does this? I thought that if the VS
>wrote only to gl_BackColor, then the VUE map would only contain a slot for
>gl_BackColor.
The VS now does this:
diff --git a/src/mesa/drivers/dri/i965/
brw_vs.c b/src
> It seems a shame to lose this optimization. Can we move the call to
> count_flatshaded_attributes() up to the declaration of nr, and then we can
> keep this?
This function isn't even called if there is no flat-shading to do.
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Oops, yes.
On Wed, Jul 31, 2013 at 9:45 AM, Paul Berry wrote:
> On 14 July 2013 02:39, Chris Forbes wrote:
>>
>> This patch ensures that integers will pass through unscathed. Doing
>> (useless) computations on them is risky, especially when their bit
>> patterns co
I like that. It also provides a sensible type to pass to the new `is
there any flat shading?` helper.
On Wed, Jul 31, 2013 at 9:52 AM, Paul Berry wrote:
> On 23 July 2013 01:16, Chris Forbes wrote:
>>
>> The program keys are updated accordingly, but the values are not used
>
the program keys for the clip and SF stages, but it is not
actually used yet.
[V1-2]: Signed-off-by: Olivier Galibert
V3: Updated for vue_map changes, intel -> brw merge, etc. (Chris Forbes)
V4: Compute interpolation map as a new state atom rather than tacking it
on the front of the clip se
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_context.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 7b5fd13..9580f29 100644
--- a/src/mesa/drivers/dri/i965
brw_sf_compile.has_flat_shading; drop
vestigial hunks.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_fs.cpp| 2 +-
src/mesa/drivers/dri/i965/brw_sf.c | 2 +-
src/mesa/drivers/dri/i965/brw_sf.h | 2 +-
src/mesa/drivers/dri/i965/brw_sf_emit.c | 149 ++--
4
Move key.do_flat_shading to brw_clip_compile.has_flat_shading
[V1-2]: Signed-off-by: Olivier Galibert
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_clip.c | 5 ++-
src/mesa/drivers/dri/i965/brw_clip.h | 7 ++--
src/mesa/drivers/dri/i965/brw_clip_line.c
: Add brw_clip_compile.has_noperspective_shading rather than another
key flag.
[V1-2]: Signed-off-by: Olivier Galibert
Signed-off-by: Chris Forbes
Acked-by: Paul Berry
---
src/mesa/drivers/dri/i965/brw_clip.c | 2 +
src/mesa/drivers/dri/i965/brw_clip.h | 1 +
src/mesa/drivers/dri
This patch ensures that integers will pass through unscathed. Doing
(useless) computations on them is risky, especially when their bit
patterns correspond to values like inf or nan.
[V1-2]: Signed-off-by: Olivier Galibert
Signed-off-by: Chris Forbes
Reviewed-by: Paul Berry
---
src/mesa
> Your comment here stops mid-sentence.
It looks that way, but it's actually complete. I'll reword it so that
it doesn't look wrong at a first glance though :)
> bools
Bad C89 habit... will fix those up :)
-- Chris
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INTEL_DEBUG=vue now emits a listing of each slot in the VUE map,
and the corresponding interpolation mode.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_interpolation_map.c | 28 +++
src/mesa/drivers/dri/i965/intel_context.c | 1 +
src/mesa/drivers
Makes this flag appear in the output for INTEL_DEBUG=state
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_state_upload.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index e3ef245
This series adds support for GLSL-1.30-style clipping using gl_ClipDistance on
Gen4/5.
All of the interpolation piglits now pass, but there are still a couple of
things I need to do:
* Get rid of clip plane compaction
* Add similar support for clipping lines
There's no need to use a clip flag for NEGW on these gens, so
no reason we can't just enable 8 planes.
V2: Bump (and document!) MAX_VERTS in the clip code.
Signed-off-by: Chris Forbes
---
src/mesa/drivers/dri/i965/brw_clip.h | 6 +-
src/mesa/drivers/dri/i965/brw_clip
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