On Friday, September 16, 2016 11:10:01 AM PDT Timothy Arceri wrote:
> On Thu, 2016-09-15 at 17:55 -0700, Jason Ekstrand wrote:
> > > On Sep 15, 2016 4:31 PM, "Timothy Arceri"
> > > wrote:
> > > On Thu, 2016-09-15 at 12:34 -0700, Jason Ekstrand wrote:
> > > > > On Sep 15, 2016 12:05 AM, "Timothy A
Fixes ESEXT-CTS.draw_elements_base_vertex_tests.AEP_shader_stages and
ESEXT-CTS.texture_cube_map_array.texture_size_tesselation_con_sh.
Signed-off-by: Kenneth Graunke
---
src/compiler/glsl/ast_to_hir.cpp | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff
0);
> + size_t word_count = len / 4;
> +
> + const void *map = mmap(NULL, len, PROT_READ, MAP_PRIVATE, fd, 0);
> + assert(map != NULL);
> +
> + nir_function *func = spirv_to_nir(map, word_count, NULL, 0,
> + MESA_SHADER_FRAGMENT, &q
erhaps add:
/* __after must be a valid list node (not the tail sentinel) */
(if after is the tail sentinel, __node will be NULL, and then trying to
obtain (__node)->__field.next will dereference that NULL pointer.)
Either way, patch 1 is
Reviewed-by: Kenneth Graunke
(I haven
13992a..5cc6a34 100644
> --- a/src/compiler/glsl/ir_hv_accept.cpp
> +++ b/src/compiler/glsl/ir_hv_accept.cpp
> @@ -147,7 +147,7 @@ ir_expression::accept(ir_hierarchical_visitor *v)
>goto done;
>
>case visit_stop:
> - return s;
> + return visit_stop;
> }
ummy_true
> , GLL, x , x , x , 2003)
> EXT(ARB_shading_language_420pack, ARB_shading_language_420pack
> , GLL, GLC, x , x , 2011)
> EXT(ARB_shading_language_packing, ARB_shading_language_packing
> , GLL,
"intelScreen" is wordy and also doesn't fit our style guidelines.
"screen" is shorter, which is nice, because we use it fairly often.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_blorp.c| 2 +-
src/mesa/drivers/dri/i965/brw_clip.c
inter to Screen Private?).
The last one is particularly confusing because we use "psp" to refer to
the Gen4 PIPELINED_STATE_POINTERS packet as well.
Let's be consistent. "dri_screen" is clear, and it's not used often
enough that I'm worried about the verbosity.
> support in tessellation evaluation shaders, and since I don't have any
> hardware to test it on, I've left that for someone else to wire up.
>
> Signed-off-by: Dylan Baker
> Reviewed-by: Ilia Mirkin
> Reviewed-by: Kenneth Graunke
> ---
>
> v2: - changed messa
On Tuesday, September 20, 2016 3:59:27 PM PDT Sirisha Gandikota wrote:
> From: Sirisha Gandikota
>
> The first version of aubinator did not take into account the fields
> spanning across 2 DWords. Hence fields like 64bit address/offset and
> int were not decoded correctly. This patch should fix t
and some places use brw->* (the updated copy)
and others use devinfo->* (the static const copy)...and they're not
the same. Just mutating gen_device_info would fix this, by having
only one copy for everybody.
Anyway, I think we could do that as a later cleanup if you like.
Thanks
It's already advertised because the version.c extension checks are
fulfilled, but we didn't actually claim support, so trying to create
a ES 3.2 context would fail.
It's all done, and the CTS results look good, so let's turn it on.
Signed-off-by: Kenneth Graunke
---
src/m
Commit 5921f372c89a68fac6ddefc009442721d9df4db2 exposed GLES 3.1 symbols
in libGLESv2.so. Are we supposed to do the same thing for GLES 3.2?
I imagine we're supposed to, but I'm not certain what spec actually
defines the ABI or where to look.
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Hello,
This series reworks the GLSL compiler to inline built-in functions
immediately, at compile time, rather than importing prototypes and
linking against an extra shader later on.
Without this, compile time optimizations are nearly useless. For example,
trying to use a dot product would gener
ne about it. A change like this significantly
alters the order in which optimizations are performed.
Signed-off-by: Kenneth Graunke
---
src/compiler/glsl/ast_function.cpp | 46 ++
1 file changed, 22 insertions(+), 24 deletions(-)
diff --git a/src/compiler/glsl/a
r than as an IR pass)
allows us to emit an error message with proper line numbers.
(Otherwise, I would have preferred the IR pass...)
Fixes spec/arb_tessellation_shader/compiler/barrier-switch-always.tesc.
Signed-off-by: Kenneth Graunke
---
src/compiler/glsl/ast_function.cpp | 19
sr
Now that we generate built-in functions inline, there's no need to link
against the built-in shader, and no built-in prototypes to consider.
This lets us delete a bunch of code.
Signed-off-by: Kenneth Graunke
---
src/compiler/glsl/link_functions.cpp | 32 +++
This is now handled directly by ast_function.cpp.
Signed-off-by: Kenneth Graunke
---
src/compiler/glsl/builtin_functions.cpp | 30 --
1 file changed, 4 insertions(+), 26 deletions(-)
diff --git a/src/compiler/glsl/builtin_functions.cpp
b/src/compiler/glsl
Hi Ian,
I just sent out a four patch series that I think will accomplish a lot
of what you were trying to do with the "do post-link optimizations, but
only for built-ins" patches. But it deletes code.
https://lists.freedesktop.org/archives/mesa-dev/2016-September/129437.html
I'd been playing wi
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/gen6_clip_state.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c
b/src/mesa/drivers/dri/i965/gen6_clip_state.c
index 7dc9740..c414a0f 100644
CACHE_NEW_CS_PROG hasn't existed in quite a long time...the old
comment was there, but not the actual bit.
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/gen7_cs_state.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
3DSTATE_PS doesn't need this. 3DSTATE_PS_EXTRA however does,
for brw_color_buffer_write_enabled().
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/gen8_ps_state.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965
There's an assert right above this.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 1483f41..dc000d9 100644
Needed for user clip plane enables. Brkoen since this code was
introduced.
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/gen8_ds_state.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
commit e07457d0aec96970a39a2dd1cb4e46da6107eb77 removed the last use
of ctx->Transform on Gen6. It looks like Gen7 never needed this, but
I copied it over when I originally ported the driver to Ivybridge.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/gen6_vs_state.c | 3 +--
On Thursday, September 22, 2016 1:54:44 PM PDT Ian Romanick wrote:
> On 09/21/2016 10:20 PM, Kenneth Graunke wrote:
> > In the past, we imported the prototypes of built-in functions, generated
> > calls to those, and waited until link time to resolve the calls and
> > impor
it just make
> gen_get_device_info() fill a structure rather than returning a const
> pointer.
>
> Cc: Kenneth Graunke
> Signed-off-by: Lionel Landwerlin
Thank you, thank you! This is so much nicer! I've wanted to get rid of
all the duplicate URB fields and thread counts for ages.
On Sunday, September 25, 2016 7:42:16 PM PDT Nayan Deshmukh wrote:
> CovID: 1373370
>
> Signed-off-by: Nayan Deshmukh
> ---
> src/intel/tools/disasm.c | 6 --
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/src/intel/tools/disasm.c b/src/intel/tools/disasm.c
> index e5276
On Saturday, September 24, 2016 3:24:48 PM PDT Timothy Arceri wrote:
> From: Carl Worth
>
> This will be used by the on disk shader cache.
>
> Signed-off-by: Timothy Arceri
> ---
> src/mesa/drivers/dri/i965/brw_compiler.h | 4
> src/mesa/drivers/dri/i965/brw_vs.c | 2 ++
> src/mesa/
_slots |=
> -brw->tess_ctrl_program->Base.PatchOutputsWritten;
> - }
Kind of sad to see this logic replicated in both key functions,
but oh well. This patch is:
Reviewed-by: Kenneth Graunke
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__
struct brw_gs_prog_key *key);
> +
> bool
> brw_codegen_gs_prog(struct brw_context *brw,
> struct gl_shader_program *prog,
>
Reviewed-by: Kenneth Graunke
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t brw_vs_prog_key *key)
> {
> struct gl_context *ctx = &brw->ctx;
> - /* BRW_NEW_VERTEX_PROGRAM */
Please leave this line there.
Reviewed-by: Kenneth Graunke
> struct brw_vertex_program *vp =
>(struct brw_vertex_program *)brw->vertex_program;
> struc
if (sh->ir) {
> + _mesa_print_ir(_mesa_get_log_file(), sh->ir, NULL);
> +} else {
> + _mesa_log("No IR to print shader may be from cache\n");
> +}
> _mesa_log("\n\n");
> } else {
> _mesa_
t != limit);
> + const_count++;
Obviously, we're not likely to hit 4294967295 constant arrays in a
single shader, but it's really easy to degrade gracefully - just don't
promote this to a uniform.
if (const_count == ~0)
return;
char *uniform_name = ralloc_asprintf(mem_c
On Saturday, September 24, 2016 3:24:53 PM PDT Timothy Arceri wrote:
> This uses the recently-added cache.c to write out the final linked
> binary for vertex and fragment shader programs.
>
> This is based off the initial implementation done by Carl.
> ---
> src/mesa/drivers/dri/i965/Makefile.sou
On Saturday, September 24, 2016 3:26:09 PM PDT Timothy Arceri wrote:
> Pointers will have different lengths so we simple create a different
> sha1 for each platform.
I don't understand...you're putting pointers in the blob? How can that
work? You obviously can't reload things from the cache as a
On Monday, September 26, 2016 1:28:35 PM PDT Timothy Arceri wrote:
> On Sun, 2016-09-25 at 19:43 -0700, Kenneth Graunke wrote:
> > On Saturday, September 24, 2016 3:24:53 PM PDT Timothy Arceri wrote:
> > >
> > > This uses the recently-added cache.c to write out the fi
CPU overhead of scissor and
viewport state changes n Glamor from 2.5% or so to .8% or so.
Cc: Eric Anholt
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_cc.c | 10 +++---
src/mesa/drivers/dri/i965/brw_context.c | 1 +
src/mesa/drivers/dri/i
@ link_assign_uniform_locations(struct gl_shader_program
> *prog,
>}
> }
>
> - const unsigned num_uniforms = uniform_size.num_active_uniforms;
> + prog->NumUniformStorage = uniform_size.num_active_uniforms;
You can delete the earlier prog->NumUniformStorage = 0 if you li
On Wednesday, September 28, 2016 9:00:50 AM PDT Eric Anholt wrote:
> Timothy Arceri writes:
>
> > On Sun, 2016-09-25 at 19:51 -0700, Kenneth Graunke wrote:
> >> On Saturday, September 24, 2016 3:26:09 PM PDT Timothy Arceri wrote:
> >> >
> >> > Poin
On Saturday, October 1, 2016 9:46:45 PM PDT Marek Olšák wrote:
> Hi,
>
> I propose that we use versioning in the form of "year.quarter".
>
> 2017 would start with 17.0, then 17.1, 17.2, 17.3 for following
> quarters of the year, respectively.
> 2018 would start with 18.0, then 18.1, 18.2, 18.3.
>
On Friday, September 30, 2016 3:33:12 PM PDT Anuj Phogat wrote:
> Signed-off-by: Anuj Phogat
> ---
> src/intel/vulkan/gen8_pipeline.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/src/intel/vulkan/gen8_pipeline.c
> b/src/intel/vulkan/gen8_pipeline.c
> index 1abb97c.
ebc3a..8e18007 100644
> --- a/src/intel/genxml/gen75.xml
> +++ b/src/intel/genxml/gen75.xml
> @@ -1571,7 +1571,7 @@
>
>
>
> -
> +
>
>
>
>
Patches 1-3 are:
Reviewed-by: Kenneth Graunke
signature
Just say no to:
- brw->gs.base.prog_data = &brw->gs.prog_data->base.base;
We'll just use the brw_stage_prog_data pointer in brw_stage_state
and downcast it to brw_gs_prog_data as needed.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_context.h
Just say no to:
- brw->wm.base.prog_data = &brw->wm.prog_data->base.base;
We'll just use the brw_stage_prog_data pointer in brw_stage_state
and downcast it to brw_wm_prog_data as needed.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_context.h
Just say no to:
- brw->tcs.base.prog_data = &brw->tcs.prog_data->base.base;
We'll just use the brw_stage_prog_data pointer in brw_stage_state
and downcast it to brw_tcs_prog_data as needed.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_context.h
Just say no to:
- brw->tes.base.prog_data = &brw->tes.prog_data->base.base;
We'll just use the brw_stage_prog_data pointer in brw_stage_state
and downcast it to brw_tes_prog_data as needed.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_context.h
Just say no to:
- brw->cs.base.prog_data = &brw->cs.prog_data->base.base;
We'll just use the brw_stage_prog_data pointer in brw_stage_state
and downcast it to brw_cs_prog_data as needed.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_compute.c
Just say no to:
- brw->vs.base.prog_data = &brw->vs.prog_data->base.base;
We'll just use the brw_stage_prog_data pointer in brw_stage_state
and downcast it to brw_vs_prog_data as needed.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_context.h
Similar to brw_context(...), intel_texture_object(...), and so on.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_compiler.h | 17 ++
src/mesa/drivers/dri/i965/brw_fs.cpp | 43 --
src/mesa/drivers/dri/i965/brw_fs_builder.h
.
Setting the "Use the 3DSTATE_CLIP bitmask" force enable bit allows
us to drop _NEW_TRANSFORM from all the shader stage atoms, so we can
re-emit them less often.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_defines.h | 1 +
src/mesa/drivers/dri/i965/gen6_clip_s
We need to free prog_data for TCS/TES too.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_state_cache.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c
b/src/mesa/drivers/dri/i965/brw_state_cache.c
index 0e98e65..43b0a20
Sandybridge still uploads the push constants from these atoms, and those
live in the batch buffer, so they must be re-uploaded on every batch.
I don't see any reason for the Gen7+ atoms to listen to BRW_NEW_BATCH.
My guess is I just copy and pasted it a long time ago.
Signed-off-by: Ke
On Monday, October 3, 2016 10:39:28 AM PDT Timothy Arceri wrote:
> Using consistent naming allows us to create macros more easily.
I suppose it would :)
Both are
Reviewed-by: Kenneth Graunke
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On Tuesday, September 27, 2016 11:51:20 PM PDT Chad Versace wrote:
> Cacheing the signal status complicates the code for questionable
> performance benefit. I added the cacheing long ago, and I now think it
> was the wrong decision.
>
> When we later add support for fences based on sync fds (that
n't read any of these, but assuming they just fix
whitespace issues, the series is
Acked-by: Kenneth Graunke
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On Thursday, September 8, 2016 10:33:06 PM PDT Francisco Jerez wrote:
[snip]
> Heh, right, my concern was that this smells strongly like a test relying
> on not terribly well-defined behavior... AFAICT the problem addressed
> here is ultimately caused by the discontinuity that the COLORBURN
> blen
sy way to
> temporarily tag a particular location in a NIR shader.
>
> Signed-off-by: Jason Ekstrand
> ---
> src/compiler/nir/nir_intrinsics.h | 3 +++
> 1 file changed, 3 insertions(+)
These two are:
Reviewed-by: Kenneth Graunke
I understand that Connor may not be a fan
fer_texture2d
References: https://gitlab.khronos.org/opengl/cts/merge_requests/387
Signed-off-by: Kenneth Graunke
---
src/mesa/main/fbobject.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index f8899e6..3b55e79 1
Having one top-level switch statement covering all known texture targets
will make the next change easier to implement.
Signed-off-by: Kenneth Graunke
---
src/mesa/main/fbobject.c | 80 ++--
1 file changed, 37 insertions(+), 43 deletions(-)
diff
scroll sideways.)
Then, for a new blue bar hack, we can use a printf specifier to pad
the command packet names to be 80 characters long (arbitrarily), which
extends them "far enough" to look good, and doesn't require us to use
ioctls to determine the terminal width.
Signed-off-by: Ken
push constant atom
emits 3DSTATE_CONSTANT_VS directly, and the gen7_vs_state atom that
emits 3DSTATE_VS doesn't have a dependency on ctx->Transform.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/gen7_vs_state.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Whoops
On Tuesday, October 4, 2016 9:26:39 AM PDT Ben Widawsky wrote:
> On 16-10-04 15:38:52, Lionel Landwerlin wrote:
> >Embed the xml files into the binary, so aubinator can be used from any
> >location.
> >
> >Signed-off-by: Lionel Landwerlin
> >Cc: Sirisha Gandikota
> >---
> > src/intel/Makefile.am
Fixes more warnings in 32-bit builds.
Signed-off-by: Kenneth Graunke
---
src/intel/tools/aubinator.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 9b32e5b..27d7647 100644
--- a/src/intel/tools/aubinator.c
e and beyond printing
type->name, and glsl_print_struct() wasn't used at all. So, drop them.
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_print.c | 14 ++
src/compiler/nir_types.cpp | 30 --
src/compiler/nir_types.h | 3 +--
3 file
| 90
> --
> 4 files changed, 54 insertions(+), 44 deletions(-)
> rename src/mesa/drivers/dri/i965/{intel_syncobj.c => brw_sync.c} (73%)
>
>
Series is:
Reviewed-by: Kenneth Graunke
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ch to delete them.
Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=15465#c7
Signed-off-by: Kenneth Graunke
---
src/compiler/glsl/ast_to_hir.cpp | 12
1 file changed, 4 insertions(+), 8 deletions(-)
See also:
https://lists.freedesktop.org/archives/piglit/2016-October/020959
ons(+), 9 deletions(-)
Series is:
Reviewed-by: Kenneth Graunke
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in CI.
>
> v2 (idr): Formatting / whitespace fixes. Embed the acp_ref in the
> acp_entry.
>
> v3 (idr): Delete unused copy constructor. Use while(pop_head) instead
> of foreach() { remove }.
>
> Signed-off-by: Tapani Pälli
> Signed-off-by: Ian Romanick
This patch i
/,
>.maxCullDistances = 0 /* FIXME */,
>.maxCombinedClipAndCullDistances = 0 /* FIXME */,
>
Yep, definitely supposed to be nanoseconds. Thanks for the fix!
Reviewed-by: Kenneth Graunke
and pushed:
To ssh://git.freedesktop.org/git/mesa/mesa
88428fb..0408d50 master -&
On Friday, October 7, 2016 8:52:18 AM PDT Tapani Pälli wrote:
> Fixes following dEQP tests:
>
>
> dEQP-GLES31.functional.debug.negative_coverage.callbacks.atomic_counter.atomic_precision
>
> dEQP-GLES31.functional.debug.negative_coverage.get_error.atomic_counter.atomic_precision
>
> dE
7;s
reasonable to enforce it all the time.
If you drop the _mesa_is_gles(ctx), this would get a:
Reviewed-by: Kenneth Graunke
> + _mesa_error(ctx, GL_INVALID_VALUE, "glGetSynciv(pname=0x%x)\n", pname);
> + }
> +
> if (size > 0 && bufSiz
On Friday, October 7, 2016 11:05:30 AM PDT Tapani Pälli wrote:
>
> On 10/07/2016 10:46 AM, Kenneth Graunke wrote:
> > On Friday, October 7, 2016 8:52:18 AM PDT Tapani Pälli wrote:
> >> Fixes following dEQP tests:
> >
On Tuesday, October 11, 2016 10:00:07 AM PDT Timothy Arceri wrote:
> I forgot to add that Jenkins is saying the following piglit test is
> fixed by this series in IVY and HSW. I assume this is due to patch 2
>
> piglit.spec.arb_tessellation_shader.execution.variable-indexing.tes-
> both-input-arra
On Monday, October 10, 2016 10:32:17 AM PDT Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> ---
> src/compiler/glsl/ir_print_visitor.cpp | 10 +++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
This patch is:
Reviewed-by: Kenneth Graunke
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e:
Patches 2-3 are:
Reviewed-by: Kenneth Graunke
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Many of these can be "NULL if the pipeline has rasterization disabled."
Also, we should assert that pMultisampleState exists.
Signed-off-by: Kenneth Graunke
---
src/intel/vulkan/anv_pipeline.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/src/in
pViewportState may be NULL if rasterization is disabled.
Signed-off-by: Kenneth Graunke
---
src/intel/vulkan/genX_pipeline_util.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/genX_pipeline_util.h
b/src/intel/vulkan/genX_pipeline_util.h
index 0ff92f1
On Wednesday, October 12, 2016 12:04:34 AM PDT srol...@vmware.com wrote:
> From: Roland Scheidegger
>
> This should make the code more robust if a shader tries to use inputs which
> aren't defined by the vertex element layout (which usually shouldn't happen).
>
> No piglit change.
> ---
> src/g
-off-by: Ian Romanick
> Cc: Kenneth Graunke
Dead for 6 years, and we only now noticed...derp. :) I wish there were
better compiler warnings for things like this...
Series is:
Reviewed-by: Kenneth Graunke
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ableFlags & 1) &&
>(scissor->X > 0 ||
> scissor->Y > 0 ||
> - scissor->X + scissor->Width < rb->Width ||
> - scissor->Y + scissor->Height < rb->Height);
> + scissor->X + scissor-&
ed in
dual object mode:
"If 'dispatch mode' is DUAL_OBJECT this field is not valid."
But there's no point in using them - if there's only one invocation,
the ID will be 0. So just load a constant.
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Kenneth
TT a boolean
> intel/genxml: Make "Predication enable" a boolean
> intel/genxml: Make some PIPE_CONTROL fields booleans
I'll admit to skimming a bit, but the series is:
Reviewed-by: Kenneth Graunke
and thanks for dropping the SPF/VME abbreviations - making that
consiste
: Kenneth Graunke
---
src/compiler/glsl/builtin_functions.cpp | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/compiler/glsl/builtin_functions.cpp
b/src/compiler/glsl/builtin_functions.cpp
index ad3d981..3e4bcbb 100644
--- a/src/compiler/glsl/builtin_functions.cpp
On Saturday, August 6, 2016 10:31:19 AM PDT Jason Ekstrand wrote:
> This bit doesn't enable multisampling, it simply sets the multisampling
> mode to DX which is what we want.
This in fact does not set the multisampling API mode. That's the
DXMultisampleRasterizationMode field, while you're chang
On Saturday, August 6, 2016 10:31:16 AM PDT Jason Ekstrand wrote:
> This is now handled in emit_3dstate_clip
Not anymore, it's now handled in emit_3dstate_streamout.
Otherwise, patches 1-3 get my R-b.
> ---
> src/intel/vulkan/gen8_pipeline.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --
On Saturday, August 6, 2016 10:31:20 AM PDT Jason Ekstrand wrote:
> ---
> src/intel/vulkan/gen7_pipeline.c | 43 +
> src/intel/vulkan/gen8_pipeline.c | 48
> src/intel/vulkan/genX_pipeline_util.h | 60
> +++
Patches 6 and 7 are
Reviewed-by: Kenneth Graunke
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https://lists.freedesktop.org/mailman/listinfo/mesa-dev
ned-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_nir.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
b/src/mesa/drivers/dri/i965/brw_nir.c
index d12a946..db2056d 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/d
in affected programs: 967 -> 968 (0.10%)
helped: 1
HURT: 1
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/dri/i965/brw_nir.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
b/src/mesa/drivers/dri/i965/brw_nir.c
index db2056d..b02c404 100644
--- a/s
ctions in affected programs: 84768 -> 84019 (-0.88%)
helped: 505
HURT: 45
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_opt_algebraic.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/compiler/nir/nir_opt_algebraic.py
b/src/compiler/nir/nir_opt_algebraic.py
index 0f0896b..1c
This tries to move comparisons (a common source of boolean values)
closer to their first use. For GPUs which use condition codes,
this can eliminate a lot of temporary booleans and comparisons
which reload the condition code register based on a boolean.
Signed-off-by: Kenneth Graunke
---
src
programs: 16313 -> 16243 (-0.43%)
helped: 27
HURT: 37
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_opt_algebraic.py | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/compiler/nir/nir_opt_algebraic.py
b/src/compiler/nir/nir_opt_algebraic.py
index 4e9896f..ef87d4d 1006
16 (-0.05%)
instructions in affected programs: 1055693 -> 1049855 (-0.55%)
helped: 3900
HURT: 176
LOST: 1
GAINED: 18
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_opt_algebraic.py | 4
1 file changed, 4 insertions(+)
diff --git a/src/compiler/nir/nir_opt_algebraic.py
b/src/
cer pretty printing, but
it shouldn't actually affect any functionality.
I think it'd be great to handle load_interpolated_input here too;
I'll send a follow-up patch to do that. Feel free to review/squash
as you see fit.
Reviewed-by: Kenneth Graunke
>
&g
Signed-off-by: Kenneth Graunke
---
src/compiler/nir/nir_lower_io_to_scalar.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir_lower_io_to_scalar.c
b/src/compiler/nir/nir_lower_io_to_scalar.c
index f2345d5..8be75e4 100644
--- a/src/compiler/nir
On Wednesday, August 10, 2016 10:58:49 AM PDT Ian Romanick wrote:
> On 08/09/2016 07:30 PM, Kenneth Graunke wrote:
> > On Haswell (GL 3.3):
> >
> > total instructions in shared programs: 6211485 -> 6211427 (-0.00%)
> > instructions in affected programs: 16260 -&
On Wednesday, August 10, 2016 10:02:12 AM PDT Erik Faye-Lund wrote:
> On Wed, Aug 10, 2016 at 4:30 AM, Kenneth Graunke
> wrote:
> > On Haswell (GL 3.3):
> >
> > total instructions in shared programs: 6208759 -> 6203860 (-0.08%)
> > instructions in affected
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