---
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 16
1 file changed, 4 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index 84b74ff..9cc752e 100644
--- a/s
We'd like to CSE some instructions, like CMP, that often have null
destinations. Instead of replacing them with MOVs to null, just don't
emit the MOV.
---
src/mesa/drivers/dri/i965/brw_fs_cse.cpp | 42 +++-
1 file changed, 25 insertions(+), 17 deletions(-)
diff --git a
Since compare instructions write the flag register, they should not be
considered dead even if their destination is never read. Instead of
removing them if found to be dead, set their destination to null to free
a register.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 --
1 file changed, 4 ins
Optimizes
cmp.ge.f0(8) null g45<8,8,1>F 0F
(+f0) sel(8)g50<1>F g40<8,8,1>F g10<8,8,1>F
cmp.ge.f0(8) null g45<8,8,1>F 0F
(+f0) sel(8)g51<1>F g41<8,8,1>F g11<8,8,1>F
cmp.ge.f0(8) null g45<8,8,1>F 0F
(+f0) sel(8)g52<1>F g42<8,8,1>F g12
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index b985251..b2eac6c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 30 ++
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
2 files changed, 31 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index b2eac6c..28d369a 100644
--- a/src/mesa/drive
fs_visitor::try_replace_with_sel optimizes only if statements whose
"then" and "else" bodies contain a single MOV instruction. It also did
could not handle constant arguments, since they cause an extra MOV
immediate to be generated (since we haven't run constant propagation,
there are more than the
Removes if/endif and if/else/endif.
total instructions in shared programs: 1293990 -> 1288172 (-0.45%)
instructions in affected programs: 95390 -> 89572 (-6.10%)
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/
total instructions in shared programs: 1287488 -> 1287457 (-0.00%)
instructions in affected programs: 1745 -> 1714 (-1.78%)
---
src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp | 38 +--
1 file changed, 21 insertions(+), 17 deletions(-)
diff --git a/src/mesa/drivers/dri/i
The pass previously searched only backward from an ENDIF (and ELSE) to
find MOVs with the same destination. This commit extends the pass to
also search forward from the IF (and ELSE) to find matching MOVs which
it can replace with SEL instructions before the IF.
E.g., the pass can now optimize
Helps a lot of Steam games.
total instructions in shared programs: 1287432 -> 1287130 (-0.02%)
instructions in affected programs: 21447 -> 21145 (-1.41%)
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 8
1 file changed, 8 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
total instructions in shared programs: 1287130 -> 1285860 (-0.10%)
instructions in affected programs: 93529 -> 92259 (-1.36%)
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 22 ++
1 file changed, 22 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/dr
Only one program's instruction count is changed, but a shader in Tropics
is also affected.
instructions in affected programs: 162 -> 159 (-1.85%)
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
The first six patches have been on the list previously, but it got
confusing when they changed order and some were dropped.
The last nine patches implement a new SEL-generating peephole, a dead
flow control elimination pass, and some silly algebraic optimizations
that surprisingly are seen in real
On Tue, Oct 29, 2013 at 12:36 PM, Eric Anholt wrote:
> Matt Turner writes:
>
>> Helps a lot of Steam games.
>>
>> total instructions in shared programs: 1287432 -> 1287130 (-0.02%)
>> instructions in affected programs: 21447 -> 21145 (-1.41%)
>
> 13
Crap. Two patches were mistakenly squashed together resulting in this.
I'll resend.
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On Tue, Oct 29, 2013 at 2:26 PM, Matt Turner wrote:
> But hopefully your patch just avoids this problem entirely. I'll
> provide an update later.
7 shader helped, 4 shaders hurt by going from my series and your
patch, to my series, your patch, and disabling the original
SEL-generati
On Mon, Oct 28, 2013 at 11:08 PM, Eric Anholt wrote:
> Matt Turner writes:
>
>> Since compare instructions write the flag register, they should not be
>> considered dead even if their destination is never read. Instead of
>> removing them if found to be dead, set thei
We'd like to CSE some instructions, like CMP, that often have null
destinations. Instead of replacing them with MOVs to null, just don't
emit the MOV.
---
Updated version: Replaced two comments with Eric's suggested comment.
Left the comment about the basic block boundary in place. Let me know
if
On Tue, Oct 29, 2013 at 4:57 AM, Pohjolainen, Topi
wrote:
> On Mon, Oct 28, 2013 at 11:31:33AM -0700, Matt Turner wrote:
>> fs_visitor::try_replace_with_sel optimizes only if statements whose
>> "then" and "else" bodies contain a single MOV instruction. It al
On Tue, Oct 29, 2013 at 2:32 AM, Pohjolainen, Topi
wrote:
> On Mon, Oct 28, 2013 at 11:31:32AM -0700, Matt Turner wrote:
>> ---
>> src/mesa/drivers/dri/i965/brw_fs.cpp | 30 ++
>> src/mesa/drivers/dri/i965/brw_fs.h | 1 +
>> 2 f
Removes if/endif and if/else/endif.
total instructions in shared programs: 1366420 -> 1356988 (-0.69%)
instructions in affected programs: 160818 -> 151386 (-5.87%)
---
Split mistakenly squashed patch.
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_fs
Before this patch, the following code would not be optimized even though
the final two instructions were common to the then and else blocks:
(+f0) IF
MOV dst2 ...
MOV dst1 ...
MOV dst0 ...
ELSE
MOV dst3 ...
MOV dst1 ...
MOV dst0 ...
ENDIF
This commit extends the peephol
On Wed, Oct 30, 2013 at 8:59 AM, Paul Berry wrote:
> On 29 October 2013 17:23, Matt Turner wrote:
>>
>> On Tue, Oct 29, 2013 at 2:32 AM, Pohjolainen, Topi
>> wrote:
>> > On Mon, Oct 28, 2013 at 11:31:32AM -0700, Matt Turner wrote:
>> >> ---
>&g
On Wed, Oct 30, 2013 at 9:30 AM, Paul Berry wrote:
> On 28 October 2013 11:31, Matt Turner wrote:
>>
>> fs_visitor::try_replace_with_sel optimizes only if statements whose
>> "then" and "else" bodies contain a single MOV instruction. It also did
>>
On Wed, Oct 30, 2013 at 10:06 AM, Paul Berry wrote:
> On 28 October 2013 11:31, Matt Turner wrote:
>>
>> fs_visitor::try_replace_with_sel optimizes only if statements whose
>> "then" and "else" bodies contain a single MOV instruction. It also did
>
On Thu, Oct 31, 2013 at 10:05 AM, Ian Romanick wrote:
>> +GL_ARB_shading_language_420pack DONE (i965, r600,
>> radeonsi)
>
> Because of the way it was implemented, I think this should say "All
> drivers that support GLSL 1.30."
In a similar vein, I wonder if there's any valu
Removes IF/ENDIF and IF/ELSE/ENDIF with no intervening instructions.
total instructions in shared programs: 1360393 -> 1360387 (-0.00%)
instructions in affected programs: 157 -> 151 (-3.82%)
(no change in vertex shaders)
Reviewed-by: Paul Berry [v1]
v2: Moved before SEL peephole in series.
Before this patch, the following code would not be optimized even though
the first two instructions were common to the then and else blocks:
(+f0) IF
MOV dst0 ...
MOV dst1 ...
MOV dst2 ...
ELSE
MOV dst0 ...
MOV dst1 ...
MOV dst3 ...
ENDIF
This commit extends the peephol
Useful for finding the associated control flow instructions, given a
block ending in one.
---
src/mesa/drivers/dri/i965/brw_cfg.cpp | 34 ++
src/mesa/drivers/dri/i965/brw_cfg.h | 10 ++
2 files changed, 40 insertions(+), 4 deletions(-)
diff --git a/src/me
fs_visitor::try_replace_with_sel optimizes only if statements whose
"then" and "else" bodies contain a single MOV instruction. It also
could not handle constant arguments, since they cause an extra MOV
immediate to be generated (since we haven't run constant propagation,
there are more than the sin
One program affected.
instructions in affected programs: 436 -> 428 (-1.83%)
Reviewed-by: Paul Berry
---
src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp | 42 +--
1 file changed, 23 insertions(+), 19 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_sel_peeph
unters are going to be a
> lot closer to the "few collisions between threads and favorable pipelining"
> case than they are going to be to this pessimistic estimate. Personally,
> I'd be inclined to make the latency the same as
> SHADER_OPCODE_UNTYPED_SURFACE_R
On Fri, Nov 1, 2013 at 3:02 PM, Paul Berry wrote:
> In the last round of review, you gave me some nice clarification on why this
> was chosen to be 8. Would you mind documenting that in the comment?
Yes, I will add it.
Thanks Paul!
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total instructions in shared programs: 1649485 -> 1649157 (-0.02%)
instructions in affected programs: 7823 -> 7495 (-4.19%)
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs.h
On Mon, Nov 4, 2013 at 10:33 AM, Eric Anholt wrote:
> Matt Turner writes:
>
>> One program affected.
>>
>> instructions in affected programs: 436 -> 428 (-1.83%)
>>
>> Reviewed-by: Paul Berry
>
> Couldn't we just detect this in opt_algebraic
On Mon, Nov 4, 2013 at 10:57 AM, Paul Berry wrote:
> On 4 November 2013 10:31, Eric Anholt wrote:
>>
>> Matt Turner writes:
>> > diff --git a/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
>> > b/src/mesa/drivers/dri/i965/brw_fs_sel_peephole.cpp
>> &g
On Mon, Nov 4, 2013 at 11:30 AM, Paul Berry wrote:
> On 4 November 2013 11:23, Matt Turner wrote:
>>
>> On Mon, Nov 4, 2013 at 10:57 AM, Paul Berry
>> wrote:
>> > On 4 November 2013 10:31, Eric Anholt wrote:
>> >>
>> >> Matt Turner
---
Makefile.am | 2 +-
configure.ac | 1 -
src/mesa/Makefile.am | 24 +++
src/mesa/program/Makefile.am | 45
4 files changed, 17 insertions(+), 55 deletions(-)
delete mode 100644 src/mesa/
---
src/mesa/Makefile.am | 15 ---
1 file changed, 4 insertions(+), 11 deletions(-)
diff --git a/src/mesa/Makefile.am b/src/mesa/Makefile.am
index f86caee..6ce31d2 100644
--- a/src/mesa/Makefile.am
+++ b/src/mesa/Makefile.am
@@ -85,8 +85,7 @@ if HAVE_GALLIUM
noinst_LTLIBRARIES += lib
---
src/mesa/main/compiler.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/src/mesa/main/compiler.h b/src/mesa/main/compiler.h
index 61ce5db..6a25bf5 100644
--- a/src/mesa/main/compiler.h
+++ b/src/mesa/main/compiler.h
@@ -252,6 +252,21 @@ static INLINE GLuint CPU_TO_LE32(GL
---
src/mesa/drivers/dri/i965/brw_reg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index e9cf892..bfc99e1 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -299,6 +299,7
On Mon, Nov 4, 2013 at 4:48 PM, Brian Paul wrote:
> ---
> src/mesa/main/compiler.h |7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/src/mesa/main/compiler.h b/src/mesa/main/compiler.h
> index 61ce5db..2752ca8 100644
> --- a/src/mesa/main/compiler.h
> +++ b/src/mes
On Mon, Nov 4, 2013 at 5:04 PM, Matt Turner wrote:
> On Mon, Nov 4, 2013 at 4:48 PM, Brian Paul wrote:
>> ---
>> src/mesa/main/compiler.h |7 +--
>> 1 file changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/src/mesa/main/compiler.h b/src/mesa
you could do this with half the static data by returning
pointers to elements [1] and [2] of gen7_samples for the gen6 and
gen4/5 cases.
In any case
Reviewed-by: Matt Turner
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On Sat, Nov 2, 2013 at 12:00 PM, Emil Velikov wrote:
> Rip out the source file list from mesa/Makefile.sources, to a
> more sensible location/file.
> * Split PROGRAM_FILES and GENERATED_FILES.
> * Update the automake and Android build systems.
>
> Android
> * Slightly reshuffle the Android.mk for
On Mon, Nov 4, 2013 at 4:43 PM, Matt Turner wrote:
> ---
> src/mesa/main/compiler.h | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git a/src/mesa/main/compiler.h b/src/mesa/main/compiler.h
> index 61ce5db..6a25bf5 100644
> --- a/src/mesa/main/compiler.h
On Tue, Nov 5, 2013 at 10:49 AM, Emil Velikov wrote:
> Now we have one intermediate library (archive), which links against both
> mesa classic and gallium. Whereas with your patch it builds it twice but
> drops the linking part. Is the extra recursion + linking that much more
> significant than re
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Eric Anholt
+ *Matt Turner
+ *
+ */
+
+#include "main/macros.h"
+#include "
---
Chad has benchmark numbers, I think.
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 88 +++
1 file changed, 88 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 2f5e04f..17f0075 100644
---
We do support out of tree builds now.
Cc: Colin Walters
---
configure.ac | 4
1 file changed, 4 deletions(-)
diff --git a/configure.ac b/configure.ac
index bbdad83..433470b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -14,10 +14,6 @@ AC_CONFIG_MACRO_DIR([m4])
AC_CANONICAL_SYSTEM
AM_IN
---
configure.ac| 4 +---
src/mesa/.gitignore | 2 ++
src/mesa/Makefile.am| 16 +-
src/mesa/x86-64/.gitignore | 2 --
src/mesa/x86-64/Makefile.am | 49 ---
src/mesa/x86/.gitignore | 2 --
src/mesa/x86/Make
---
configure.ac | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/configure.ac b/configure.ac
index 433470b..633d86e 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1938,9 +1938,9 @@ AM_CONDITIONAL(HAVE_X11_DRIVER, test "x$enable_xlib_glx"
= xyes)
AM_CONDITIONAL(HAVE_OS
I want a conditional that says generally "we have x86 assembly" in the
next patch.
---
configure.ac | 2 +-
src/mapi/glapi/Makefile.am | 5 +++--
src/mapi/glapi/gen/Makefile.am | 6 +++---
src/mesa/Makefile.am | 7 ---
src/mesa/x86/Makefile.am | 2 ++
5 fi
---
Right you are! This version fixes out of tree builds by mkdir'ing
the program folder in the builddir.
Makefile.am | 2 +-
configure.ac | 1 -
src/mesa/Makefile.am | 26 +
src/mesa/program/Makefile.am | 45
On Tue, Oct 29, 2013 at 4:37 PM, Francisco Jerez wrote:
> v2: Mark atomic counters as read-only variables. Move offset overlap
> code to the linker. Use the contains_atomic() convenience method.
> v3: Use pointer to integer instead of non-const reference. Add
> comment so we remember to
On Wed, Nov 6, 2013 at 10:19 AM, Thorsten Glaser wrote:
> Hi everyone,
>
> here’s a bugfix to make implicit alignment and padding
> assumptions explicit, please apply.
[sarcasm]How well does NV84 video decoding work on m68k these days
anyway?[/sarcasm]
With the removal of the r600 and radeonsi xorg targets, the only ones
left are i915 and nouveau. Does anyone have a compelling reason to
keep them (and the state tracker code itself) around anymore?
Seems like VMware uses XA, which Rob might also use for freedreno.
I'd be happy to delete them tom
---
configure.ac | 3 +-
src/gallium/targets/Makefile.am | 4 -
src/gallium/targets/xorg-nouveau/Makefile.am | 68
src/gallium/targets/xorg-nouveau/nouveau_target.c | 20 ---
src/gallium/targets/xorg-nouveau/nouveau_xorg.c
Acked-by: Jakob Bornecrantz
Acked-by: Stéphane Marchesin
---
configure.ac | 3 +-
src/gallium/SConscript | 5 -
src/gallium/targets/Makefile.am | 4 -
src/gallium/targets/xorg-i915/Makefile.am| 76 --
src/g
---
Deleted files diff removed.
configure.ac | 56 +-
src/gallium/SConscript |3 -
src/gallium/state_trackers/Makefile.am |4 -
src/gallium/state_trackers/xorg/Makefile.am | 43 -
src/gallium/state_trackers/x
On Thu, Nov 7, 2013 at 9:01 AM, Courtney Goeltzenleuchter
wrote:
> What's the process of contributing a test to the Mesa demos repository?
Send patches to this list with a [PATCH demos] prefix.
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ht
Improves performance of RoboHornet's 2D Canvas toDataURL benchmark
[http://www.robohornet.org/#e=canvastodataurl] by approximately 5x
on Baytrail on ChromiumOS.
---
v2: Added benchmark results
Remove unnecessary _mesa_align_free in error case
Rename stride to width_bytes and make const
I saw the perf demo patches and expected to see results from them in
this patch. Any results to share?
On Thu, Nov 7, 2013 at 1:22 PM, Courtney Goeltzenleuchter
wrote:
> Support all levels of a supported texture format.
>
> Signed-off-by: Courtney Goeltzenleuchter
> ---
> src/mesa/drivers/dri/i
On Thu, Nov 7, 2013 at 1:28 PM, Matt Turner wrote:
> I saw the perf demo patches and expected to see results from them in
> this patch. Any results to share?
Oh, I see they're in the cover letter. They should really be in the
commit messages, for a variety
to include these as well.
Patch 1 (with benchmarks in the commit message) is:
Reviewed-by: Matt Turner
I don't know anything about the miptree layout, so I don't feel able
to review the second patch, but it seems plausible.
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ves_enable);
> }
>
> static bool
> --
> 1.8.3.2
>
> ___
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Reviewed-by: Matt Turner
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Commit b16b3c87 began performing CSE on CMP instructions with null
destinations. I relaxed the restrictions a bit too much, thereby
allowing CSE to be performed on instructions with, for instance, an
explicit accumulator destination.
This broke the arb_gpu_shader5/fs-imulExtended shader tests beca
On Fri, Nov 8, 2013 at 1:55 PM, Chad Versace
wrote:
> CC: Matt Turner
> Signed-off-by: Chad Versace
> ---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> b/s
On Fri, Nov 8, 2013 at 11:29 AM, Dave Airlie wrote:
> Since we seemed to have some confusion over this I'll state it clearly here.
>
> You should not merge kernel interface and ioctls to libdrm until they
> have appeared in a git commit upstream with a stable id, this
> generally means drm-next, b
On Fri, Nov 8, 2013 at 9:55 AM, wrote:
> From: José Fonseca
>
> By disabling DRI3 support for the time being.
>
> I'll add DRI3 support to scons build when the DRI3 dependencies become
> more widely available (as now there is no convenient way of testing it
> except building dependencies from so
On Fri, Nov 8, 2013 at 3:06 PM, Armin K wrote:
> This patch makes it possible to disable DRI3 if desired.
Reviewed-by: Matt Turner
Unless non-Linux users still need to be able to disable DRI3, by the
time Mesa 10.0 is released I think we want to require these bits for
DRI builds. I'll
On Sat, Nov 9, 2013 at 3:54 AM, Steven Newbury wrote:
> On Wed, 2013-11-06 at 17:06 -0800, Chad Versace wrote:
>> On 11/06/2013 02:44 PM, Eric Anholt wrote:
>> > Matt Turner writes:
>> >
>> >> Uses SSE 4.1's MOVNTDQA instruction (streaming load
On Sat, Nov 9, 2013 at 11:39 AM, Jordan Justen
wrote:
> This algebraic optimization recognizes an series of adds and
> multiplies with a particular pattern within the ir which is
> equivalent to a lrp.
>
> shader-db results:
> total instructions in shared programs: 1729161 -> 1718321 (-0.63%)
> in
On Mon, Nov 11, 2013 at 7:58 AM, Brian Paul wrote:
> On 11/08/2013 11:49 AM, Eric Anholt wrote:
>>
>> Jose Fonseca writes:
>>
>>> This change seems makes dri3proto a hard requirement to build with
>>> automake. Is that strictly necessary? I tried to find ubuntu
>>> packages for it to install on
Need a better commit message. I like the kernel's guidelines which
remind us that the summary becomes the globally-unique identifier for
the patch.
Style comments:
On Mon, Nov 11, 2013 at 1:35 AM, Kevin Rogovin wrote:
> This patch adds a function interface for enabling no wrap on batch commands,
On Mon, Nov 11, 2013 at 9:19 AM, Brian Paul wrote:
> The tarball doesn't contain the autogen.sh script. And I don't see a
> pointer to the git tree in the tarball. There's no README or anything.
Oh. :(
The repo is git://anongit.freedesktop.org/xorg/lib/libxshmfence
You can get the effect of a
On Mon, Nov 11, 2013 at 1:19 PM, Chad Versace
wrote:
> On 11/07/2013 01:59 PM, Courtney Goeltzenleuchter wrote:
>>
>> MESA_FORMAT_XRGB is equivalent to MESA_FORMAT_ARGB in terms
>> of storage on the device, so okay to use this optimized copy routine.
>>
>> This series builds on work from F
On Mon, Nov 11, 2013 at 12:18 PM, Rico Schüller wrote:
> Signed-off-by: Rico Schüller
> ---
> src/mapi/shared-glapi/tests/Makefile.am | 1 +
> src/mesa/main/tests/Makefile.am | 1 +
> 2 Dateien geändert, 2 Zeilen hinzugefügt(+)
>
> diff --git a/src/mapi/shared-glapi/tests/Makefile.am
>
On Tue, Nov 5, 2013 at 5:35 PM, Eric Anholt wrote:
> We'd have to map the VBO and rewrite things to a lower stride to fix it.
> ---
These three are
Reviewed-by: Matt Turner
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d
> retaining the non-unigine performance wins from texture-grf.
>
> total instructions in shared programs: 1626728 -> 1626288 (-0.03%)
> instructions in affected programs: 1015 -> 575 (-43.35%)
> GAINED:50
> LOST:
On Mon, Nov 11, 2013 at 10:53 AM, Emil Velikov wrote:
> Signed-off-by: Emil Velikov
> ---
> src/gtest/Makefile.am | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/src/gtest/Makefile.am b/src/gtest/Makefile.am
> index 4188c6b..23ea749 100644
> --- a/src/gtest/Makefile.am
> +++ b/src/gtest
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71512
---
src/mesa/drivers/dri/i965/Makefile.am | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/Makefile.am
b/src/mesa/drivers/dri/i965/Makefile.am
index 8c0f9a3..6bce3c1 100644
--- a/src/mesa/drivers/dri/i965/Ma
---
src/gallium/state_trackers/clover/Makefile.sources | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/gallium/state_trackers/clover/Makefile.sources
b/src/gallium/state_trackers/clover/Makefile.sources
index 520f52f..42b3345 100644
--- a/src/gallium/state_trackers/clover/Makefile.sources
On Tue, Nov 12, 2013 at 12:22 PM, Chad Versace
wrote:
> +mesa-dev
>
>
> On 11/12/2013 09:16 AM, Courtney Goeltzenleuchter wrote:
>>
>> On Mon, Nov 11, 2013 at 2:19 PM, Chad Versace
>> wrote:
>>
>>> On 11/07/2013 01:59 PM, Courtney Goeltzenleuchter wrote:
>>>
MESA_FORMAT_XRGB is equivalent
On Tue, Nov 12, 2013 at 3:02 PM, Eric Anholt wrote:
> DLOPEN_LIBS should already be part of DRI_LIB_DEPS. Can we just move
> DRI_LIB_DEPS after libmesa.la?
Oh, you're right. Yeah, that should be better.
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---
src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++--
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 292eeb3..2cc1da5 100644
--- a/src/
On Thu, Nov 14, 2013 at 5:39 PM, Mark Mueller wrote:
> On Thu, Nov 14, 2013 at 5:18 PM, Chris Forbes wrote:
>> Why does this affect that piglit test?
>
> Oh wait, it was patch 1/2 that fixed that test. Do I still need to answer
> the question? :)
>
> 1/2 made no significant functional changes so
* mov(8)g112<1>ud 0xud { align1 WE_all 1Q };
> --
> 1.8.4.2
Ah, man. And I reviewed that one too.
Reviewed-by: Matt Turner
Please add the Cc 10.0 stable tag.
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Reviewed-by: Paul Berry
---
src/mesa/drivers/dri/i965/brw_shader.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h
b/src/mesa/drivers/dri/i965/brw_shader.h
index aba24c5..ae7823e 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drive
Reviewed-by: Paul Berry
---
src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 2 +-
src/mesa/drivers/dri/i965/brw_vec4.cpp | 8
src/mesa/drivers/dri/i965/brw_vec4.h| 1 +
src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 2 +-
src/mesa
Previously, register_coalesce() would modify
mov vgrf1:f vgrf2:f
cmp null vgrf3:d vgrf1:d
to be
cmp null vgrf3:d vgrf2:f
and incorrectly use vgrf2's type in the instruction that the mov was
coalesced into.
---
My in progress value-numbering pass exposes this bug, but w
Removes IF/ENDIF and IF/ELSE/ENDIF with no intervening instructions.
total instructions in shared programs: 1360393 -> 1360387 (-0.00%)
instructions in affected programs: 157 -> 151 (-3.82%)
(no change in vertex shaders)
Reviewed-by: Paul Berry
Reviewed-by: Eric Anholt
---
src/mesa/driver
For commit 4df56177 Paul discovered that the hardware restriction that
Align16 instructions cannot be compressed was lifted on Haswell. This
has prevented us from emitting compressed three-source instructions.
For added confirmation, the bspec lists a work around called
WaBreakSimd16TernaryInstruc
---
src/mesa/drivers/dri/i965/brw_disasm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index 22b37d7..128e717 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/
---
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 1e5422c..bf38db6 100644
--- a/src/mesa/drivers/dri/i
On Sat, Nov 16, 2013 at 3:53 PM, Kenneth Graunke wrote:
> On 11/16/2013 03:24 PM, Matt Turner wrote:
>> For commit 4df56177 Paul discovered that the hardware restriction that
>> Align16 instructions cannot be compressed was lifted on Haswell. This
>> has prevented us fro
For commit 4df56177 Paul discovered that the hardware restriction that
Align16 instructions cannot be compressed was lifted on Haswell. This
has prevented us from emitting compressed three-source instructions.
For added confirmation, the bspec lists a work around called
WaBreakSimd16TernaryInstruc
DLOPEN_LIBS is part of DRI_LIB_DEPS.
---
src/mesa/drivers/dri/i965/Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/Makefile.am
b/src/mesa/drivers/dri/i965/Makefile.am
index 8c0f9a3..3b46af8 100644
--- a/src/mesa/drivers/dri/i965/Makefile.a
---
src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp
b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp
index c5a3cfc..83d931c 100644
--- a/src/mesa/drivers/dri/i965/tes
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