Re: [PATCH 2/2] arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal

2018-11-30 Thread Gregory CLEMENT
Hi Baruch, On mar., oct. 16 2018, Baruch Siach wrote: > This reset signal controls the Marvell 1512 1G PHY. > > Note that current implementation queries the PHY over the MDIO bus > (get_phy_device() call from of_mdiobus_register_phy()) before reset > signal deassert. If the PHY reset signal is

[PATCH 2/2] arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal

2018-10-16 Thread Baruch Siach
This reset signal controls the Marvell 1512 1G PHY. Note that current implementation queries the PHY over the MDIO bus (get_phy_device() call from of_mdiobus_register_phy()) before reset signal deassert. If the PHY reset signal is asserted at boot time, PHY registration fails. So current code reli